Lines Matching defs:rd
70 void Riscv64Assembler::Lui(XRegister rd, uint32_t imm20) { in Lui()
81 void Riscv64Assembler::Auipc(XRegister rd, uint32_t imm20) { in Auipc()
87 void Riscv64Assembler::Jal(XRegister rd, int32_t offset) { in Jal()
99 void Riscv64Assembler::Jalr(XRegister rd, XRegister rs1, int32_t offset) { in Jalr()
161 void Riscv64Assembler::Lb(XRegister rd, XRegister rs1, int32_t offset) { in Lb()
166 void Riscv64Assembler::Lh(XRegister rd, XRegister rs1, int32_t offset) { in Lh()
179 void Riscv64Assembler::Lw(XRegister rd, XRegister rs1, int32_t offset) { in Lw()
195 void Riscv64Assembler::Ld(XRegister rd, XRegister rs1, int32_t offset) { in Ld()
211 void Riscv64Assembler::Lbu(XRegister rd, XRegister rs1, int32_t offset) { in Lbu()
224 void Riscv64Assembler::Lhu(XRegister rd, XRegister rs1, int32_t offset) { in Lhu()
237 void Riscv64Assembler::Lwu(XRegister rd, XRegister rs1, int32_t offset) { in Lwu()
304 void Riscv64Assembler::Addi(XRegister rd, XRegister rs1, int32_t imm12) { in Addi()
338 void Riscv64Assembler::Slti(XRegister rd, XRegister rs1, int32_t imm12) { in Slti()
342 void Riscv64Assembler::Sltiu(XRegister rd, XRegister rs1, int32_t imm12) { in Sltiu()
346 void Riscv64Assembler::Xori(XRegister rd, XRegister rs1, int32_t imm12) { in Xori()
357 void Riscv64Assembler::Ori(XRegister rd, XRegister rs1, int32_t imm12) { in Ori()
361 void Riscv64Assembler::Andi(XRegister rd, XRegister rs1, int32_t imm12) { in Andi()
373 void Riscv64Assembler::Slli(XRegister rd, XRegister rs1, int32_t shamt) { in Slli()
387 void Riscv64Assembler::Srli(XRegister rd, XRegister rs1, int32_t shamt) { in Srli()
401 void Riscv64Assembler::Srai(XRegister rd, XRegister rs1, int32_t shamt) { in Srai()
416 void Riscv64Assembler::Add(XRegister rd, XRegister rs1, XRegister rs2) { in Add()
451 void Riscv64Assembler::Sub(XRegister rd, XRegister rs1, XRegister rs2) { in Sub()
462 void Riscv64Assembler::Slt(XRegister rd, XRegister rs1, XRegister rs2) { in Slt()
466 void Riscv64Assembler::Sltu(XRegister rd, XRegister rs1, XRegister rs2) { in Sltu()
470 void Riscv64Assembler::Xor(XRegister rd, XRegister rs1, XRegister rs2) { in Xor()
486 void Riscv64Assembler::Or(XRegister rd, XRegister rs1, XRegister rs2) { in Or()
502 void Riscv64Assembler::And(XRegister rd, XRegister rs1, XRegister rs2) { in And()
518 void Riscv64Assembler::Sll(XRegister rd, XRegister rs1, XRegister rs2) { in Sll()
522 void Riscv64Assembler::Srl(XRegister rd, XRegister rs1, XRegister rs2) { in Srl()
526 void Riscv64Assembler::Sra(XRegister rd, XRegister rs1, XRegister rs2) { in Sra()
532 void Riscv64Assembler::Addiw(XRegister rd, XRegister rs1, int32_t imm12) { in Addiw()
548 void Riscv64Assembler::Slliw(XRegister rd, XRegister rs1, int32_t shamt) { in Slliw()
553 void Riscv64Assembler::Srliw(XRegister rd, XRegister rs1, int32_t shamt) { in Srliw()
558 void Riscv64Assembler::Sraiw(XRegister rd, XRegister rs1, int32_t shamt) { in Sraiw()
565 void Riscv64Assembler::Addw(XRegister rd, XRegister rs1, XRegister rs2) { in Addw()
581 void Riscv64Assembler::Subw(XRegister rd, XRegister rs1, XRegister rs2) { in Subw()
592 void Riscv64Assembler::Sllw(XRegister rd, XRegister rs1, XRegister rs2) { in Sllw()
596 void Riscv64Assembler::Srlw(XRegister rd, XRegister rs1, XRegister rs2) { in Srlw()
600 void Riscv64Assembler::Sraw(XRegister rd, XRegister rs1, XRegister rs2) { in Sraw()
647 void Riscv64Assembler::Mul(XRegister rd, XRegister rs1, XRegister rs2) { in Mul()
665 void Riscv64Assembler::Mulh(XRegister rd, XRegister rs1, XRegister rs2) { in Mulh()
670 void Riscv64Assembler::Mulhsu(XRegister rd, XRegister rs1, XRegister rs2) { in Mulhsu()
675 void Riscv64Assembler::Mulhu(XRegister rd, XRegister rs1, XRegister rs2) { in Mulhu()
680 void Riscv64Assembler::Div(XRegister rd, XRegister rs1, XRegister rs2) { in Div()
685 void Riscv64Assembler::Divu(XRegister rd, XRegister rs1, XRegister rs2) { in Divu()
690 void Riscv64Assembler::Rem(XRegister rd, XRegister rs1, XRegister rs2) { in Rem()
695 void Riscv64Assembler::Remu(XRegister rd, XRegister rs1, XRegister rs2) { in Remu()
702 void Riscv64Assembler::Mulw(XRegister rd, XRegister rs1, XRegister rs2) { in Mulw()
707 void Riscv64Assembler::Divw(XRegister rd, XRegister rs1, XRegister rs2) { in Divw()
712 void Riscv64Assembler::Divuw(XRegister rd, XRegister rs1, XRegister rs2) { in Divuw()
717 void Riscv64Assembler::Remw(XRegister rd, XRegister rs1, XRegister rs2) { in Remw()
722 void Riscv64Assembler::Remuw(XRegister rd, XRegister rs1, XRegister rs2) { in Remuw()
731 void Riscv64Assembler::LrW(XRegister rd, XRegister rs1, AqRl aqrl) { in LrW()
737 void Riscv64Assembler::LrD(XRegister rd, XRegister rs1, AqRl aqrl) { in LrD()
743 void Riscv64Assembler::ScW(XRegister rd, XRegister rs2, XRegister rs1, AqRl aqrl) { in ScW()
749 void Riscv64Assembler::ScD(XRegister rd, XRegister rs2, XRegister rs1, AqRl aqrl) { in ScD()
755 void Riscv64Assembler::AmoSwapW(XRegister rd, XRegister rs2, XRegister rs1, AqRl aqrl) { in AmoSwapW()
760 void Riscv64Assembler::AmoSwapD(XRegister rd, XRegister rs2, XRegister rs1, AqRl aqrl) { in AmoSwapD()
765 void Riscv64Assembler::AmoAddW(XRegister rd, XRegister rs2, XRegister rs1, AqRl aqrl) { in AmoAddW()
770 void Riscv64Assembler::AmoAddD(XRegister rd, XRegister rs2, XRegister rs1, AqRl aqrl) { in AmoAddD()
775 void Riscv64Assembler::AmoXorW(XRegister rd, XRegister rs2, XRegister rs1, AqRl aqrl) { in AmoXorW()
780 void Riscv64Assembler::AmoXorD(XRegister rd, XRegister rs2, XRegister rs1, AqRl aqrl) { in AmoXorD()
785 void Riscv64Assembler::AmoAndW(XRegister rd, XRegister rs2, XRegister rs1, AqRl aqrl) { in AmoAndW()
790 void Riscv64Assembler::AmoAndD(XRegister rd, XRegister rs2, XRegister rs1, AqRl aqrl) { in AmoAndD()
795 void Riscv64Assembler::AmoOrW(XRegister rd, XRegister rs2, XRegister rs1, AqRl aqrl) { in AmoOrW()
800 void Riscv64Assembler::AmoOrD(XRegister rd, XRegister rs2, XRegister rs1, AqRl aqrl) { in AmoOrD()
805 void Riscv64Assembler::AmoMinW(XRegister rd, XRegister rs2, XRegister rs1, AqRl aqrl) { in AmoMinW()
810 void Riscv64Assembler::AmoMinD(XRegister rd, XRegister rs2, XRegister rs1, AqRl aqrl) { in AmoMinD()
815 void Riscv64Assembler::AmoMaxW(XRegister rd, XRegister rs2, XRegister rs1, AqRl aqrl) { in AmoMaxW()
820 void Riscv64Assembler::AmoMaxD(XRegister rd, XRegister rs2, XRegister rs1, AqRl aqrl) { in AmoMaxD()
825 void Riscv64Assembler::AmoMinuW(XRegister rd, XRegister rs2, XRegister rs1, AqRl aqrl) { in AmoMinuW()
830 void Riscv64Assembler::AmoMinuD(XRegister rd, XRegister rs2, XRegister rs1, AqRl aqrl) { in AmoMinuD()
835 void Riscv64Assembler::AmoMaxuW(XRegister rd, XRegister rs2, XRegister rs1, AqRl aqrl) { in AmoMaxuW()
840 void Riscv64Assembler::AmoMaxuD(XRegister rd, XRegister rs2, XRegister rs1, AqRl aqrl) { in AmoMaxuD()
851 void Riscv64Assembler::Csrrw(XRegister rd, uint32_t csr, XRegister rs1) { in Csrrw()
856 void Riscv64Assembler::Csrrs(XRegister rd, uint32_t csr, XRegister rs1) { in Csrrs()
861 void Riscv64Assembler::Csrrc(XRegister rd, uint32_t csr, XRegister rs1) { in Csrrc()
866 void Riscv64Assembler::Csrrwi(XRegister rd, uint32_t csr, uint32_t uimm5) { in Csrrwi()
871 void Riscv64Assembler::Csrrsi(XRegister rd, uint32_t csr, uint32_t uimm5) { in Csrrsi()
876 void Riscv64Assembler::Csrrci(XRegister rd, uint32_t csr, uint32_t uimm5) { in Csrrci()
887 void Riscv64Assembler::FLw(FRegister rd, XRegister rs1, int32_t offset) { in FLw()
892 void Riscv64Assembler::FLd(FRegister rd, XRegister rs1, int32_t offset) { in FLd()
932 FRegister rd, FRegister rs1, FRegister rs2, FRegister rs3, FPRoundingMode frm) { in FMAddS()
938 FRegister rd, FRegister rs1, FRegister rs2, FRegister rs3, FPRoundingMode frm) { in FMAddD()
944 FRegister rd, FRegister rs1, FRegister rs2, FRegister rs3, FPRoundingMode frm) { in FMSubS()
950 FRegister rd, FRegister rs1, FRegister rs2, FRegister rs3, FPRoundingMode frm) { in FMSubD()
956 FRegister rd, FRegister rs1, FRegister rs2, FRegister rs3, FPRoundingMode frm) { in FNMSubS()
962 FRegister rd, FRegister rs1, FRegister rs2, FRegister rs3, FPRoundingMode frm) { in FNMSubD()
968 FRegister rd, FRegister rs1, FRegister rs2, FRegister rs3, FPRoundingMode frm) { in FNMAddS()
974 FRegister rd, FRegister rs1, FRegister rs2, FRegister rs3, FPRoundingMode frm) { in FNMAddD()
981 void Riscv64Assembler::FAddS(FRegister rd, FRegister rs1, FRegister rs2, FPRoundingMode frm) { in FAddS()
986 void Riscv64Assembler::FAddD(FRegister rd, FRegister rs1, FRegister rs2, FPRoundingMode frm) { in FAddD()
991 void Riscv64Assembler::FSubS(FRegister rd, FRegister rs1, FRegister rs2, FPRoundingMode frm) { in FSubS()
996 void Riscv64Assembler::FSubD(FRegister rd, FRegister rs1, FRegister rs2, FPRoundingMode frm) { in FSubD()
1001 void Riscv64Assembler::FMulS(FRegister rd, FRegister rs1, FRegister rs2, FPRoundingMode frm) { in FMulS()
1006 void Riscv64Assembler::FMulD(FRegister rd, FRegister rs1, FRegister rs2, FPRoundingMode frm) { in FMulD()
1011 void Riscv64Assembler::FDivS(FRegister rd, FRegister rs1, FRegister rs2, FPRoundingMode frm) { in FDivS()
1016 void Riscv64Assembler::FDivD(FRegister rd, FRegister rs1, FRegister rs2, FPRoundingMode frm) { in FDivD()
1021 void Riscv64Assembler::FSqrtS(FRegister rd, FRegister rs1, FPRoundingMode frm) { in FSqrtS()
1026 void Riscv64Assembler::FSqrtD(FRegister rd, FRegister rs1, FPRoundingMode frm) { in FSqrtD()
1031 void Riscv64Assembler::FSgnjS(FRegister rd, FRegister rs1, FRegister rs2) { in FSgnjS()
1036 void Riscv64Assembler::FSgnjD(FRegister rd, FRegister rs1, FRegister rs2) { in FSgnjD()
1041 void Riscv64Assembler::FSgnjnS(FRegister rd, FRegister rs1, FRegister rs2) { in FSgnjnS()
1046 void Riscv64Assembler::FSgnjnD(FRegister rd, FRegister rs1, FRegister rs2) { in FSgnjnD()
1051 void Riscv64Assembler::FSgnjxS(FRegister rd, FRegister rs1, FRegister rs2) { in FSgnjxS()
1056 void Riscv64Assembler::FSgnjxD(FRegister rd, FRegister rs1, FRegister rs2) { in FSgnjxD()
1061 void Riscv64Assembler::FMinS(FRegister rd, FRegister rs1, FRegister rs2) { in FMinS()
1066 void Riscv64Assembler::FMinD(FRegister rd, FRegister rs1, FRegister rs2) { in FMinD()
1071 void Riscv64Assembler::FMaxS(FRegister rd, FRegister rs1, FRegister rs2) { in FMaxS()
1076 void Riscv64Assembler::FMaxD(FRegister rd, FRegister rs1, FRegister rs2) { in FMaxD()
1081 void Riscv64Assembler::FCvtSD(FRegister rd, FRegister rs1, FPRoundingMode frm) { in FCvtSD()
1086 void Riscv64Assembler::FCvtDS(FRegister rd, FRegister rs1, FPRoundingMode frm) { in FCvtDS()
1094 void Riscv64Assembler::FEqS(XRegister rd, FRegister rs1, FRegister rs2) { in FEqS()
1099 void Riscv64Assembler::FEqD(XRegister rd, FRegister rs1, FRegister rs2) { in FEqD()
1104 void Riscv64Assembler::FLtS(XRegister rd, FRegister rs1, FRegister rs2) { in FLtS()
1109 void Riscv64Assembler::FLtD(XRegister rd, FRegister rs1, FRegister rs2) { in FLtD()
1114 void Riscv64Assembler::FLeS(XRegister rd, FRegister rs1, FRegister rs2) { in FLeS()
1119 void Riscv64Assembler::FLeD(XRegister rd, FRegister rs1, FRegister rs2) { in FLeD()
1126 void Riscv64Assembler::FCvtWS(XRegister rd, FRegister rs1, FPRoundingMode frm) { in FCvtWS()
1131 void Riscv64Assembler::FCvtWD(XRegister rd, FRegister rs1, FPRoundingMode frm) { in FCvtWD()
1136 void Riscv64Assembler::FCvtWuS(XRegister rd, FRegister rs1, FPRoundingMode frm) { in FCvtWuS()
1141 void Riscv64Assembler::FCvtWuD(XRegister rd, FRegister rs1, FPRoundingMode frm) { in FCvtWuD()
1146 void Riscv64Assembler::FCvtLS(XRegister rd, FRegister rs1, FPRoundingMode frm) { in FCvtLS()
1151 void Riscv64Assembler::FCvtLD(XRegister rd, FRegister rs1, FPRoundingMode frm) { in FCvtLD()
1156 void Riscv64Assembler::FCvtLuS(XRegister rd, FRegister rs1, FPRoundingMode frm) { in FCvtLuS()
1161 void Riscv64Assembler::FCvtLuD(XRegister rd, FRegister rs1, FPRoundingMode frm) { in FCvtLuD()
1166 void Riscv64Assembler::FCvtSW(FRegister rd, XRegister rs1, FPRoundingMode frm) { in FCvtSW()
1171 void Riscv64Assembler::FCvtDW(FRegister rd, XRegister rs1, FPRoundingMode frm) { in FCvtDW()
1177 void Riscv64Assembler::FCvtSWu(FRegister rd, XRegister rs1, FPRoundingMode frm) { in FCvtSWu()
1182 void Riscv64Assembler::FCvtDWu(FRegister rd, XRegister rs1, FPRoundingMode frm) { in FCvtDWu()
1188 void Riscv64Assembler::FCvtSL(FRegister rd, XRegister rs1, FPRoundingMode frm) { in FCvtSL()
1193 void Riscv64Assembler::FCvtDL(FRegister rd, XRegister rs1, FPRoundingMode frm) { in FCvtDL()
1198 void Riscv64Assembler::FCvtSLu(FRegister rd, XRegister rs1, FPRoundingMode frm) { in FCvtSLu()
1203 void Riscv64Assembler::FCvtDLu(FRegister rd, XRegister rs1, FPRoundingMode frm) { in FCvtDLu()
1210 void Riscv64Assembler::FMvXW(XRegister rd, FRegister rs1) { in FMvXW()
1215 void Riscv64Assembler::FMvXD(XRegister rd, FRegister rs1) { in FMvXD()
1220 void Riscv64Assembler::FMvWX(FRegister rd, XRegister rs1) { in FMvWX()
1225 void Riscv64Assembler::FMvDX(FRegister rd, XRegister rs1) { in FMvDX()
1232 void Riscv64Assembler::FClassS(XRegister rd, FRegister rs1) { in FClassS()
1237 void Riscv64Assembler::FClassD(XRegister rd, FRegister rs1) { in FClassD()
1246 void Riscv64Assembler::CLwsp(XRegister rd, int32_t offset) { in CLwsp()
1252 void Riscv64Assembler::CLdsp(XRegister rd, int32_t offset) { in CLdsp()
1258 void Riscv64Assembler::CFLdsp(FRegister rd, int32_t offset) { in CFLdsp()
1312 void Riscv64Assembler::CLi(XRegister rd, int32_t imm) { in CLi()
1319 void Riscv64Assembler::CLui(XRegister rd, uint32_t nzimm6) { in CLui()
1327 void Riscv64Assembler::CAddi(XRegister rd, int32_t nzimm) { in CAddi()
1334 void Riscv64Assembler::CAddiw(XRegister rd, int32_t imm) { in CAddiw()
1374 void Riscv64Assembler::CSlli(XRegister rd, int32_t shamt) { in CSlli()
1401 void Riscv64Assembler::CMv(XRegister rd, XRegister rs2) { in CMv()
1408 void Riscv64Assembler::CAdd(XRegister rd, XRegister rs2) { in CAdd()
1559 void Riscv64Assembler::AddUw(XRegister rd, XRegister rs1, XRegister rs2) { in AddUw()
1564 void Riscv64Assembler::Sh1Add(XRegister rd, XRegister rs1, XRegister rs2) { in Sh1Add()
1569 void Riscv64Assembler::Sh1AddUw(XRegister rd, XRegister rs1, XRegister rs2) { in Sh1AddUw()
1574 void Riscv64Assembler::Sh2Add(XRegister rd, XRegister rs1, XRegister rs2) { in Sh2Add()
1579 void Riscv64Assembler::Sh2AddUw(XRegister rd, XRegister rs1, XRegister rs2) { in Sh2AddUw()
1584 void Riscv64Assembler::Sh3Add(XRegister rd, XRegister rs1, XRegister rs2) { in Sh3Add()
1589 void Riscv64Assembler::Sh3AddUw(XRegister rd, XRegister rs1, XRegister rs2) { in Sh3AddUw()
1594 void Riscv64Assembler::SlliUw(XRegister rd, XRegister rs1, int32_t shamt) { in SlliUw()
1603 void Riscv64Assembler::Andn(XRegister rd, XRegister rs1, XRegister rs2) { in Andn()
1608 void Riscv64Assembler::Orn(XRegister rd, XRegister rs1, XRegister rs2) { in Orn()
1613 void Riscv64Assembler::Xnor(XRegister rd, XRegister rs1, XRegister rs2) { in Xnor()
1618 void Riscv64Assembler::Clz(XRegister rd, XRegister rs1) { in Clz()
1623 void Riscv64Assembler::Clzw(XRegister rd, XRegister rs1) { in Clzw()
1628 void Riscv64Assembler::Ctz(XRegister rd, XRegister rs1) { in Ctz()
1633 void Riscv64Assembler::Ctzw(XRegister rd, XRegister rs1) { in Ctzw()
1638 void Riscv64Assembler::Cpop(XRegister rd, XRegister rs1) { in Cpop()
1643 void Riscv64Assembler::Cpopw(XRegister rd, XRegister rs1) { in Cpopw()
1648 void Riscv64Assembler::Min(XRegister rd, XRegister rs1, XRegister rs2) { in Min()
1653 void Riscv64Assembler::Minu(XRegister rd, XRegister rs1, XRegister rs2) { in Minu()
1658 void Riscv64Assembler::Max(XRegister rd, XRegister rs1, XRegister rs2) { in Max()
1663 void Riscv64Assembler::Maxu(XRegister rd, XRegister rs1, XRegister rs2) { in Maxu()
1668 void Riscv64Assembler::Rol(XRegister rd, XRegister rs1, XRegister rs2) { in Rol()
1673 void Riscv64Assembler::Rolw(XRegister rd, XRegister rs1, XRegister rs2) { in Rolw()
1678 void Riscv64Assembler::Ror(XRegister rd, XRegister rs1, XRegister rs2) { in Ror()
1683 void Riscv64Assembler::Rorw(XRegister rd, XRegister rs1, XRegister rs2) { in Rorw()
1688 void Riscv64Assembler::Rori(XRegister rd, XRegister rs1, int32_t shamt) { in Rori()
1694 void Riscv64Assembler::Roriw(XRegister rd, XRegister rs1, int32_t shamt) { in Roriw()
1700 void Riscv64Assembler::OrcB(XRegister rd, XRegister rs1) { in OrcB()
1705 void Riscv64Assembler::Rev8(XRegister rd, XRegister rs1) { in Rev8()
1710 void Riscv64Assembler::ZbbSextB(XRegister rd, XRegister rs1) { in ZbbSextB()
1715 void Riscv64Assembler::ZbbSextH(XRegister rd, XRegister rs1) { in ZbbSextH()
1720 void Riscv64Assembler::ZbbZextH(XRegister rd, XRegister rs1) { in ZbbZextH()
1729 void Riscv64Assembler::Bclr(XRegister rd, XRegister rs1, XRegister rs2) { in Bclr()
1734 void Riscv64Assembler::Bclri(XRegister rd, XRegister rs1, int32_t shamt) { in Bclri()
1740 void Riscv64Assembler::Bext(XRegister rd, XRegister rs1, XRegister rs2) { in Bext()
1745 void Riscv64Assembler::Bexti(XRegister rd, XRegister rs1, int32_t shamt) { in Bexti()
1751 void Riscv64Assembler::Binv(XRegister rd, XRegister rs1, XRegister rs2) { in Binv()
1756 void Riscv64Assembler::Binvi(XRegister rd, XRegister rs1, int32_t shamt) { in Binvi()
1762 void Riscv64Assembler::Bset(XRegister rd, XRegister rs1, XRegister rs2) { in Bset()
1767 void Riscv64Assembler::Bseti(XRegister rd, XRegister rs1, int32_t shamt) { in Bseti()
1777 void Riscv64Assembler::VSetvli(XRegister rd, XRegister rs1, uint32_t vtypei) { in VSetvli()
1783 void Riscv64Assembler::VSetivli(XRegister rd, uint32_t uimm, uint32_t vtypei) { in VSetivli()
1790 void Riscv64Assembler::VSetvl(XRegister rd, XRegister rs1, XRegister rs2) { in VSetvl()
5861 void Riscv64Assembler::VMv_x_s(XRegister rd, VRegister vs2) { in VMv_x_s()
5867 void Riscv64Assembler::VCpop_m(XRegister rd, VRegister vs2, VM vm) { in VCpop_m()
5873 void Riscv64Assembler::VFirst_m(XRegister rd, VRegister vs2, VM vm) { in VFirst_m()
6162 void Riscv64Assembler::Li(XRegister rd, int64_t imm) { in Li()
6166 void Riscv64Assembler::Mv(XRegister rd, XRegister rs) { Addi(rd, rs, 0); } in Mv()
6168 void Riscv64Assembler::Not(XRegister rd, XRegister rs) { Xori(rd, rs, -1); } in Not()
6170 void Riscv64Assembler::Neg(XRegister rd, XRegister rs) { Sub(rd, Zero, rs); } in Neg()
6172 void Riscv64Assembler::NegW(XRegister rd, XRegister rs) { Subw(rd, Zero, rs); } in NegW()
6174 void Riscv64Assembler::SextB(XRegister rd, XRegister rs) { in SextB()
6187 void Riscv64Assembler::SextH(XRegister rd, XRegister rs) { in SextH()
6200 void Riscv64Assembler::SextW(XRegister rd, XRegister rs) { in SextW()
6212 void Riscv64Assembler::ZextB(XRegister rd, XRegister rs) { in ZextB()
6220 void Riscv64Assembler::ZextH(XRegister rd, XRegister rs) { in ZextH()
6233 void Riscv64Assembler::ZextW(XRegister rd, XRegister rs) { in ZextW()
6246 void Riscv64Assembler::Seqz(XRegister rd, XRegister rs) { Sltiu(rd, rs, 1); } in Seqz()
6248 void Riscv64Assembler::Snez(XRegister rd, XRegister rs) { Sltu(rd, Zero, rs); } in Snez()
6250 void Riscv64Assembler::Sltz(XRegister rd, XRegister rs) { Slt(rd, rs, Zero); } in Sltz()
6252 void Riscv64Assembler::Sgtz(XRegister rd, XRegister rs) { Slt(rd, Zero, rs); } in Sgtz()
6254 void Riscv64Assembler::FMvS(FRegister rd, FRegister rs) { FSgnjS(rd, rs, rs); } in FMvS()
6256 void Riscv64Assembler::FAbsS(FRegister rd, FRegister rs) { FSgnjxS(rd, rs, rs); } in FAbsS()
6258 void Riscv64Assembler::FNegS(FRegister rd, FRegister rs) { FSgnjnS(rd, rs, rs); } in FNegS()
6260 void Riscv64Assembler::FMvD(FRegister rd, FRegister rs) { FSgnjD(rd, rs, rs); } in FMvD()
6262 void Riscv64Assembler::FAbsD(FRegister rd, FRegister rs) { FSgnjxD(rd, rs, rs); } in FAbsD()
6264 void Riscv64Assembler::FNegD(FRegister rd, FRegister rs) { FSgnjnD(rd, rs, rs); } in FNegD()
6314 void Riscv64Assembler::Jalr(XRegister rd, XRegister rs) { Jalr(rd, rs, 0); } in Jalr()
6318 void Riscv64Assembler::RdCycle(XRegister rd) { in RdCycle()
6322 void Riscv64Assembler::RdTime(XRegister rd) { in RdTime()
6326 void Riscv64Assembler::RdInstret(XRegister rd) { in RdInstret()
6330 void Riscv64Assembler::Csrr(XRegister rd, uint32_t csr) { in Csrr()
6358 void Riscv64Assembler::Loadb(XRegister rd, XRegister rs1, int32_t offset) { in Loadb()
6362 void Riscv64Assembler::Loadh(XRegister rd, XRegister rs1, int32_t offset) { in Loadh()
6366 void Riscv64Assembler::Loadw(XRegister rd, XRegister rs1, int32_t offset) { in Loadw()
6370 void Riscv64Assembler::Loadd(XRegister rd, XRegister rs1, int32_t offset) { in Loadd()
6374 void Riscv64Assembler::Loadbu(XRegister rd, XRegister rs1, int32_t offset) { in Loadbu()
6378 void Riscv64Assembler::Loadhu(XRegister rd, XRegister rs1, int32_t offset) { in Loadhu()
6382 void Riscv64Assembler::Loadwu(XRegister rd, XRegister rs1, int32_t offset) { in Loadwu()
6402 void Riscv64Assembler::FLoadw(FRegister rd, XRegister rs1, int32_t offset) { in FLoadw()
6406 void Riscv64Assembler::FLoadd(FRegister rd, XRegister rs1, int32_t offset) { in FLoadd()
6418 void Riscv64Assembler::LoadConst32(XRegister rd, int32_t value) { in LoadConst32()
6423 void Riscv64Assembler::LoadConst64(XRegister rd, int64_t value) { in LoadConst64()
6429 XRegister rd, in AddConstImpl()
6464 void Riscv64Assembler::AddConst32(XRegister rd, XRegister rs1, int32_t value) { in AddConst32()
6467 auto addiw = [&](XRegister rd, XRegister rs1, int32_t value) { Addiw(rd, rs1, value); }; in AddConst32()
6468 auto add_large = [&](XRegister rd, XRegister rs1, int32_t value, XRegister tmp) { in AddConst32()
6475 void Riscv64Assembler::AddConst64(XRegister rd, XRegister rs1, int64_t value) { in AddConst64()
6478 auto addi = [&](XRegister rd, XRegister rs1, int32_t value) { Addi(rd, rs1, value); }; in AddConst64()
6479 auto add_large = [&](XRegister rd, XRegister rs1, int64_t value, XRegister tmp) { in AddConst64()
6555 void Riscv64Assembler::Jal(XRegister rd, Riscv64Label* label, bool is_bare) { in Jal()
6567 void Riscv64Assembler::Loadw(XRegister rd, Literal* literal) { in Loadw()
6572 void Riscv64Assembler::Loadwu(XRegister rd, Literal* literal) { in Loadwu()
6577 void Riscv64Assembler::Loadd(XRegister rd, Literal* literal) { in Loadd()
6582 void Riscv64Assembler::FLoadw(FRegister rd, Literal* literal) { in FLoadw()
6587 void Riscv64Assembler::FLoadd(FRegister rd, Literal* literal) { in FLoadd()
6766 uint32_t location, uint32_t target, XRegister rd, bool is_bare, bool compression_allowed) in Branch()
6807 XRegister rd, in Branch()
6824 FRegister rd, in Branch()
7285 void Riscv64Assembler::Buncond(Riscv64Label* label, XRegister rd, bool is_bare) { in Buncond()
7294 XRegisterOrFRegister rd, in LoadLiteral()
7338 void Riscv64Assembler::LoadLabelAddress(XRegister rd, Riscv64Label* label) { in LoadLabelAddress()
7633 void Riscv64Assembler::LoadFromOffset(XRegister rd, XRegister rs1, int32_t offset) { in LoadFromOffset()
7655 void Riscv64Assembler::FLoadFromOffset(FRegister rd, XRegister rs1, int32_t offset) { in FLoadFromOffset()
7670 void Riscv64Assembler::LoadImmediate(XRegister rd, int64_t imm, bool can_use_tmp) { in LoadImmediate()
7676 auto addi = [&](XRegister rd, XRegister rs, int32_t imm) { Addi(rd, rs, imm); }; in LoadImmediate()
7677 auto addiw = [&](XRegister rd, XRegister rs, int32_t imm) { Addiw(rd, rs, imm); }; in LoadImmediate()
7678 auto slli = [&](XRegister rd, XRegister rs, int32_t imm) { Slli(rd, rs, imm); }; in LoadImmediate()
7679 auto lui = [&](XRegister rd, uint32_t imm20) { Lui(rd, imm20); }; in LoadImmediate()
7690 auto&& lui) { in LoadImmediate()
7718 auto emit_simple_li = [&](XRegister rd, int64_t value) { in LoadImmediate()
7736 auto&& lui) { in LoadImmediate()
7772 auto emit_with_slli_addi = [&](XRegister rd, int64_t value) { in LoadImmediate()