Lines Matching defs:rs1
99 void Riscv64Assembler::Jalr(XRegister rd, XRegister rs1, int32_t offset) { in Jalr()
115 void Riscv64Assembler::Beq(XRegister rs1, XRegister rs2, int32_t offset) { in Beq()
129 void Riscv64Assembler::Bne(XRegister rs1, XRegister rs2, int32_t offset) { in Bne()
143 void Riscv64Assembler::Blt(XRegister rs1, XRegister rs2, int32_t offset) { in Blt()
147 void Riscv64Assembler::Bge(XRegister rs1, XRegister rs2, int32_t offset) { in Bge()
151 void Riscv64Assembler::Bltu(XRegister rs1, XRegister rs2, int32_t offset) { in Bltu()
155 void Riscv64Assembler::Bgeu(XRegister rs1, XRegister rs2, int32_t offset) { in Bgeu()
161 void Riscv64Assembler::Lb(XRegister rd, XRegister rs1, int32_t offset) { in Lb()
166 void Riscv64Assembler::Lh(XRegister rd, XRegister rs1, int32_t offset) { in Lh()
179 void Riscv64Assembler::Lw(XRegister rd, XRegister rs1, int32_t offset) { in Lw()
195 void Riscv64Assembler::Ld(XRegister rd, XRegister rs1, int32_t offset) { in Ld()
211 void Riscv64Assembler::Lbu(XRegister rd, XRegister rs1, int32_t offset) { in Lbu()
224 void Riscv64Assembler::Lhu(XRegister rd, XRegister rs1, int32_t offset) { in Lhu()
237 void Riscv64Assembler::Lwu(XRegister rd, XRegister rs1, int32_t offset) { in Lwu()
244 void Riscv64Assembler::Sb(XRegister rs2, XRegister rs1, int32_t offset) { in Sb()
257 void Riscv64Assembler::Sh(XRegister rs2, XRegister rs1, int32_t offset) { in Sh()
270 void Riscv64Assembler::Sw(XRegister rs2, XRegister rs1, int32_t offset) { in Sw()
286 void Riscv64Assembler::Sd(XRegister rs2, XRegister rs1, int32_t offset) { in Sd()
304 void Riscv64Assembler::Addi(XRegister rd, XRegister rs1, int32_t imm12) { in Addi()
338 void Riscv64Assembler::Slti(XRegister rd, XRegister rs1, int32_t imm12) { in Slti()
342 void Riscv64Assembler::Sltiu(XRegister rd, XRegister rs1, int32_t imm12) { in Sltiu()
346 void Riscv64Assembler::Xori(XRegister rd, XRegister rs1, int32_t imm12) { in Xori()
357 void Riscv64Assembler::Ori(XRegister rd, XRegister rs1, int32_t imm12) { in Ori()
361 void Riscv64Assembler::Andi(XRegister rd, XRegister rs1, int32_t imm12) { in Andi()
373 void Riscv64Assembler::Slli(XRegister rd, XRegister rs1, int32_t shamt) { in Slli()
387 void Riscv64Assembler::Srli(XRegister rd, XRegister rs1, int32_t shamt) { in Srli()
401 void Riscv64Assembler::Srai(XRegister rd, XRegister rs1, int32_t shamt) { in Srai()
416 void Riscv64Assembler::Add(XRegister rd, XRegister rs1, XRegister rs2) { in Add()
451 void Riscv64Assembler::Sub(XRegister rd, XRegister rs1, XRegister rs2) { in Sub()
462 void Riscv64Assembler::Slt(XRegister rd, XRegister rs1, XRegister rs2) { in Slt()
466 void Riscv64Assembler::Sltu(XRegister rd, XRegister rs1, XRegister rs2) { in Sltu()
470 void Riscv64Assembler::Xor(XRegister rd, XRegister rs1, XRegister rs2) { in Xor()
486 void Riscv64Assembler::Or(XRegister rd, XRegister rs1, XRegister rs2) { in Or()
502 void Riscv64Assembler::And(XRegister rd, XRegister rs1, XRegister rs2) { in And()
518 void Riscv64Assembler::Sll(XRegister rd, XRegister rs1, XRegister rs2) { in Sll()
522 void Riscv64Assembler::Srl(XRegister rd, XRegister rs1, XRegister rs2) { in Srl()
526 void Riscv64Assembler::Sra(XRegister rd, XRegister rs1, XRegister rs2) { in Sra()
532 void Riscv64Assembler::Addiw(XRegister rd, XRegister rs1, int32_t imm12) { in Addiw()
548 void Riscv64Assembler::Slliw(XRegister rd, XRegister rs1, int32_t shamt) { in Slliw()
553 void Riscv64Assembler::Srliw(XRegister rd, XRegister rs1, int32_t shamt) { in Srliw()
558 void Riscv64Assembler::Sraiw(XRegister rd, XRegister rs1, int32_t shamt) { in Sraiw()
565 void Riscv64Assembler::Addw(XRegister rd, XRegister rs1, XRegister rs2) { in Addw()
581 void Riscv64Assembler::Subw(XRegister rd, XRegister rs1, XRegister rs2) { in Subw()
592 void Riscv64Assembler::Sllw(XRegister rd, XRegister rs1, XRegister rs2) { in Sllw()
596 void Riscv64Assembler::Srlw(XRegister rd, XRegister rs1, XRegister rs2) { in Srlw()
600 void Riscv64Assembler::Sraw(XRegister rd, XRegister rs1, XRegister rs2) { in Sraw()
647 void Riscv64Assembler::Mul(XRegister rd, XRegister rs1, XRegister rs2) { in Mul()
665 void Riscv64Assembler::Mulh(XRegister rd, XRegister rs1, XRegister rs2) { in Mulh()
670 void Riscv64Assembler::Mulhsu(XRegister rd, XRegister rs1, XRegister rs2) { in Mulhsu()
675 void Riscv64Assembler::Mulhu(XRegister rd, XRegister rs1, XRegister rs2) { in Mulhu()
680 void Riscv64Assembler::Div(XRegister rd, XRegister rs1, XRegister rs2) { in Div()
685 void Riscv64Assembler::Divu(XRegister rd, XRegister rs1, XRegister rs2) { in Divu()
690 void Riscv64Assembler::Rem(XRegister rd, XRegister rs1, XRegister rs2) { in Rem()
695 void Riscv64Assembler::Remu(XRegister rd, XRegister rs1, XRegister rs2) { in Remu()
702 void Riscv64Assembler::Mulw(XRegister rd, XRegister rs1, XRegister rs2) { in Mulw()
707 void Riscv64Assembler::Divw(XRegister rd, XRegister rs1, XRegister rs2) { in Divw()
712 void Riscv64Assembler::Divuw(XRegister rd, XRegister rs1, XRegister rs2) { in Divuw()
717 void Riscv64Assembler::Remw(XRegister rd, XRegister rs1, XRegister rs2) { in Remw()
722 void Riscv64Assembler::Remuw(XRegister rd, XRegister rs1, XRegister rs2) { in Remuw()
731 void Riscv64Assembler::LrW(XRegister rd, XRegister rs1, AqRl aqrl) { in LrW()
737 void Riscv64Assembler::LrD(XRegister rd, XRegister rs1, AqRl aqrl) { in LrD()
743 void Riscv64Assembler::ScW(XRegister rd, XRegister rs2, XRegister rs1, AqRl aqrl) { in ScW()
749 void Riscv64Assembler::ScD(XRegister rd, XRegister rs2, XRegister rs1, AqRl aqrl) { in ScD()
755 void Riscv64Assembler::AmoSwapW(XRegister rd, XRegister rs2, XRegister rs1, AqRl aqrl) { in AmoSwapW()
760 void Riscv64Assembler::AmoSwapD(XRegister rd, XRegister rs2, XRegister rs1, AqRl aqrl) { in AmoSwapD()
765 void Riscv64Assembler::AmoAddW(XRegister rd, XRegister rs2, XRegister rs1, AqRl aqrl) { in AmoAddW()
770 void Riscv64Assembler::AmoAddD(XRegister rd, XRegister rs2, XRegister rs1, AqRl aqrl) { in AmoAddD()
775 void Riscv64Assembler::AmoXorW(XRegister rd, XRegister rs2, XRegister rs1, AqRl aqrl) { in AmoXorW()
780 void Riscv64Assembler::AmoXorD(XRegister rd, XRegister rs2, XRegister rs1, AqRl aqrl) { in AmoXorD()
785 void Riscv64Assembler::AmoAndW(XRegister rd, XRegister rs2, XRegister rs1, AqRl aqrl) { in AmoAndW()
790 void Riscv64Assembler::AmoAndD(XRegister rd, XRegister rs2, XRegister rs1, AqRl aqrl) { in AmoAndD()
795 void Riscv64Assembler::AmoOrW(XRegister rd, XRegister rs2, XRegister rs1, AqRl aqrl) { in AmoOrW()
800 void Riscv64Assembler::AmoOrD(XRegister rd, XRegister rs2, XRegister rs1, AqRl aqrl) { in AmoOrD()
805 void Riscv64Assembler::AmoMinW(XRegister rd, XRegister rs2, XRegister rs1, AqRl aqrl) { in AmoMinW()
810 void Riscv64Assembler::AmoMinD(XRegister rd, XRegister rs2, XRegister rs1, AqRl aqrl) { in AmoMinD()
815 void Riscv64Assembler::AmoMaxW(XRegister rd, XRegister rs2, XRegister rs1, AqRl aqrl) { in AmoMaxW()
820 void Riscv64Assembler::AmoMaxD(XRegister rd, XRegister rs2, XRegister rs1, AqRl aqrl) { in AmoMaxD()
825 void Riscv64Assembler::AmoMinuW(XRegister rd, XRegister rs2, XRegister rs1, AqRl aqrl) { in AmoMinuW()
830 void Riscv64Assembler::AmoMinuD(XRegister rd, XRegister rs2, XRegister rs1, AqRl aqrl) { in AmoMinuD()
835 void Riscv64Assembler::AmoMaxuW(XRegister rd, XRegister rs2, XRegister rs1, AqRl aqrl) { in AmoMaxuW()
840 void Riscv64Assembler::AmoMaxuD(XRegister rd, XRegister rs2, XRegister rs1, AqRl aqrl) { in AmoMaxuD()
851 void Riscv64Assembler::Csrrw(XRegister rd, uint32_t csr, XRegister rs1) { in Csrrw()
856 void Riscv64Assembler::Csrrs(XRegister rd, uint32_t csr, XRegister rs1) { in Csrrs()
861 void Riscv64Assembler::Csrrc(XRegister rd, uint32_t csr, XRegister rs1) { in Csrrc()
887 void Riscv64Assembler::FLw(FRegister rd, XRegister rs1, int32_t offset) { in FLw()
892 void Riscv64Assembler::FLd(FRegister rd, XRegister rs1, int32_t offset) { in FLd()
908 void Riscv64Assembler::FSw(FRegister rs2, XRegister rs1, int32_t offset) { in FSw()
913 void Riscv64Assembler::FSd(FRegister rs2, XRegister rs1, int32_t offset) { in FSd()
932 FRegister rd, FRegister rs1, FRegister rs2, FRegister rs3, FPRoundingMode frm) { in FMAddS()
938 FRegister rd, FRegister rs1, FRegister rs2, FRegister rs3, FPRoundingMode frm) { in FMAddD()
944 FRegister rd, FRegister rs1, FRegister rs2, FRegister rs3, FPRoundingMode frm) { in FMSubS()
950 FRegister rd, FRegister rs1, FRegister rs2, FRegister rs3, FPRoundingMode frm) { in FMSubD()
956 FRegister rd, FRegister rs1, FRegister rs2, FRegister rs3, FPRoundingMode frm) { in FNMSubS()
962 FRegister rd, FRegister rs1, FRegister rs2, FRegister rs3, FPRoundingMode frm) { in FNMSubD()
968 FRegister rd, FRegister rs1, FRegister rs2, FRegister rs3, FPRoundingMode frm) { in FNMAddS()
974 FRegister rd, FRegister rs1, FRegister rs2, FRegister rs3, FPRoundingMode frm) { in FNMAddD()
981 void Riscv64Assembler::FAddS(FRegister rd, FRegister rs1, FRegister rs2, FPRoundingMode frm) { in FAddS()
986 void Riscv64Assembler::FAddD(FRegister rd, FRegister rs1, FRegister rs2, FPRoundingMode frm) { in FAddD()
991 void Riscv64Assembler::FSubS(FRegister rd, FRegister rs1, FRegister rs2, FPRoundingMode frm) { in FSubS()
996 void Riscv64Assembler::FSubD(FRegister rd, FRegister rs1, FRegister rs2, FPRoundingMode frm) { in FSubD()
1001 void Riscv64Assembler::FMulS(FRegister rd, FRegister rs1, FRegister rs2, FPRoundingMode frm) { in FMulS()
1006 void Riscv64Assembler::FMulD(FRegister rd, FRegister rs1, FRegister rs2, FPRoundingMode frm) { in FMulD()
1011 void Riscv64Assembler::FDivS(FRegister rd, FRegister rs1, FRegister rs2, FPRoundingMode frm) { in FDivS()
1016 void Riscv64Assembler::FDivD(FRegister rd, FRegister rs1, FRegister rs2, FPRoundingMode frm) { in FDivD()
1021 void Riscv64Assembler::FSqrtS(FRegister rd, FRegister rs1, FPRoundingMode frm) { in FSqrtS()
1026 void Riscv64Assembler::FSqrtD(FRegister rd, FRegister rs1, FPRoundingMode frm) { in FSqrtD()
1031 void Riscv64Assembler::FSgnjS(FRegister rd, FRegister rs1, FRegister rs2) { in FSgnjS()
1036 void Riscv64Assembler::FSgnjD(FRegister rd, FRegister rs1, FRegister rs2) { in FSgnjD()
1041 void Riscv64Assembler::FSgnjnS(FRegister rd, FRegister rs1, FRegister rs2) { in FSgnjnS()
1046 void Riscv64Assembler::FSgnjnD(FRegister rd, FRegister rs1, FRegister rs2) { in FSgnjnD()
1051 void Riscv64Assembler::FSgnjxS(FRegister rd, FRegister rs1, FRegister rs2) { in FSgnjxS()
1056 void Riscv64Assembler::FSgnjxD(FRegister rd, FRegister rs1, FRegister rs2) { in FSgnjxD()
1061 void Riscv64Assembler::FMinS(FRegister rd, FRegister rs1, FRegister rs2) { in FMinS()
1066 void Riscv64Assembler::FMinD(FRegister rd, FRegister rs1, FRegister rs2) { in FMinD()
1071 void Riscv64Assembler::FMaxS(FRegister rd, FRegister rs1, FRegister rs2) { in FMaxS()
1076 void Riscv64Assembler::FMaxD(FRegister rd, FRegister rs1, FRegister rs2) { in FMaxD()
1081 void Riscv64Assembler::FCvtSD(FRegister rd, FRegister rs1, FPRoundingMode frm) { in FCvtSD()
1086 void Riscv64Assembler::FCvtDS(FRegister rd, FRegister rs1, FPRoundingMode frm) { in FCvtDS()
1094 void Riscv64Assembler::FEqS(XRegister rd, FRegister rs1, FRegister rs2) { in FEqS()
1099 void Riscv64Assembler::FEqD(XRegister rd, FRegister rs1, FRegister rs2) { in FEqD()
1104 void Riscv64Assembler::FLtS(XRegister rd, FRegister rs1, FRegister rs2) { in FLtS()
1109 void Riscv64Assembler::FLtD(XRegister rd, FRegister rs1, FRegister rs2) { in FLtD()
1114 void Riscv64Assembler::FLeS(XRegister rd, FRegister rs1, FRegister rs2) { in FLeS()
1119 void Riscv64Assembler::FLeD(XRegister rd, FRegister rs1, FRegister rs2) { in FLeD()
1126 void Riscv64Assembler::FCvtWS(XRegister rd, FRegister rs1, FPRoundingMode frm) { in FCvtWS()
1131 void Riscv64Assembler::FCvtWD(XRegister rd, FRegister rs1, FPRoundingMode frm) { in FCvtWD()
1136 void Riscv64Assembler::FCvtWuS(XRegister rd, FRegister rs1, FPRoundingMode frm) { in FCvtWuS()
1141 void Riscv64Assembler::FCvtWuD(XRegister rd, FRegister rs1, FPRoundingMode frm) { in FCvtWuD()
1146 void Riscv64Assembler::FCvtLS(XRegister rd, FRegister rs1, FPRoundingMode frm) { in FCvtLS()
1151 void Riscv64Assembler::FCvtLD(XRegister rd, FRegister rs1, FPRoundingMode frm) { in FCvtLD()
1156 void Riscv64Assembler::FCvtLuS(XRegister rd, FRegister rs1, FPRoundingMode frm) { in FCvtLuS()
1161 void Riscv64Assembler::FCvtLuD(XRegister rd, FRegister rs1, FPRoundingMode frm) { in FCvtLuD()
1166 void Riscv64Assembler::FCvtSW(FRegister rd, XRegister rs1, FPRoundingMode frm) { in FCvtSW()
1171 void Riscv64Assembler::FCvtDW(FRegister rd, XRegister rs1, FPRoundingMode frm) { in FCvtDW()
1177 void Riscv64Assembler::FCvtSWu(FRegister rd, XRegister rs1, FPRoundingMode frm) { in FCvtSWu()
1182 void Riscv64Assembler::FCvtDWu(FRegister rd, XRegister rs1, FPRoundingMode frm) { in FCvtDWu()
1188 void Riscv64Assembler::FCvtSL(FRegister rd, XRegister rs1, FPRoundingMode frm) { in FCvtSL()
1193 void Riscv64Assembler::FCvtDL(FRegister rd, XRegister rs1, FPRoundingMode frm) { in FCvtDL()
1198 void Riscv64Assembler::FCvtSLu(FRegister rd, XRegister rs1, FPRoundingMode frm) { in FCvtSLu()
1203 void Riscv64Assembler::FCvtDLu(FRegister rd, XRegister rs1, FPRoundingMode frm) { in FCvtDLu()
1210 void Riscv64Assembler::FMvXW(XRegister rd, FRegister rs1) { in FMvXW()
1215 void Riscv64Assembler::FMvXD(XRegister rd, FRegister rs1) { in FMvXD()
1220 void Riscv64Assembler::FMvWX(FRegister rd, XRegister rs1) { in FMvWX()
1225 void Riscv64Assembler::FMvDX(FRegister rd, XRegister rs1) { in FMvDX()
1232 void Riscv64Assembler::FClassS(XRegister rd, FRegister rs1) { in FClassS()
1237 void Riscv64Assembler::FClassD(XRegister rd, FRegister rs1) { in FClassD()
1518 void Riscv64Assembler::CJr(XRegister rs1) { in CJr()
1524 void Riscv64Assembler::CJalr(XRegister rs1) { in CJalr()
1559 void Riscv64Assembler::AddUw(XRegister rd, XRegister rs1, XRegister rs2) { in AddUw()
1564 void Riscv64Assembler::Sh1Add(XRegister rd, XRegister rs1, XRegister rs2) { in Sh1Add()
1569 void Riscv64Assembler::Sh1AddUw(XRegister rd, XRegister rs1, XRegister rs2) { in Sh1AddUw()
1574 void Riscv64Assembler::Sh2Add(XRegister rd, XRegister rs1, XRegister rs2) { in Sh2Add()
1579 void Riscv64Assembler::Sh2AddUw(XRegister rd, XRegister rs1, XRegister rs2) { in Sh2AddUw()
1584 void Riscv64Assembler::Sh3Add(XRegister rd, XRegister rs1, XRegister rs2) { in Sh3Add()
1589 void Riscv64Assembler::Sh3AddUw(XRegister rd, XRegister rs1, XRegister rs2) { in Sh3AddUw()
1594 void Riscv64Assembler::SlliUw(XRegister rd, XRegister rs1, int32_t shamt) { in SlliUw()
1603 void Riscv64Assembler::Andn(XRegister rd, XRegister rs1, XRegister rs2) { in Andn()
1608 void Riscv64Assembler::Orn(XRegister rd, XRegister rs1, XRegister rs2) { in Orn()
1613 void Riscv64Assembler::Xnor(XRegister rd, XRegister rs1, XRegister rs2) { in Xnor()
1618 void Riscv64Assembler::Clz(XRegister rd, XRegister rs1) { in Clz()
1623 void Riscv64Assembler::Clzw(XRegister rd, XRegister rs1) { in Clzw()
1628 void Riscv64Assembler::Ctz(XRegister rd, XRegister rs1) { in Ctz()
1633 void Riscv64Assembler::Ctzw(XRegister rd, XRegister rs1) { in Ctzw()
1638 void Riscv64Assembler::Cpop(XRegister rd, XRegister rs1) { in Cpop()
1643 void Riscv64Assembler::Cpopw(XRegister rd, XRegister rs1) { in Cpopw()
1648 void Riscv64Assembler::Min(XRegister rd, XRegister rs1, XRegister rs2) { in Min()
1653 void Riscv64Assembler::Minu(XRegister rd, XRegister rs1, XRegister rs2) { in Minu()
1658 void Riscv64Assembler::Max(XRegister rd, XRegister rs1, XRegister rs2) { in Max()
1663 void Riscv64Assembler::Maxu(XRegister rd, XRegister rs1, XRegister rs2) { in Maxu()
1668 void Riscv64Assembler::Rol(XRegister rd, XRegister rs1, XRegister rs2) { in Rol()
1673 void Riscv64Assembler::Rolw(XRegister rd, XRegister rs1, XRegister rs2) { in Rolw()
1678 void Riscv64Assembler::Ror(XRegister rd, XRegister rs1, XRegister rs2) { in Ror()
1683 void Riscv64Assembler::Rorw(XRegister rd, XRegister rs1, XRegister rs2) { in Rorw()
1688 void Riscv64Assembler::Rori(XRegister rd, XRegister rs1, int32_t shamt) { in Rori()
1694 void Riscv64Assembler::Roriw(XRegister rd, XRegister rs1, int32_t shamt) { in Roriw()
1700 void Riscv64Assembler::OrcB(XRegister rd, XRegister rs1) { in OrcB()
1705 void Riscv64Assembler::Rev8(XRegister rd, XRegister rs1) { in Rev8()
1710 void Riscv64Assembler::ZbbSextB(XRegister rd, XRegister rs1) { in ZbbSextB()
1715 void Riscv64Assembler::ZbbSextH(XRegister rd, XRegister rs1) { in ZbbSextH()
1720 void Riscv64Assembler::ZbbZextH(XRegister rd, XRegister rs1) { in ZbbZextH()
1729 void Riscv64Assembler::Bclr(XRegister rd, XRegister rs1, XRegister rs2) { in Bclr()
1734 void Riscv64Assembler::Bclri(XRegister rd, XRegister rs1, int32_t shamt) { in Bclri()
1740 void Riscv64Assembler::Bext(XRegister rd, XRegister rs1, XRegister rs2) { in Bext()
1745 void Riscv64Assembler::Bexti(XRegister rd, XRegister rs1, int32_t shamt) { in Bexti()
1751 void Riscv64Assembler::Binv(XRegister rd, XRegister rs1, XRegister rs2) { in Binv()
1756 void Riscv64Assembler::Binvi(XRegister rd, XRegister rs1, int32_t shamt) { in Binvi()
1762 void Riscv64Assembler::Bset(XRegister rd, XRegister rs1, XRegister rs2) { in Bset()
1767 void Riscv64Assembler::Bseti(XRegister rd, XRegister rs1, int32_t shamt) { in Bseti()
1777 void Riscv64Assembler::VSetvli(XRegister rd, XRegister rs1, uint32_t vtypei) { in VSetvli()
1790 void Riscv64Assembler::VSetvl(XRegister rd, XRegister rs1, XRegister rs2) { in VSetvl()
1799 void Riscv64Assembler::VLe8(VRegister vd, XRegister rs1, VM vm) { in VLe8()
1806 void Riscv64Assembler::VLe16(VRegister vd, XRegister rs1, VM vm) { in VLe16()
1813 void Riscv64Assembler::VLe32(VRegister vd, XRegister rs1, VM vm) { in VLe32()
1820 void Riscv64Assembler::VLe64(VRegister vd, XRegister rs1, VM vm) { in VLe64()
1827 void Riscv64Assembler::VSe8(VRegister vs3, XRegister rs1, VM vm) { in VSe8()
1833 void Riscv64Assembler::VSe16(VRegister vs3, XRegister rs1, VM vm) { in VSe16()
1839 void Riscv64Assembler::VSe32(VRegister vs3, XRegister rs1, VM vm) { in VSe32()
1845 void Riscv64Assembler::VSe64(VRegister vs3, XRegister rs1, VM vm) { in VSe64()
1851 void Riscv64Assembler::VLm(VRegister vd, XRegister rs1) { in VLm()
1857 void Riscv64Assembler::VSm(VRegister vs3, XRegister rs1) { in VSm()
1863 void Riscv64Assembler::VLe8ff(VRegister vd, XRegister rs1) { in VLe8ff()
1869 void Riscv64Assembler::VLe16ff(VRegister vd, XRegister rs1) { in VLe16ff()
1875 void Riscv64Assembler::VLe32ff(VRegister vd, XRegister rs1) { in VLe32ff()
1881 void Riscv64Assembler::VLe64ff(VRegister vd, XRegister rs1) { in VLe64ff()
1887 void Riscv64Assembler::VLse8(VRegister vd, XRegister rs1, XRegister rs2, VM vm) { in VLse8()
1894 void Riscv64Assembler::VLse16(VRegister vd, XRegister rs1, XRegister rs2, VM vm) { in VLse16()
1901 void Riscv64Assembler::VLse32(VRegister vd, XRegister rs1, XRegister rs2, VM vm) { in VLse32()
1908 void Riscv64Assembler::VLse64(VRegister vd, XRegister rs1, XRegister rs2, VM vm) { in VLse64()
1915 void Riscv64Assembler::VSse8(VRegister vs3, XRegister rs1, XRegister rs2, VM vm) { in VSse8()
1921 void Riscv64Assembler::VSse16(VRegister vs3, XRegister rs1, XRegister rs2, VM vm) { in VSse16()
1927 void Riscv64Assembler::VSse32(VRegister vs3, XRegister rs1, XRegister rs2, VM vm) { in VSse32()
1933 void Riscv64Assembler::VSse64(VRegister vs3, XRegister rs1, XRegister rs2, VM vm) { in VSse64()
1939 void Riscv64Assembler::VLoxei8(VRegister vd, XRegister rs1, VRegister vs2, VM vm) { in VLoxei8()
1946 void Riscv64Assembler::VLoxei16(VRegister vd, XRegister rs1, VRegister vs2, VM vm) { in VLoxei16()
1953 void Riscv64Assembler::VLoxei32(VRegister vd, XRegister rs1, VRegister vs2, VM vm) { in VLoxei32()
1960 void Riscv64Assembler::VLoxei64(VRegister vd, XRegister rs1, VRegister vs2, VM vm) { in VLoxei64()
1967 void Riscv64Assembler::VLuxei8(VRegister vd, XRegister rs1, VRegister vs2, VM vm) { in VLuxei8()
1974 void Riscv64Assembler::VLuxei16(VRegister vd, XRegister rs1, VRegister vs2, VM vm) { in VLuxei16()
1981 void Riscv64Assembler::VLuxei32(VRegister vd, XRegister rs1, VRegister vs2, VM vm) { in VLuxei32()
1988 void Riscv64Assembler::VLuxei64(VRegister vd, XRegister rs1, VRegister vs2, VM vm) { in VLuxei64()
1995 void Riscv64Assembler::VSoxei8(VRegister vs3, XRegister rs1, VRegister vs2, VM vm) { in VSoxei8()
2001 void Riscv64Assembler::VSoxei16(VRegister vs3, XRegister rs1, VRegister vs2, VM vm) { in VSoxei16()
2007 void Riscv64Assembler::VSoxei32(VRegister vs3, XRegister rs1, VRegister vs2, VM vm) { in VSoxei32()
2013 void Riscv64Assembler::VSoxei64(VRegister vs3, XRegister rs1, VRegister vs2, VM vm) { in VSoxei64()
2019 void Riscv64Assembler::VSuxei8(VRegister vs3, XRegister rs1, VRegister vs2, VM vm) { in VSuxei8()
2025 void Riscv64Assembler::VSuxei16(VRegister vs3, XRegister rs1, VRegister vs2, VM vm) { in VSuxei16()
2031 void Riscv64Assembler::VSuxei32(VRegister vs3, XRegister rs1, VRegister vs2, VM vm) { in VSuxei32()
2037 void Riscv64Assembler::VSuxei64(VRegister vs3, XRegister rs1, VRegister vs2, VM vm) { in VSuxei64()
2043 void Riscv64Assembler::VLseg2e8(VRegister vd, XRegister rs1, VM vm) { in VLseg2e8()
2050 void Riscv64Assembler::VLseg2e16(VRegister vd, XRegister rs1, VM vm) { in VLseg2e16()
2057 void Riscv64Assembler::VLseg2e32(VRegister vd, XRegister rs1, VM vm) { in VLseg2e32()
2064 void Riscv64Assembler::VLseg2e64(VRegister vd, XRegister rs1, VM vm) { in VLseg2e64()
2071 void Riscv64Assembler::VLseg3e8(VRegister vd, XRegister rs1, VM vm) { in VLseg3e8()
2078 void Riscv64Assembler::VLseg3e16(VRegister vd, XRegister rs1, VM vm) { in VLseg3e16()
2085 void Riscv64Assembler::VLseg3e32(VRegister vd, XRegister rs1, VM vm) { in VLseg3e32()
2092 void Riscv64Assembler::VLseg3e64(VRegister vd, XRegister rs1, VM vm) { in VLseg3e64()
2099 void Riscv64Assembler::VLseg4e8(VRegister vd, XRegister rs1, VM vm) { in VLseg4e8()
2106 void Riscv64Assembler::VLseg4e16(VRegister vd, XRegister rs1, VM vm) { in VLseg4e16()
2113 void Riscv64Assembler::VLseg4e32(VRegister vd, XRegister rs1, VM vm) { in VLseg4e32()
2120 void Riscv64Assembler::VLseg4e64(VRegister vd, XRegister rs1, VM vm) { in VLseg4e64()
2127 void Riscv64Assembler::VLseg5e8(VRegister vd, XRegister rs1, VM vm) { in VLseg5e8()
2134 void Riscv64Assembler::VLseg5e16(VRegister vd, XRegister rs1, VM vm) { in VLseg5e16()
2141 void Riscv64Assembler::VLseg5e32(VRegister vd, XRegister rs1, VM vm) { in VLseg5e32()
2148 void Riscv64Assembler::VLseg5e64(VRegister vd, XRegister rs1, VM vm) { in VLseg5e64()
2155 void Riscv64Assembler::VLseg6e8(VRegister vd, XRegister rs1, VM vm) { in VLseg6e8()
2162 void Riscv64Assembler::VLseg6e16(VRegister vd, XRegister rs1, VM vm) { in VLseg6e16()
2169 void Riscv64Assembler::VLseg6e32(VRegister vd, XRegister rs1, VM vm) { in VLseg6e32()
2176 void Riscv64Assembler::VLseg6e64(VRegister vd, XRegister rs1, VM vm) { in VLseg6e64()
2183 void Riscv64Assembler::VLseg7e8(VRegister vd, XRegister rs1, VM vm) { in VLseg7e8()
2190 void Riscv64Assembler::VLseg7e16(VRegister vd, XRegister rs1, VM vm) { in VLseg7e16()
2197 void Riscv64Assembler::VLseg7e32(VRegister vd, XRegister rs1, VM vm) { in VLseg7e32()
2204 void Riscv64Assembler::VLseg7e64(VRegister vd, XRegister rs1, VM vm) { in VLseg7e64()
2211 void Riscv64Assembler::VLseg8e8(VRegister vd, XRegister rs1, VM vm) { in VLseg8e8()
2218 void Riscv64Assembler::VLseg8e16(VRegister vd, XRegister rs1, VM vm) { in VLseg8e16()
2225 void Riscv64Assembler::VLseg8e32(VRegister vd, XRegister rs1, VM vm) { in VLseg8e32()
2232 void Riscv64Assembler::VLseg8e64(VRegister vd, XRegister rs1, VM vm) { in VLseg8e64()
2239 void Riscv64Assembler::VSseg2e8(VRegister vs3, XRegister rs1, VM vm) { in VSseg2e8()
2245 void Riscv64Assembler::VSseg2e16(VRegister vs3, XRegister rs1, VM vm) { in VSseg2e16()
2251 void Riscv64Assembler::VSseg2e32(VRegister vs3, XRegister rs1, VM vm) { in VSseg2e32()
2257 void Riscv64Assembler::VSseg2e64(VRegister vs3, XRegister rs1, VM vm) { in VSseg2e64()
2263 void Riscv64Assembler::VSseg3e8(VRegister vs3, XRegister rs1, VM vm) { in VSseg3e8()
2269 void Riscv64Assembler::VSseg3e16(VRegister vs3, XRegister rs1, VM vm) { in VSseg3e16()
2275 void Riscv64Assembler::VSseg3e32(VRegister vs3, XRegister rs1, VM vm) { in VSseg3e32()
2281 void Riscv64Assembler::VSseg3e64(VRegister vs3, XRegister rs1, VM vm) { in VSseg3e64()
2287 void Riscv64Assembler::VSseg4e8(VRegister vs3, XRegister rs1, VM vm) { in VSseg4e8()
2293 void Riscv64Assembler::VSseg4e16(VRegister vs3, XRegister rs1, VM vm) { in VSseg4e16()
2299 void Riscv64Assembler::VSseg4e32(VRegister vs3, XRegister rs1, VM vm) { in VSseg4e32()
2305 void Riscv64Assembler::VSseg4e64(VRegister vs3, XRegister rs1, VM vm) { in VSseg4e64()
2311 void Riscv64Assembler::VSseg5e8(VRegister vs3, XRegister rs1, VM vm) { in VSseg5e8()
2317 void Riscv64Assembler::VSseg5e16(VRegister vs3, XRegister rs1, VM vm) { in VSseg5e16()
2323 void Riscv64Assembler::VSseg5e32(VRegister vs3, XRegister rs1, VM vm) { in VSseg5e32()
2329 void Riscv64Assembler::VSseg5e64(VRegister vs3, XRegister rs1, VM vm) { in VSseg5e64()
2335 void Riscv64Assembler::VSseg6e8(VRegister vs3, XRegister rs1, VM vm) { in VSseg6e8()
2341 void Riscv64Assembler::VSseg6e16(VRegister vs3, XRegister rs1, VM vm) { in VSseg6e16()
2347 void Riscv64Assembler::VSseg6e32(VRegister vs3, XRegister rs1, VM vm) { in VSseg6e32()
2353 void Riscv64Assembler::VSseg6e64(VRegister vs3, XRegister rs1, VM vm) { in VSseg6e64()
2359 void Riscv64Assembler::VSseg7e8(VRegister vs3, XRegister rs1, VM vm) { in VSseg7e8()
2365 void Riscv64Assembler::VSseg7e16(VRegister vs3, XRegister rs1, VM vm) { in VSseg7e16()
2371 void Riscv64Assembler::VSseg7e32(VRegister vs3, XRegister rs1, VM vm) { in VSseg7e32()
2377 void Riscv64Assembler::VSseg7e64(VRegister vs3, XRegister rs1, VM vm) { in VSseg7e64()
2383 void Riscv64Assembler::VSseg8e8(VRegister vs3, XRegister rs1, VM vm) { in VSseg8e8()
2389 void Riscv64Assembler::VSseg8e16(VRegister vs3, XRegister rs1, VM vm) { in VSseg8e16()
2395 void Riscv64Assembler::VSseg8e32(VRegister vs3, XRegister rs1, VM vm) { in VSseg8e32()
2401 void Riscv64Assembler::VSseg8e64(VRegister vs3, XRegister rs1, VM vm) { in VSseg8e64()
2407 void Riscv64Assembler::VLseg2e8ff(VRegister vd, XRegister rs1, VM vm) { in VLseg2e8ff()
2414 void Riscv64Assembler::VLseg2e16ff(VRegister vd, XRegister rs1, VM vm) { in VLseg2e16ff()
2421 void Riscv64Assembler::VLseg2e32ff(VRegister vd, XRegister rs1, VM vm) { in VLseg2e32ff()
2428 void Riscv64Assembler::VLseg2e64ff(VRegister vd, XRegister rs1, VM vm) { in VLseg2e64ff()
2435 void Riscv64Assembler::VLseg3e8ff(VRegister vd, XRegister rs1, VM vm) { in VLseg3e8ff()
2442 void Riscv64Assembler::VLseg3e16ff(VRegister vd, XRegister rs1, VM vm) { in VLseg3e16ff()
2449 void Riscv64Assembler::VLseg3e32ff(VRegister vd, XRegister rs1, VM vm) { in VLseg3e32ff()
2456 void Riscv64Assembler::VLseg3e64ff(VRegister vd, XRegister rs1, VM vm) { in VLseg3e64ff()
2463 void Riscv64Assembler::VLseg4e8ff(VRegister vd, XRegister rs1, VM vm) { in VLseg4e8ff()
2470 void Riscv64Assembler::VLseg4e16ff(VRegister vd, XRegister rs1, VM vm) { in VLseg4e16ff()
2477 void Riscv64Assembler::VLseg4e32ff(VRegister vd, XRegister rs1, VM vm) { in VLseg4e32ff()
2484 void Riscv64Assembler::VLseg4e64ff(VRegister vd, XRegister rs1, VM vm) { in VLseg4e64ff()
2491 void Riscv64Assembler::VLseg5e8ff(VRegister vd, XRegister rs1, VM vm) { in VLseg5e8ff()
2498 void Riscv64Assembler::VLseg5e16ff(VRegister vd, XRegister rs1, VM vm) { in VLseg5e16ff()
2505 void Riscv64Assembler::VLseg5e32ff(VRegister vd, XRegister rs1, VM vm) { in VLseg5e32ff()
2512 void Riscv64Assembler::VLseg5e64ff(VRegister vd, XRegister rs1, VM vm) { in VLseg5e64ff()
2519 void Riscv64Assembler::VLseg6e8ff(VRegister vd, XRegister rs1, VM vm) { in VLseg6e8ff()
2526 void Riscv64Assembler::VLseg6e16ff(VRegister vd, XRegister rs1, VM vm) { in VLseg6e16ff()
2533 void Riscv64Assembler::VLseg6e32ff(VRegister vd, XRegister rs1, VM vm) { in VLseg6e32ff()
2540 void Riscv64Assembler::VLseg6e64ff(VRegister vd, XRegister rs1, VM vm) { in VLseg6e64ff()
2547 void Riscv64Assembler::VLseg7e8ff(VRegister vd, XRegister rs1, VM vm) { in VLseg7e8ff()
2554 void Riscv64Assembler::VLseg7e16ff(VRegister vd, XRegister rs1, VM vm) { in VLseg7e16ff()
2561 void Riscv64Assembler::VLseg7e32ff(VRegister vd, XRegister rs1, VM vm) { in VLseg7e32ff()
2568 void Riscv64Assembler::VLseg7e64ff(VRegister vd, XRegister rs1, VM vm) { in VLseg7e64ff()
2575 void Riscv64Assembler::VLseg8e8ff(VRegister vd, XRegister rs1, VM vm) { in VLseg8e8ff()
2582 void Riscv64Assembler::VLseg8e16ff(VRegister vd, XRegister rs1, VM vm) { in VLseg8e16ff()
2589 void Riscv64Assembler::VLseg8e32ff(VRegister vd, XRegister rs1, VM vm) { in VLseg8e32ff()
2596 void Riscv64Assembler::VLseg8e64ff(VRegister vd, XRegister rs1, VM vm) { in VLseg8e64ff()
2603 void Riscv64Assembler::VLsseg2e8(VRegister vd, XRegister rs1, XRegister rs2, VM vm) { in VLsseg2e8()
2610 void Riscv64Assembler::VLsseg2e16(VRegister vd, XRegister rs1, XRegister rs2, VM vm) { in VLsseg2e16()
2617 void Riscv64Assembler::VLsseg2e32(VRegister vd, XRegister rs1, XRegister rs2, VM vm) { in VLsseg2e32()
2624 void Riscv64Assembler::VLsseg2e64(VRegister vd, XRegister rs1, XRegister rs2, VM vm) { in VLsseg2e64()
2631 void Riscv64Assembler::VLsseg3e8(VRegister vd, XRegister rs1, XRegister rs2, VM vm) { in VLsseg3e8()
2638 void Riscv64Assembler::VLsseg3e16(VRegister vd, XRegister rs1, XRegister rs2, VM vm) { in VLsseg3e16()
2645 void Riscv64Assembler::VLsseg3e32(VRegister vd, XRegister rs1, XRegister rs2, VM vm) { in VLsseg3e32()
2652 void Riscv64Assembler::VLsseg3e64(VRegister vd, XRegister rs1, XRegister rs2, VM vm) { in VLsseg3e64()
2659 void Riscv64Assembler::VLsseg4e8(VRegister vd, XRegister rs1, XRegister rs2, VM vm) { in VLsseg4e8()
2666 void Riscv64Assembler::VLsseg4e16(VRegister vd, XRegister rs1, XRegister rs2, VM vm) { in VLsseg4e16()
2673 void Riscv64Assembler::VLsseg4e32(VRegister vd, XRegister rs1, XRegister rs2, VM vm) { in VLsseg4e32()
2680 void Riscv64Assembler::VLsseg4e64(VRegister vd, XRegister rs1, XRegister rs2, VM vm) { in VLsseg4e64()
2687 void Riscv64Assembler::VLsseg5e8(VRegister vd, XRegister rs1, XRegister rs2, VM vm) { in VLsseg5e8()
2694 void Riscv64Assembler::VLsseg5e16(VRegister vd, XRegister rs1, XRegister rs2, VM vm) { in VLsseg5e16()
2701 void Riscv64Assembler::VLsseg5e32(VRegister vd, XRegister rs1, XRegister rs2, VM vm) { in VLsseg5e32()
2708 void Riscv64Assembler::VLsseg5e64(VRegister vd, XRegister rs1, XRegister rs2, VM vm) { in VLsseg5e64()
2715 void Riscv64Assembler::VLsseg6e8(VRegister vd, XRegister rs1, XRegister rs2, VM vm) { in VLsseg6e8()
2722 void Riscv64Assembler::VLsseg6e16(VRegister vd, XRegister rs1, XRegister rs2, VM vm) { in VLsseg6e16()
2729 void Riscv64Assembler::VLsseg6e32(VRegister vd, XRegister rs1, XRegister rs2, VM vm) { in VLsseg6e32()
2736 void Riscv64Assembler::VLsseg6e64(VRegister vd, XRegister rs1, XRegister rs2, VM vm) { in VLsseg6e64()
2743 void Riscv64Assembler::VLsseg7e8(VRegister vd, XRegister rs1, XRegister rs2, VM vm) { in VLsseg7e8()
2750 void Riscv64Assembler::VLsseg7e16(VRegister vd, XRegister rs1, XRegister rs2, VM vm) { in VLsseg7e16()
2757 void Riscv64Assembler::VLsseg7e32(VRegister vd, XRegister rs1, XRegister rs2, VM vm) { in VLsseg7e32()
2764 void Riscv64Assembler::VLsseg7e64(VRegister vd, XRegister rs1, XRegister rs2, VM vm) { in VLsseg7e64()
2771 void Riscv64Assembler::VLsseg8e8(VRegister vd, XRegister rs1, XRegister rs2, VM vm) { in VLsseg8e8()
2778 void Riscv64Assembler::VLsseg8e16(VRegister vd, XRegister rs1, XRegister rs2, VM vm) { in VLsseg8e16()
2785 void Riscv64Assembler::VLsseg8e32(VRegister vd, XRegister rs1, XRegister rs2, VM vm) { in VLsseg8e32()
2792 void Riscv64Assembler::VLsseg8e64(VRegister vd, XRegister rs1, XRegister rs2, VM vm) { in VLsseg8e64()
2799 void Riscv64Assembler::VSsseg2e8(VRegister vs3, XRegister rs1, XRegister rs2, VM vm) { in VSsseg2e8()
2805 void Riscv64Assembler::VSsseg2e16(VRegister vs3, XRegister rs1, XRegister rs2, VM vm) { in VSsseg2e16()
2811 void Riscv64Assembler::VSsseg2e32(VRegister vs3, XRegister rs1, XRegister rs2, VM vm) { in VSsseg2e32()
2817 void Riscv64Assembler::VSsseg2e64(VRegister vs3, XRegister rs1, XRegister rs2, VM vm) { in VSsseg2e64()
2823 void Riscv64Assembler::VSsseg3e8(VRegister vs3, XRegister rs1, XRegister rs2, VM vm) { in VSsseg3e8()
2829 void Riscv64Assembler::VSsseg3e16(VRegister vs3, XRegister rs1, XRegister rs2, VM vm) { in VSsseg3e16()
2835 void Riscv64Assembler::VSsseg3e32(VRegister vs3, XRegister rs1, XRegister rs2, VM vm) { in VSsseg3e32()
2841 void Riscv64Assembler::VSsseg3e64(VRegister vs3, XRegister rs1, XRegister rs2, VM vm) { in VSsseg3e64()
2847 void Riscv64Assembler::VSsseg4e8(VRegister vs3, XRegister rs1, XRegister rs2, VM vm) { in VSsseg4e8()
2853 void Riscv64Assembler::VSsseg4e16(VRegister vs3, XRegister rs1, XRegister rs2, VM vm) { in VSsseg4e16()
2859 void Riscv64Assembler::VSsseg4e32(VRegister vs3, XRegister rs1, XRegister rs2, VM vm) { in VSsseg4e32()
2865 void Riscv64Assembler::VSsseg4e64(VRegister vs3, XRegister rs1, XRegister rs2, VM vm) { in VSsseg4e64()
2871 void Riscv64Assembler::VSsseg5e8(VRegister vs3, XRegister rs1, XRegister rs2, VM vm) { in VSsseg5e8()
2877 void Riscv64Assembler::VSsseg5e16(VRegister vs3, XRegister rs1, XRegister rs2, VM vm) { in VSsseg5e16()
2883 void Riscv64Assembler::VSsseg5e32(VRegister vs3, XRegister rs1, XRegister rs2, VM vm) { in VSsseg5e32()
2889 void Riscv64Assembler::VSsseg5e64(VRegister vs3, XRegister rs1, XRegister rs2, VM vm) { in VSsseg5e64()
2895 void Riscv64Assembler::VSsseg6e8(VRegister vs3, XRegister rs1, XRegister rs2, VM vm) { in VSsseg6e8()
2901 void Riscv64Assembler::VSsseg6e16(VRegister vs3, XRegister rs1, XRegister rs2, VM vm) { in VSsseg6e16()
2907 void Riscv64Assembler::VSsseg6e32(VRegister vs3, XRegister rs1, XRegister rs2, VM vm) { in VSsseg6e32()
2913 void Riscv64Assembler::VSsseg6e64(VRegister vs3, XRegister rs1, XRegister rs2, VM vm) { in VSsseg6e64()
2919 void Riscv64Assembler::VSsseg7e8(VRegister vs3, XRegister rs1, XRegister rs2, VM vm) { in VSsseg7e8()
2925 void Riscv64Assembler::VSsseg7e16(VRegister vs3, XRegister rs1, XRegister rs2, VM vm) { in VSsseg7e16()
2931 void Riscv64Assembler::VSsseg7e32(VRegister vs3, XRegister rs1, XRegister rs2, VM vm) { in VSsseg7e32()
2937 void Riscv64Assembler::VSsseg7e64(VRegister vs3, XRegister rs1, XRegister rs2, VM vm) { in VSsseg7e64()
2943 void Riscv64Assembler::VSsseg8e8(VRegister vs3, XRegister rs1, XRegister rs2, VM vm) { in VSsseg8e8()
2949 void Riscv64Assembler::VSsseg8e16(VRegister vs3, XRegister rs1, XRegister rs2, VM vm) { in VSsseg8e16()
2955 void Riscv64Assembler::VSsseg8e32(VRegister vs3, XRegister rs1, XRegister rs2, VM vm) { in VSsseg8e32()
2961 void Riscv64Assembler::VSsseg8e64(VRegister vs3, XRegister rs1, XRegister rs2, VM vm) { in VSsseg8e64()
2967 void Riscv64Assembler::VLuxseg2ei8(VRegister vd, XRegister rs1, VRegister vs2, VM vm) { in VLuxseg2ei8()
2974 void Riscv64Assembler::VLuxseg2ei16(VRegister vd, XRegister rs1, VRegister vs2, VM vm) { in VLuxseg2ei16()
2981 void Riscv64Assembler::VLuxseg2ei32(VRegister vd, XRegister rs1, VRegister vs2, VM vm) { in VLuxseg2ei32()
2988 void Riscv64Assembler::VLuxseg2ei64(VRegister vd, XRegister rs1, VRegister vs2, VM vm) { in VLuxseg2ei64()
2995 void Riscv64Assembler::VLuxseg3ei8(VRegister vd, XRegister rs1, VRegister vs2, VM vm) { in VLuxseg3ei8()
3002 void Riscv64Assembler::VLuxseg3ei16(VRegister vd, XRegister rs1, VRegister vs2, VM vm) { in VLuxseg3ei16()
3009 void Riscv64Assembler::VLuxseg3ei32(VRegister vd, XRegister rs1, VRegister vs2, VM vm) { in VLuxseg3ei32()
3016 void Riscv64Assembler::VLuxseg3ei64(VRegister vd, XRegister rs1, VRegister vs2, VM vm) { in VLuxseg3ei64()
3023 void Riscv64Assembler::VLuxseg4ei8(VRegister vd, XRegister rs1, VRegister vs2, VM vm) { in VLuxseg4ei8()
3030 void Riscv64Assembler::VLuxseg4ei16(VRegister vd, XRegister rs1, VRegister vs2, VM vm) { in VLuxseg4ei16()
3037 void Riscv64Assembler::VLuxseg4ei32(VRegister vd, XRegister rs1, VRegister vs2, VM vm) { in VLuxseg4ei32()
3044 void Riscv64Assembler::VLuxseg4ei64(VRegister vd, XRegister rs1, VRegister vs2, VM vm) { in VLuxseg4ei64()
3051 void Riscv64Assembler::VLuxseg5ei8(VRegister vd, XRegister rs1, VRegister vs2, VM vm) { in VLuxseg5ei8()
3058 void Riscv64Assembler::VLuxseg5ei16(VRegister vd, XRegister rs1, VRegister vs2, VM vm) { in VLuxseg5ei16()
3065 void Riscv64Assembler::VLuxseg5ei32(VRegister vd, XRegister rs1, VRegister vs2, VM vm) { in VLuxseg5ei32()
3072 void Riscv64Assembler::VLuxseg5ei64(VRegister vd, XRegister rs1, VRegister vs2, VM vm) { in VLuxseg5ei64()
3079 void Riscv64Assembler::VLuxseg6ei8(VRegister vd, XRegister rs1, VRegister vs2, VM vm) { in VLuxseg6ei8()
3086 void Riscv64Assembler::VLuxseg6ei16(VRegister vd, XRegister rs1, VRegister vs2, VM vm) { in VLuxseg6ei16()
3093 void Riscv64Assembler::VLuxseg6ei32(VRegister vd, XRegister rs1, VRegister vs2, VM vm) { in VLuxseg6ei32()
3100 void Riscv64Assembler::VLuxseg6ei64(VRegister vd, XRegister rs1, VRegister vs2, VM vm) { in VLuxseg6ei64()
3107 void Riscv64Assembler::VLuxseg7ei8(VRegister vd, XRegister rs1, VRegister vs2, VM vm) { in VLuxseg7ei8()
3114 void Riscv64Assembler::VLuxseg7ei16(VRegister vd, XRegister rs1, VRegister vs2, VM vm) { in VLuxseg7ei16()
3121 void Riscv64Assembler::VLuxseg7ei32(VRegister vd, XRegister rs1, VRegister vs2, VM vm) { in VLuxseg7ei32()
3128 void Riscv64Assembler::VLuxseg7ei64(VRegister vd, XRegister rs1, VRegister vs2, VM vm) { in VLuxseg7ei64()
3135 void Riscv64Assembler::VLuxseg8ei8(VRegister vd, XRegister rs1, VRegister vs2, VM vm) { in VLuxseg8ei8()
3142 void Riscv64Assembler::VLuxseg8ei16(VRegister vd, XRegister rs1, VRegister vs2, VM vm) { in VLuxseg8ei16()
3149 void Riscv64Assembler::VLuxseg8ei32(VRegister vd, XRegister rs1, VRegister vs2, VM vm) { in VLuxseg8ei32()
3156 void Riscv64Assembler::VLuxseg8ei64(VRegister vd, XRegister rs1, VRegister vs2, VM vm) { in VLuxseg8ei64()
3163 void Riscv64Assembler::VSuxseg2ei8(VRegister vs3, XRegister rs1, VRegister vs2, VM vm) { in VSuxseg2ei8()
3169 void Riscv64Assembler::VSuxseg2ei16(VRegister vs3, XRegister rs1, VRegister vs2, VM vm) { in VSuxseg2ei16()
3175 void Riscv64Assembler::VSuxseg2ei32(VRegister vs3, XRegister rs1, VRegister vs2, VM vm) { in VSuxseg2ei32()
3181 void Riscv64Assembler::VSuxseg2ei64(VRegister vs3, XRegister rs1, VRegister vs2, VM vm) { in VSuxseg2ei64()
3187 void Riscv64Assembler::VSuxseg3ei8(VRegister vs3, XRegister rs1, VRegister vs2, VM vm) { in VSuxseg3ei8()
3193 void Riscv64Assembler::VSuxseg3ei16(VRegister vs3, XRegister rs1, VRegister vs2, VM vm) { in VSuxseg3ei16()
3199 void Riscv64Assembler::VSuxseg3ei32(VRegister vs3, XRegister rs1, VRegister vs2, VM vm) { in VSuxseg3ei32()
3205 void Riscv64Assembler::VSuxseg3ei64(VRegister vs3, XRegister rs1, VRegister vs2, VM vm) { in VSuxseg3ei64()
3211 void Riscv64Assembler::VSuxseg4ei8(VRegister vs3, XRegister rs1, VRegister vs2, VM vm) { in VSuxseg4ei8()
3217 void Riscv64Assembler::VSuxseg4ei16(VRegister vs3, XRegister rs1, VRegister vs2, VM vm) { in VSuxseg4ei16()
3223 void Riscv64Assembler::VSuxseg4ei32(VRegister vs3, XRegister rs1, VRegister vs2, VM vm) { in VSuxseg4ei32()
3229 void Riscv64Assembler::VSuxseg4ei64(VRegister vs3, XRegister rs1, VRegister vs2, VM vm) { in VSuxseg4ei64()
3235 void Riscv64Assembler::VSuxseg5ei8(VRegister vs3, XRegister rs1, VRegister vs2, VM vm) { in VSuxseg5ei8()
3241 void Riscv64Assembler::VSuxseg5ei16(VRegister vs3, XRegister rs1, VRegister vs2, VM vm) { in VSuxseg5ei16()
3247 void Riscv64Assembler::VSuxseg5ei32(VRegister vs3, XRegister rs1, VRegister vs2, VM vm) { in VSuxseg5ei32()
3253 void Riscv64Assembler::VSuxseg5ei64(VRegister vs3, XRegister rs1, VRegister vs2, VM vm) { in VSuxseg5ei64()
3259 void Riscv64Assembler::VSuxseg6ei8(VRegister vs3, XRegister rs1, VRegister vs2, VM vm) { in VSuxseg6ei8()
3265 void Riscv64Assembler::VSuxseg6ei16(VRegister vs3, XRegister rs1, VRegister vs2, VM vm) { in VSuxseg6ei16()
3271 void Riscv64Assembler::VSuxseg6ei32(VRegister vs3, XRegister rs1, VRegister vs2, VM vm) { in VSuxseg6ei32()
3277 void Riscv64Assembler::VSuxseg6ei64(VRegister vs3, XRegister rs1, VRegister vs2, VM vm) { in VSuxseg6ei64()
3283 void Riscv64Assembler::VSuxseg7ei8(VRegister vs3, XRegister rs1, VRegister vs2, VM vm) { in VSuxseg7ei8()
3289 void Riscv64Assembler::VSuxseg7ei16(VRegister vs3, XRegister rs1, VRegister vs2, VM vm) { in VSuxseg7ei16()
3295 void Riscv64Assembler::VSuxseg7ei32(VRegister vs3, XRegister rs1, VRegister vs2, VM vm) { in VSuxseg7ei32()
3301 void Riscv64Assembler::VSuxseg7ei64(VRegister vs3, XRegister rs1, VRegister vs2, VM vm) { in VSuxseg7ei64()
3307 void Riscv64Assembler::VSuxseg8ei8(VRegister vs3, XRegister rs1, VRegister vs2, VM vm) { in VSuxseg8ei8()
3313 void Riscv64Assembler::VSuxseg8ei16(VRegister vs3, XRegister rs1, VRegister vs2, VM vm) { in VSuxseg8ei16()
3319 void Riscv64Assembler::VSuxseg8ei32(VRegister vs3, XRegister rs1, VRegister vs2, VM vm) { in VSuxseg8ei32()
3325 void Riscv64Assembler::VSuxseg8ei64(VRegister vs3, XRegister rs1, VRegister vs2, VM vm) { in VSuxseg8ei64()
3331 void Riscv64Assembler::VLoxseg2ei8(VRegister vd, XRegister rs1, VRegister vs2, VM vm) { in VLoxseg2ei8()
3338 void Riscv64Assembler::VLoxseg2ei16(VRegister vd, XRegister rs1, VRegister vs2, VM vm) { in VLoxseg2ei16()
3345 void Riscv64Assembler::VLoxseg2ei32(VRegister vd, XRegister rs1, VRegister vs2, VM vm) { in VLoxseg2ei32()
3352 void Riscv64Assembler::VLoxseg2ei64(VRegister vd, XRegister rs1, VRegister vs2, VM vm) { in VLoxseg2ei64()
3359 void Riscv64Assembler::VLoxseg3ei8(VRegister vd, XRegister rs1, VRegister vs2, VM vm) { in VLoxseg3ei8()
3366 void Riscv64Assembler::VLoxseg3ei16(VRegister vd, XRegister rs1, VRegister vs2, VM vm) { in VLoxseg3ei16()
3373 void Riscv64Assembler::VLoxseg3ei32(VRegister vd, XRegister rs1, VRegister vs2, VM vm) { in VLoxseg3ei32()
3380 void Riscv64Assembler::VLoxseg3ei64(VRegister vd, XRegister rs1, VRegister vs2, VM vm) { in VLoxseg3ei64()
3387 void Riscv64Assembler::VLoxseg4ei8(VRegister vd, XRegister rs1, VRegister vs2, VM vm) { in VLoxseg4ei8()
3394 void Riscv64Assembler::VLoxseg4ei16(VRegister vd, XRegister rs1, VRegister vs2, VM vm) { in VLoxseg4ei16()
3401 void Riscv64Assembler::VLoxseg4ei32(VRegister vd, XRegister rs1, VRegister vs2, VM vm) { in VLoxseg4ei32()
3408 void Riscv64Assembler::VLoxseg4ei64(VRegister vd, XRegister rs1, VRegister vs2, VM vm) { in VLoxseg4ei64()
3415 void Riscv64Assembler::VLoxseg5ei8(VRegister vd, XRegister rs1, VRegister vs2, VM vm) { in VLoxseg5ei8()
3422 void Riscv64Assembler::VLoxseg5ei16(VRegister vd, XRegister rs1, VRegister vs2, VM vm) { in VLoxseg5ei16()
3429 void Riscv64Assembler::VLoxseg5ei32(VRegister vd, XRegister rs1, VRegister vs2, VM vm) { in VLoxseg5ei32()
3436 void Riscv64Assembler::VLoxseg5ei64(VRegister vd, XRegister rs1, VRegister vs2, VM vm) { in VLoxseg5ei64()
3443 void Riscv64Assembler::VLoxseg6ei8(VRegister vd, XRegister rs1, VRegister vs2, VM vm) { in VLoxseg6ei8()
3450 void Riscv64Assembler::VLoxseg6ei16(VRegister vd, XRegister rs1, VRegister vs2, VM vm) { in VLoxseg6ei16()
3457 void Riscv64Assembler::VLoxseg6ei32(VRegister vd, XRegister rs1, VRegister vs2, VM vm) { in VLoxseg6ei32()
3464 void Riscv64Assembler::VLoxseg6ei64(VRegister vd, XRegister rs1, VRegister vs2, VM vm) { in VLoxseg6ei64()
3471 void Riscv64Assembler::VLoxseg7ei8(VRegister vd, XRegister rs1, VRegister vs2, VM vm) { in VLoxseg7ei8()
3478 void Riscv64Assembler::VLoxseg7ei16(VRegister vd, XRegister rs1, VRegister vs2, VM vm) { in VLoxseg7ei16()
3485 void Riscv64Assembler::VLoxseg7ei32(VRegister vd, XRegister rs1, VRegister vs2, VM vm) { in VLoxseg7ei32()
3492 void Riscv64Assembler::VLoxseg7ei64(VRegister vd, XRegister rs1, VRegister vs2, VM vm) { in VLoxseg7ei64()
3499 void Riscv64Assembler::VLoxseg8ei8(VRegister vd, XRegister rs1, VRegister vs2, VM vm) { in VLoxseg8ei8()
3506 void Riscv64Assembler::VLoxseg8ei16(VRegister vd, XRegister rs1, VRegister vs2, VM vm) { in VLoxseg8ei16()
3513 void Riscv64Assembler::VLoxseg8ei32(VRegister vd, XRegister rs1, VRegister vs2, VM vm) { in VLoxseg8ei32()
3520 void Riscv64Assembler::VLoxseg8ei64(VRegister vd, XRegister rs1, VRegister vs2, VM vm) { in VLoxseg8ei64()
3527 void Riscv64Assembler::VSoxseg2ei8(VRegister vs3, XRegister rs1, VRegister vs2, VM vm) { in VSoxseg2ei8()
3533 void Riscv64Assembler::VSoxseg2ei16(VRegister vs3, XRegister rs1, VRegister vs2, VM vm) { in VSoxseg2ei16()
3539 void Riscv64Assembler::VSoxseg2ei32(VRegister vs3, XRegister rs1, VRegister vs2, VM vm) { in VSoxseg2ei32()
3545 void Riscv64Assembler::VSoxseg2ei64(VRegister vs3, XRegister rs1, VRegister vs2, VM vm) { in VSoxseg2ei64()
3551 void Riscv64Assembler::VSoxseg3ei8(VRegister vs3, XRegister rs1, VRegister vs2, VM vm) { in VSoxseg3ei8()
3557 void Riscv64Assembler::VSoxseg3ei16(VRegister vs3, XRegister rs1, VRegister vs2, VM vm) { in VSoxseg3ei16()
3563 void Riscv64Assembler::VSoxseg3ei32(VRegister vs3, XRegister rs1, VRegister vs2, VM vm) { in VSoxseg3ei32()
3569 void Riscv64Assembler::VSoxseg3ei64(VRegister vs3, XRegister rs1, VRegister vs2, VM vm) { in VSoxseg3ei64()
3575 void Riscv64Assembler::VSoxseg4ei8(VRegister vs3, XRegister rs1, VRegister vs2, VM vm) { in VSoxseg4ei8()
3581 void Riscv64Assembler::VSoxseg4ei16(VRegister vs3, XRegister rs1, VRegister vs2, VM vm) { in VSoxseg4ei16()
3587 void Riscv64Assembler::VSoxseg4ei32(VRegister vs3, XRegister rs1, VRegister vs2, VM vm) { in VSoxseg4ei32()
3593 void Riscv64Assembler::VSoxseg4ei64(VRegister vs3, XRegister rs1, VRegister vs2, VM vm) { in VSoxseg4ei64()
3599 void Riscv64Assembler::VSoxseg5ei8(VRegister vs3, XRegister rs1, VRegister vs2, VM vm) { in VSoxseg5ei8()
3605 void Riscv64Assembler::VSoxseg5ei16(VRegister vs3, XRegister rs1, VRegister vs2, VM vm) { in VSoxseg5ei16()
3611 void Riscv64Assembler::VSoxseg5ei32(VRegister vs3, XRegister rs1, VRegister vs2, VM vm) { in VSoxseg5ei32()
3617 void Riscv64Assembler::VSoxseg5ei64(VRegister vs3, XRegister rs1, VRegister vs2, VM vm) { in VSoxseg5ei64()
3623 void Riscv64Assembler::VSoxseg6ei8(VRegister vs3, XRegister rs1, VRegister vs2, VM vm) { in VSoxseg6ei8()
3629 void Riscv64Assembler::VSoxseg6ei16(VRegister vs3, XRegister rs1, VRegister vs2, VM vm) { in VSoxseg6ei16()
3635 void Riscv64Assembler::VSoxseg6ei32(VRegister vs3, XRegister rs1, VRegister vs2, VM vm) { in VSoxseg6ei32()
3641 void Riscv64Assembler::VSoxseg6ei64(VRegister vs3, XRegister rs1, VRegister vs2, VM vm) { in VSoxseg6ei64()
3647 void Riscv64Assembler::VSoxseg7ei8(VRegister vs3, XRegister rs1, VRegister vs2, VM vm) { in VSoxseg7ei8()
3653 void Riscv64Assembler::VSoxseg7ei16(VRegister vs3, XRegister rs1, VRegister vs2, VM vm) { in VSoxseg7ei16()
3659 void Riscv64Assembler::VSoxseg7ei32(VRegister vs3, XRegister rs1, VRegister vs2, VM vm) { in VSoxseg7ei32()
3665 void Riscv64Assembler::VSoxseg7ei64(VRegister vs3, XRegister rs1, VRegister vs2, VM vm) { in VSoxseg7ei64()
3671 void Riscv64Assembler::VSoxseg8ei8(VRegister vs3, XRegister rs1, VRegister vs2, VM vm) { in VSoxseg8ei8()
3677 void Riscv64Assembler::VSoxseg8ei16(VRegister vs3, XRegister rs1, VRegister vs2, VM vm) { in VSoxseg8ei16()
3683 void Riscv64Assembler::VSoxseg8ei32(VRegister vs3, XRegister rs1, VRegister vs2, VM vm) { in VSoxseg8ei32()
3689 void Riscv64Assembler::VSoxseg8ei64(VRegister vs3, XRegister rs1, VRegister vs2, VM vm) { in VSoxseg8ei64()
3695 void Riscv64Assembler::VL1re8(VRegister vd, XRegister rs1) { in VL1re8()
3701 void Riscv64Assembler::VL1re16(VRegister vd, XRegister rs1) { in VL1re16()
3707 void Riscv64Assembler::VL1re32(VRegister vd, XRegister rs1) { in VL1re32()
3713 void Riscv64Assembler::VL1re64(VRegister vd, XRegister rs1) { in VL1re64()
3719 void Riscv64Assembler::VL2re8(VRegister vd, XRegister rs1) { in VL2re8()
3726 void Riscv64Assembler::VL2re16(VRegister vd, XRegister rs1) { in VL2re16()
3733 void Riscv64Assembler::VL2re32(VRegister vd, XRegister rs1) { in VL2re32()
3740 void Riscv64Assembler::VL2re64(VRegister vd, XRegister rs1) { in VL2re64()
3747 void Riscv64Assembler::VL4re8(VRegister vd, XRegister rs1) { in VL4re8()
3754 void Riscv64Assembler::VL4re16(VRegister vd, XRegister rs1) { in VL4re16()
3761 void Riscv64Assembler::VL4re32(VRegister vd, XRegister rs1) { in VL4re32()
3768 void Riscv64Assembler::VL4re64(VRegister vd, XRegister rs1) { in VL4re64()
3775 void Riscv64Assembler::VL8re8(VRegister vd, XRegister rs1) { in VL8re8()
3782 void Riscv64Assembler::VL8re16(VRegister vd, XRegister rs1) { in VL8re16()
3789 void Riscv64Assembler::VL8re32(VRegister vd, XRegister rs1) { in VL8re32()
3796 void Riscv64Assembler::VL8re64(VRegister vd, XRegister rs1) { in VL8re64()
3803 void Riscv64Assembler::VL1r(VRegister vd, XRegister rs1) { VL1re8(vd, rs1); } in VL1r()
3805 void Riscv64Assembler::VL2r(VRegister vd, XRegister rs1) { VL2re8(vd, rs1); } in VL2r()
3807 void Riscv64Assembler::VL4r(VRegister vd, XRegister rs1) { VL4re8(vd, rs1); } in VL4r()
3809 void Riscv64Assembler::VL8r(VRegister vd, XRegister rs1) { VL8re8(vd, rs1); } in VL8r()
3811 void Riscv64Assembler::VS1r(VRegister vs3, XRegister rs1) { in VS1r()
3817 void Riscv64Assembler::VS2r(VRegister vs3, XRegister rs1) { in VS2r()
3823 void Riscv64Assembler::VS4r(VRegister vs3, XRegister rs1) { in VS4r()
3829 void Riscv64Assembler::VS8r(VRegister vs3, XRegister rs1) { in VS8r()
3846 void Riscv64Assembler::VAdd_vx(VRegister vd, VRegister vs2, XRegister rs1, VM vm) { in VAdd_vx()
3867 void Riscv64Assembler::VSub_vx(VRegister vd, VRegister vs2, XRegister rs1, VM vm) { in VSub_vx()
3874 void Riscv64Assembler::VRsub_vx(VRegister vd, VRegister vs2, XRegister rs1, VM vm) { in VRsub_vx()
3897 void Riscv64Assembler::VMinu_vx(VRegister vd, VRegister vs2, XRegister rs1, VM vm) { in VMinu_vx()
3911 void Riscv64Assembler::VMin_vx(VRegister vd, VRegister vs2, XRegister rs1, VM vm) { in VMin_vx()
3925 void Riscv64Assembler::VMaxu_vx(VRegister vd, VRegister vs2, XRegister rs1, VM vm) { in VMaxu_vx()
3939 void Riscv64Assembler::VMax_vx(VRegister vd, VRegister vs2, XRegister rs1, VM vm) { in VMax_vx()
3953 void Riscv64Assembler::VAnd_vx(VRegister vd, VRegister vs2, XRegister rs1, VM vm) { in VAnd_vx()
3974 void Riscv64Assembler::VOr_vx(VRegister vd, VRegister vs2, XRegister rs1, VM vm) { in VOr_vx()
3994 void Riscv64Assembler::VXor_vx(VRegister vd, VRegister vs2, XRegister rs1, VM vm) { in VXor_vx()
4019 void Riscv64Assembler::VRgather_vx(VRegister vd, VRegister vs2, XRegister rs1, VM vm) { in VRgather_vx()
4035 void Riscv64Assembler::VSlideup_vx(VRegister vd, VRegister vs2, XRegister rs1, VM vm) { in VSlideup_vx()
4060 void Riscv64Assembler::VSlidedown_vx(VRegister vd, VRegister vs2, XRegister rs1, VM vm) { in VSlidedown_vx()
4082 void Riscv64Assembler::VAdc_vxm(VRegister vd, VRegister vs2, XRegister rs1) { in VAdc_vxm()
4102 void Riscv64Assembler::VMadc_vxm(VRegister vd, VRegister vs2, XRegister rs1) { in VMadc_vxm()
4120 void Riscv64Assembler::VMadc_vx(VRegister vd, VRegister vs2, XRegister rs1) { in VMadc_vx()
4139 void Riscv64Assembler::VSbc_vxm(VRegister vd, VRegister vs2, XRegister rs1) { in VSbc_vxm()
4152 void Riscv64Assembler::VMsbc_vxm(VRegister vd, VRegister vs2, XRegister rs1) { in VMsbc_vxm()
4164 void Riscv64Assembler::VMsbc_vx(VRegister vd, VRegister vs2, XRegister rs1) { in VMsbc_vx()
4177 void Riscv64Assembler::VMerge_vxm(VRegister vd, VRegister vs2, XRegister rs1) { in VMerge_vxm()
4197 void Riscv64Assembler::VMv_vx(VRegister vd, XRegister rs1) { in VMv_vx()
4216 void Riscv64Assembler::VMseq_vx(VRegister vd, VRegister vs2, XRegister rs1, VM vm) { in VMseq_vx()
4237 void Riscv64Assembler::VMsne_vx(VRegister vd, VRegister vs2, XRegister rs1, VM vm) { in VMsne_vx()
4258 void Riscv64Assembler::VMsltu_vx(VRegister vd, VRegister vs2, XRegister rs1, VM vm) { in VMsltu_vx()
4277 void Riscv64Assembler::VMslt_vx(VRegister vd, VRegister vs2, XRegister rs1, VM vm) { in VMslt_vx()
4295 void Riscv64Assembler::VMsleu_vx(VRegister vd, VRegister vs2, XRegister rs1, VM vm) { in VMsleu_vx()
4325 void Riscv64Assembler::VMsle_vx(VRegister vd, VRegister vs2, XRegister rs1, VM vm) { in VMsle_vx()
4347 void Riscv64Assembler::VMsgtu_vx(VRegister vd, VRegister vs2, XRegister rs1, VM vm) { in VMsgtu_vx()
4367 void Riscv64Assembler::VMsgt_vx(VRegister vd, VRegister vs2, XRegister rs1, VM vm) { in VMsgt_vx()
4392 void Riscv64Assembler::VSaddu_vx(VRegister vd, VRegister vs2, XRegister rs1, VM vm) { in VSaddu_vx()
4413 void Riscv64Assembler::VSadd_vx(VRegister vd, VRegister vs2, XRegister rs1, VM vm) { in VSadd_vx()
4434 void Riscv64Assembler::VSsubu_vx(VRegister vd, VRegister vs2, XRegister rs1, VM vm) { in VSsubu_vx()
4448 void Riscv64Assembler::VSsub_vx(VRegister vd, VRegister vs2, XRegister rs1, VM vm) { in VSsub_vx()
4462 void Riscv64Assembler::VSll_vx(VRegister vd, VRegister vs2, XRegister rs1, VM vm) { in VSll_vx()
4483 void Riscv64Assembler::VSmul_vx(VRegister vd, VRegister vs2, XRegister rs1, VM vm) { in VSmul_vx()
4531 void Riscv64Assembler::VSrl_vx(VRegister vd, VRegister vs2, XRegister rs1, VM vm) { in VSrl_vx()
4552 void Riscv64Assembler::VSra_vx(VRegister vd, VRegister vs2, XRegister rs1, VM vm) { in VSra_vx()
4573 void Riscv64Assembler::VSsrl_vx(VRegister vd, VRegister vs2, XRegister rs1, VM vm) { in VSsrl_vx()
4594 void Riscv64Assembler::VSsra_vx(VRegister vd, VRegister vs2, XRegister rs1, VM vm) { in VSsra_vx()
4615 void Riscv64Assembler::VNsrl_wx(VRegister vd, VRegister vs2, XRegister rs1, VM vm) { in VNsrl_wx()
4641 void Riscv64Assembler::VNsra_wx(VRegister vd, VRegister vs2, XRegister rs1, VM vm) { in VNsra_wx()
4662 void Riscv64Assembler::VNclipu_wx(VRegister vd, VRegister vs2, XRegister rs1, VM vm) { in VNclipu_wx()
4683 void Riscv64Assembler::VNclip_wx(VRegister vd, VRegister vs2, XRegister rs1, VM vm) { in VNclip_wx()
4764 void Riscv64Assembler::VAaddu_vx(VRegister vd, VRegister vs2, XRegister rs1, VM vm) { in VAaddu_vx()
4778 void Riscv64Assembler::VAadd_vx(VRegister vd, VRegister vs2, XRegister rs1, VM vm) { in VAadd_vx()
4792 void Riscv64Assembler::VAsubu_vx(VRegister vd, VRegister vs2, XRegister rs1, VM vm) { in VAsubu_vx()
4806 void Riscv64Assembler::VAsub_vx(VRegister vd, VRegister vs2, XRegister rs1, VM vm) { in VAsub_vx()
4813 void Riscv64Assembler::VSlide1up_vx(VRegister vd, VRegister vs2, XRegister rs1, VM vm) { in VSlide1up_vx()
4821 void Riscv64Assembler::VSlide1down_vx(VRegister vd, VRegister vs2, XRegister rs1, VM vm) { in VSlide1down_vx()
4899 void Riscv64Assembler::VDivu_vx(VRegister vd, VRegister vs2, XRegister rs1, VM vm) { in VDivu_vx()
4913 void Riscv64Assembler::VDiv_vx(VRegister vd, VRegister vs2, XRegister rs1, VM vm) { in VDiv_vx()
4927 void Riscv64Assembler::VRemu_vx(VRegister vd, VRegister vs2, XRegister rs1, VM vm) { in VRemu_vx()
4941 void Riscv64Assembler::VRem_vx(VRegister vd, VRegister vs2, XRegister rs1, VM vm) { in VRem_vx()
4955 void Riscv64Assembler::VMulhu_vx(VRegister vd, VRegister vs2, XRegister rs1, VM vm) { in VMulhu_vx()
4969 void Riscv64Assembler::VMul_vx(VRegister vd, VRegister vs2, XRegister rs1, VM vm) { in VMul_vx()
4983 void Riscv64Assembler::VMulhsu_vx(VRegister vd, VRegister vs2, XRegister rs1, VM vm) { in VMulhsu_vx()
4997 void Riscv64Assembler::VMulh_vx(VRegister vd, VRegister vs2, XRegister rs1, VM vm) { in VMulh_vx()
5011 void Riscv64Assembler::VMadd_vx(VRegister vd, XRegister rs1, VRegister vs2, VM vm) { in VMadd_vx()
5025 void Riscv64Assembler::VNmsub_vx(VRegister vd, XRegister rs1, VRegister vs2, VM vm) { in VNmsub_vx()
5039 void Riscv64Assembler::VMacc_vx(VRegister vd, XRegister rs1, VRegister vs2, VM vm) { in VMacc_vx()
5055 void Riscv64Assembler::VNmsac_vx(VRegister vd, XRegister rs1, VRegister vs2, VM vm) { in VNmsac_vx()
5071 void Riscv64Assembler::VWaddu_vx(VRegister vd, VRegister vs2, XRegister rs1, VM vm) { in VWaddu_vx()
5092 void Riscv64Assembler::VWadd_vx(VRegister vd, VRegister vs2, XRegister rs1, VM vm) { in VWadd_vx()
5113 void Riscv64Assembler::VWsubu_vx(VRegister vd, VRegister vs2, XRegister rs1, VM vm) { in VWsubu_vx()
5130 void Riscv64Assembler::VWsub_vx(VRegister vd, VRegister vs2, XRegister rs1, VM vm) { in VWsub_vx()
5146 void Riscv64Assembler::VWaddu_wx(VRegister vd, VRegister vs2, XRegister rs1, VM vm) { in VWaddu_wx()
5161 void Riscv64Assembler::VWadd_wx(VRegister vd, VRegister vs2, XRegister rs1, VM vm) { in VWadd_wx()
5176 void Riscv64Assembler::VWsubu_wx(VRegister vd, VRegister vs2, XRegister rs1, VM vm) { in VWsubu_wx()
5191 void Riscv64Assembler::VWsub_wx(VRegister vd, VRegister vs2, XRegister rs1, VM vm) { in VWsub_wx()
5207 void Riscv64Assembler::VWmulu_vx(VRegister vd, VRegister vs2, XRegister rs1, VM vm) { in VWmulu_vx()
5224 void Riscv64Assembler::VWmulsu_vx(VRegister vd, VRegister vs2, XRegister rs1, VM vm) { in VWmulsu_vx()
5241 void Riscv64Assembler::VWmul_vx(VRegister vd, VRegister vs2, XRegister rs1, VM vm) { in VWmul_vx()
5258 void Riscv64Assembler::VWmaccu_vx(VRegister vd, XRegister rs1, VRegister vs2, VM vm) { in VWmaccu_vx()
5275 void Riscv64Assembler::VWmacc_vx(VRegister vd, XRegister rs1, VRegister vs2, VM vm) { in VWmacc_vx()
5283 void Riscv64Assembler::VWmaccus_vx(VRegister vd, XRegister rs1, VRegister vs2, VM vm) { in VWmaccus_vx()
5300 void Riscv64Assembler::VWmaccsu_vx(VRegister vd, XRegister rs1, VRegister vs2, VM vm) { in VWmaccsu_vx()
5855 void Riscv64Assembler::VMv_s_x(VRegister vd, XRegister rs1) { in VMv_s_x()
6358 void Riscv64Assembler::Loadb(XRegister rd, XRegister rs1, int32_t offset) { in Loadb()
6362 void Riscv64Assembler::Loadh(XRegister rd, XRegister rs1, int32_t offset) { in Loadh()
6366 void Riscv64Assembler::Loadw(XRegister rd, XRegister rs1, int32_t offset) { in Loadw()
6370 void Riscv64Assembler::Loadd(XRegister rd, XRegister rs1, int32_t offset) { in Loadd()
6374 void Riscv64Assembler::Loadbu(XRegister rd, XRegister rs1, int32_t offset) { in Loadbu()
6378 void Riscv64Assembler::Loadhu(XRegister rd, XRegister rs1, int32_t offset) { in Loadhu()
6382 void Riscv64Assembler::Loadwu(XRegister rd, XRegister rs1, int32_t offset) { in Loadwu()
6386 void Riscv64Assembler::Storeb(XRegister rs2, XRegister rs1, int32_t offset) { in Storeb()
6390 void Riscv64Assembler::Storeh(XRegister rs2, XRegister rs1, int32_t offset) { in Storeh()
6394 void Riscv64Assembler::Storew(XRegister rs2, XRegister rs1, int32_t offset) { in Storew()
6398 void Riscv64Assembler::Stored(XRegister rs2, XRegister rs1, int32_t offset) { in Stored()
6402 void Riscv64Assembler::FLoadw(FRegister rd, XRegister rs1, int32_t offset) { in FLoadw()
6406 void Riscv64Assembler::FLoadd(FRegister rd, XRegister rs1, int32_t offset) { in FLoadd()
6410 void Riscv64Assembler::FStorew(FRegister rs2, XRegister rs1, int32_t offset) { in FStorew()
6414 void Riscv64Assembler::FStored(FRegister rs2, XRegister rs1, int32_t offset) { in FStored()
6430 XRegister rs1, in AddConstImpl()
6464 void Riscv64Assembler::AddConst32(XRegister rd, XRegister rs1, int32_t value) { in AddConst32()
6467 auto addiw = [&](XRegister rd, XRegister rs1, int32_t value) { Addiw(rd, rs1, value); }; in AddConst32()
6468 auto add_large = [&](XRegister rd, XRegister rs1, int32_t value, XRegister tmp) { in AddConst32()
6475 void Riscv64Assembler::AddConst64(XRegister rd, XRegister rs1, int64_t value) { in AddConst64()
6478 auto addi = [&](XRegister rd, XRegister rs1, int32_t value) { Addi(rd, rs1, value); }; in AddConst64()
6479 auto add_large = [&](XRegister rd, XRegister rs1, int64_t value, XRegister tmp) { in AddConst64()
7633 void Riscv64Assembler::LoadFromOffset(XRegister rd, XRegister rs1, int32_t offset) { in LoadFromOffset()
7646 void Riscv64Assembler::StoreToOffset(XRegister rs2, XRegister rs1, int32_t offset) { in StoreToOffset()
7655 void Riscv64Assembler::FLoadFromOffset(FRegister rd, XRegister rs1, int32_t offset) { in FLoadFromOffset()
7663 void Riscv64Assembler::FStoreToOffset(FRegister rs2, XRegister rs1, int32_t offset) { in FStoreToOffset()