Lines Matching defs:rs2

115 void Riscv64Assembler::Beq(XRegister rs1, XRegister rs2, int32_t offset) {  in Beq()
129 void Riscv64Assembler::Bne(XRegister rs1, XRegister rs2, int32_t offset) { in Bne()
143 void Riscv64Assembler::Blt(XRegister rs1, XRegister rs2, int32_t offset) { in Blt()
147 void Riscv64Assembler::Bge(XRegister rs1, XRegister rs2, int32_t offset) { in Bge()
151 void Riscv64Assembler::Bltu(XRegister rs1, XRegister rs2, int32_t offset) { in Bltu()
155 void Riscv64Assembler::Bgeu(XRegister rs1, XRegister rs2, int32_t offset) { in Bgeu()
244 void Riscv64Assembler::Sb(XRegister rs2, XRegister rs1, int32_t offset) { in Sb()
257 void Riscv64Assembler::Sh(XRegister rs2, XRegister rs1, int32_t offset) { in Sh()
270 void Riscv64Assembler::Sw(XRegister rs2, XRegister rs1, int32_t offset) { in Sw()
286 void Riscv64Assembler::Sd(XRegister rs2, XRegister rs1, int32_t offset) { in Sd()
416 void Riscv64Assembler::Add(XRegister rd, XRegister rs1, XRegister rs2) { in Add()
451 void Riscv64Assembler::Sub(XRegister rd, XRegister rs1, XRegister rs2) { in Sub()
462 void Riscv64Assembler::Slt(XRegister rd, XRegister rs1, XRegister rs2) { in Slt()
466 void Riscv64Assembler::Sltu(XRegister rd, XRegister rs1, XRegister rs2) { in Sltu()
470 void Riscv64Assembler::Xor(XRegister rd, XRegister rs1, XRegister rs2) { in Xor()
486 void Riscv64Assembler::Or(XRegister rd, XRegister rs1, XRegister rs2) { in Or()
502 void Riscv64Assembler::And(XRegister rd, XRegister rs1, XRegister rs2) { in And()
518 void Riscv64Assembler::Sll(XRegister rd, XRegister rs1, XRegister rs2) { in Sll()
522 void Riscv64Assembler::Srl(XRegister rd, XRegister rs1, XRegister rs2) { in Srl()
526 void Riscv64Assembler::Sra(XRegister rd, XRegister rs1, XRegister rs2) { in Sra()
565 void Riscv64Assembler::Addw(XRegister rd, XRegister rs1, XRegister rs2) { in Addw()
581 void Riscv64Assembler::Subw(XRegister rd, XRegister rs1, XRegister rs2) { in Subw()
592 void Riscv64Assembler::Sllw(XRegister rd, XRegister rs1, XRegister rs2) { in Sllw()
596 void Riscv64Assembler::Srlw(XRegister rd, XRegister rs1, XRegister rs2) { in Srlw()
600 void Riscv64Assembler::Sraw(XRegister rd, XRegister rs1, XRegister rs2) { in Sraw()
647 void Riscv64Assembler::Mul(XRegister rd, XRegister rs1, XRegister rs2) { in Mul()
665 void Riscv64Assembler::Mulh(XRegister rd, XRegister rs1, XRegister rs2) { in Mulh()
670 void Riscv64Assembler::Mulhsu(XRegister rd, XRegister rs1, XRegister rs2) { in Mulhsu()
675 void Riscv64Assembler::Mulhu(XRegister rd, XRegister rs1, XRegister rs2) { in Mulhu()
680 void Riscv64Assembler::Div(XRegister rd, XRegister rs1, XRegister rs2) { in Div()
685 void Riscv64Assembler::Divu(XRegister rd, XRegister rs1, XRegister rs2) { in Divu()
690 void Riscv64Assembler::Rem(XRegister rd, XRegister rs1, XRegister rs2) { in Rem()
695 void Riscv64Assembler::Remu(XRegister rd, XRegister rs1, XRegister rs2) { in Remu()
702 void Riscv64Assembler::Mulw(XRegister rd, XRegister rs1, XRegister rs2) { in Mulw()
707 void Riscv64Assembler::Divw(XRegister rd, XRegister rs1, XRegister rs2) { in Divw()
712 void Riscv64Assembler::Divuw(XRegister rd, XRegister rs1, XRegister rs2) { in Divuw()
717 void Riscv64Assembler::Remw(XRegister rd, XRegister rs1, XRegister rs2) { in Remw()
722 void Riscv64Assembler::Remuw(XRegister rd, XRegister rs1, XRegister rs2) { in Remuw()
743 void Riscv64Assembler::ScW(XRegister rd, XRegister rs2, XRegister rs1, AqRl aqrl) { in ScW()
749 void Riscv64Assembler::ScD(XRegister rd, XRegister rs2, XRegister rs1, AqRl aqrl) { in ScD()
755 void Riscv64Assembler::AmoSwapW(XRegister rd, XRegister rs2, XRegister rs1, AqRl aqrl) { in AmoSwapW()
760 void Riscv64Assembler::AmoSwapD(XRegister rd, XRegister rs2, XRegister rs1, AqRl aqrl) { in AmoSwapD()
765 void Riscv64Assembler::AmoAddW(XRegister rd, XRegister rs2, XRegister rs1, AqRl aqrl) { in AmoAddW()
770 void Riscv64Assembler::AmoAddD(XRegister rd, XRegister rs2, XRegister rs1, AqRl aqrl) { in AmoAddD()
775 void Riscv64Assembler::AmoXorW(XRegister rd, XRegister rs2, XRegister rs1, AqRl aqrl) { in AmoXorW()
780 void Riscv64Assembler::AmoXorD(XRegister rd, XRegister rs2, XRegister rs1, AqRl aqrl) { in AmoXorD()
785 void Riscv64Assembler::AmoAndW(XRegister rd, XRegister rs2, XRegister rs1, AqRl aqrl) { in AmoAndW()
790 void Riscv64Assembler::AmoAndD(XRegister rd, XRegister rs2, XRegister rs1, AqRl aqrl) { in AmoAndD()
795 void Riscv64Assembler::AmoOrW(XRegister rd, XRegister rs2, XRegister rs1, AqRl aqrl) { in AmoOrW()
800 void Riscv64Assembler::AmoOrD(XRegister rd, XRegister rs2, XRegister rs1, AqRl aqrl) { in AmoOrD()
805 void Riscv64Assembler::AmoMinW(XRegister rd, XRegister rs2, XRegister rs1, AqRl aqrl) { in AmoMinW()
810 void Riscv64Assembler::AmoMinD(XRegister rd, XRegister rs2, XRegister rs1, AqRl aqrl) { in AmoMinD()
815 void Riscv64Assembler::AmoMaxW(XRegister rd, XRegister rs2, XRegister rs1, AqRl aqrl) { in AmoMaxW()
820 void Riscv64Assembler::AmoMaxD(XRegister rd, XRegister rs2, XRegister rs1, AqRl aqrl) { in AmoMaxD()
825 void Riscv64Assembler::AmoMinuW(XRegister rd, XRegister rs2, XRegister rs1, AqRl aqrl) { in AmoMinuW()
830 void Riscv64Assembler::AmoMinuD(XRegister rd, XRegister rs2, XRegister rs1, AqRl aqrl) { in AmoMinuD()
835 void Riscv64Assembler::AmoMaxuW(XRegister rd, XRegister rs2, XRegister rs1, AqRl aqrl) { in AmoMaxuW()
840 void Riscv64Assembler::AmoMaxuD(XRegister rd, XRegister rs2, XRegister rs1, AqRl aqrl) { in AmoMaxuD()
908 void Riscv64Assembler::FSw(FRegister rs2, XRegister rs1, int32_t offset) { in FSw()
913 void Riscv64Assembler::FSd(FRegister rs2, XRegister rs1, int32_t offset) { in FSd()
932 FRegister rd, FRegister rs1, FRegister rs2, FRegister rs3, FPRoundingMode frm) { in FMAddS()
938 FRegister rd, FRegister rs1, FRegister rs2, FRegister rs3, FPRoundingMode frm) { in FMAddD()
944 FRegister rd, FRegister rs1, FRegister rs2, FRegister rs3, FPRoundingMode frm) { in FMSubS()
950 FRegister rd, FRegister rs1, FRegister rs2, FRegister rs3, FPRoundingMode frm) { in FMSubD()
956 FRegister rd, FRegister rs1, FRegister rs2, FRegister rs3, FPRoundingMode frm) { in FNMSubS()
962 FRegister rd, FRegister rs1, FRegister rs2, FRegister rs3, FPRoundingMode frm) { in FNMSubD()
968 FRegister rd, FRegister rs1, FRegister rs2, FRegister rs3, FPRoundingMode frm) { in FNMAddS()
974 FRegister rd, FRegister rs1, FRegister rs2, FRegister rs3, FPRoundingMode frm) { in FNMAddD()
981 void Riscv64Assembler::FAddS(FRegister rd, FRegister rs1, FRegister rs2, FPRoundingMode frm) { in FAddS()
986 void Riscv64Assembler::FAddD(FRegister rd, FRegister rs1, FRegister rs2, FPRoundingMode frm) { in FAddD()
991 void Riscv64Assembler::FSubS(FRegister rd, FRegister rs1, FRegister rs2, FPRoundingMode frm) { in FSubS()
996 void Riscv64Assembler::FSubD(FRegister rd, FRegister rs1, FRegister rs2, FPRoundingMode frm) { in FSubD()
1001 void Riscv64Assembler::FMulS(FRegister rd, FRegister rs1, FRegister rs2, FPRoundingMode frm) { in FMulS()
1006 void Riscv64Assembler::FMulD(FRegister rd, FRegister rs1, FRegister rs2, FPRoundingMode frm) { in FMulD()
1011 void Riscv64Assembler::FDivS(FRegister rd, FRegister rs1, FRegister rs2, FPRoundingMode frm) { in FDivS()
1016 void Riscv64Assembler::FDivD(FRegister rd, FRegister rs1, FRegister rs2, FPRoundingMode frm) { in FDivD()
1031 void Riscv64Assembler::FSgnjS(FRegister rd, FRegister rs1, FRegister rs2) { in FSgnjS()
1036 void Riscv64Assembler::FSgnjD(FRegister rd, FRegister rs1, FRegister rs2) { in FSgnjD()
1041 void Riscv64Assembler::FSgnjnS(FRegister rd, FRegister rs1, FRegister rs2) { in FSgnjnS()
1046 void Riscv64Assembler::FSgnjnD(FRegister rd, FRegister rs1, FRegister rs2) { in FSgnjnD()
1051 void Riscv64Assembler::FSgnjxS(FRegister rd, FRegister rs1, FRegister rs2) { in FSgnjxS()
1056 void Riscv64Assembler::FSgnjxD(FRegister rd, FRegister rs1, FRegister rs2) { in FSgnjxD()
1061 void Riscv64Assembler::FMinS(FRegister rd, FRegister rs1, FRegister rs2) { in FMinS()
1066 void Riscv64Assembler::FMinD(FRegister rd, FRegister rs1, FRegister rs2) { in FMinD()
1071 void Riscv64Assembler::FMaxS(FRegister rd, FRegister rs1, FRegister rs2) { in FMaxS()
1076 void Riscv64Assembler::FMaxD(FRegister rd, FRegister rs1, FRegister rs2) { in FMaxD()
1094 void Riscv64Assembler::FEqS(XRegister rd, FRegister rs1, FRegister rs2) { in FEqS()
1099 void Riscv64Assembler::FEqD(XRegister rd, FRegister rs1, FRegister rs2) { in FEqD()
1104 void Riscv64Assembler::FLtS(XRegister rd, FRegister rs1, FRegister rs2) { in FLtS()
1109 void Riscv64Assembler::FLtD(XRegister rd, FRegister rs1, FRegister rs2) { in FLtD()
1114 void Riscv64Assembler::FLeS(XRegister rd, FRegister rs1, FRegister rs2) { in FLeS()
1119 void Riscv64Assembler::FLeD(XRegister rd, FRegister rs1, FRegister rs2) { in FLeD()
1264 void Riscv64Assembler::CSwsp(XRegister rs2, int32_t offset) { in CSwsp()
1269 void Riscv64Assembler::CSdsp(XRegister rs2, int32_t offset) { in CSdsp()
1274 void Riscv64Assembler::CFSdsp(FRegister rs2, int32_t offset) { in CFSdsp()
1401 void Riscv64Assembler::CMv(XRegister rd, XRegister rs2) { in CMv()
1408 void Riscv64Assembler::CAdd(XRegister rd, XRegister rs2) { in CAdd()
1559 void Riscv64Assembler::AddUw(XRegister rd, XRegister rs1, XRegister rs2) { in AddUw()
1564 void Riscv64Assembler::Sh1Add(XRegister rd, XRegister rs1, XRegister rs2) { in Sh1Add()
1569 void Riscv64Assembler::Sh1AddUw(XRegister rd, XRegister rs1, XRegister rs2) { in Sh1AddUw()
1574 void Riscv64Assembler::Sh2Add(XRegister rd, XRegister rs1, XRegister rs2) { in Sh2Add()
1579 void Riscv64Assembler::Sh2AddUw(XRegister rd, XRegister rs1, XRegister rs2) { in Sh2AddUw()
1584 void Riscv64Assembler::Sh3Add(XRegister rd, XRegister rs1, XRegister rs2) { in Sh3Add()
1589 void Riscv64Assembler::Sh3AddUw(XRegister rd, XRegister rs1, XRegister rs2) { in Sh3AddUw()
1603 void Riscv64Assembler::Andn(XRegister rd, XRegister rs1, XRegister rs2) { in Andn()
1608 void Riscv64Assembler::Orn(XRegister rd, XRegister rs1, XRegister rs2) { in Orn()
1613 void Riscv64Assembler::Xnor(XRegister rd, XRegister rs1, XRegister rs2) { in Xnor()
1648 void Riscv64Assembler::Min(XRegister rd, XRegister rs1, XRegister rs2) { in Min()
1653 void Riscv64Assembler::Minu(XRegister rd, XRegister rs1, XRegister rs2) { in Minu()
1658 void Riscv64Assembler::Max(XRegister rd, XRegister rs1, XRegister rs2) { in Max()
1663 void Riscv64Assembler::Maxu(XRegister rd, XRegister rs1, XRegister rs2) { in Maxu()
1668 void Riscv64Assembler::Rol(XRegister rd, XRegister rs1, XRegister rs2) { in Rol()
1673 void Riscv64Assembler::Rolw(XRegister rd, XRegister rs1, XRegister rs2) { in Rolw()
1678 void Riscv64Assembler::Ror(XRegister rd, XRegister rs1, XRegister rs2) { in Ror()
1683 void Riscv64Assembler::Rorw(XRegister rd, XRegister rs1, XRegister rs2) { in Rorw()
1729 void Riscv64Assembler::Bclr(XRegister rd, XRegister rs1, XRegister rs2) { in Bclr()
1740 void Riscv64Assembler::Bext(XRegister rd, XRegister rs1, XRegister rs2) { in Bext()
1751 void Riscv64Assembler::Binv(XRegister rd, XRegister rs1, XRegister rs2) { in Binv()
1762 void Riscv64Assembler::Bset(XRegister rd, XRegister rs1, XRegister rs2) { in Bset()
1790 void Riscv64Assembler::VSetvl(XRegister rd, XRegister rs1, XRegister rs2) { in VSetvl()
1887 void Riscv64Assembler::VLse8(VRegister vd, XRegister rs1, XRegister rs2, VM vm) { in VLse8()
1894 void Riscv64Assembler::VLse16(VRegister vd, XRegister rs1, XRegister rs2, VM vm) { in VLse16()
1901 void Riscv64Assembler::VLse32(VRegister vd, XRegister rs1, XRegister rs2, VM vm) { in VLse32()
1908 void Riscv64Assembler::VLse64(VRegister vd, XRegister rs1, XRegister rs2, VM vm) { in VLse64()
1915 void Riscv64Assembler::VSse8(VRegister vs3, XRegister rs1, XRegister rs2, VM vm) { in VSse8()
1921 void Riscv64Assembler::VSse16(VRegister vs3, XRegister rs1, XRegister rs2, VM vm) { in VSse16()
1927 void Riscv64Assembler::VSse32(VRegister vs3, XRegister rs1, XRegister rs2, VM vm) { in VSse32()
1933 void Riscv64Assembler::VSse64(VRegister vs3, XRegister rs1, XRegister rs2, VM vm) { in VSse64()
2603 void Riscv64Assembler::VLsseg2e8(VRegister vd, XRegister rs1, XRegister rs2, VM vm) { in VLsseg2e8()
2610 void Riscv64Assembler::VLsseg2e16(VRegister vd, XRegister rs1, XRegister rs2, VM vm) { in VLsseg2e16()
2617 void Riscv64Assembler::VLsseg2e32(VRegister vd, XRegister rs1, XRegister rs2, VM vm) { in VLsseg2e32()
2624 void Riscv64Assembler::VLsseg2e64(VRegister vd, XRegister rs1, XRegister rs2, VM vm) { in VLsseg2e64()
2631 void Riscv64Assembler::VLsseg3e8(VRegister vd, XRegister rs1, XRegister rs2, VM vm) { in VLsseg3e8()
2638 void Riscv64Assembler::VLsseg3e16(VRegister vd, XRegister rs1, XRegister rs2, VM vm) { in VLsseg3e16()
2645 void Riscv64Assembler::VLsseg3e32(VRegister vd, XRegister rs1, XRegister rs2, VM vm) { in VLsseg3e32()
2652 void Riscv64Assembler::VLsseg3e64(VRegister vd, XRegister rs1, XRegister rs2, VM vm) { in VLsseg3e64()
2659 void Riscv64Assembler::VLsseg4e8(VRegister vd, XRegister rs1, XRegister rs2, VM vm) { in VLsseg4e8()
2666 void Riscv64Assembler::VLsseg4e16(VRegister vd, XRegister rs1, XRegister rs2, VM vm) { in VLsseg4e16()
2673 void Riscv64Assembler::VLsseg4e32(VRegister vd, XRegister rs1, XRegister rs2, VM vm) { in VLsseg4e32()
2680 void Riscv64Assembler::VLsseg4e64(VRegister vd, XRegister rs1, XRegister rs2, VM vm) { in VLsseg4e64()
2687 void Riscv64Assembler::VLsseg5e8(VRegister vd, XRegister rs1, XRegister rs2, VM vm) { in VLsseg5e8()
2694 void Riscv64Assembler::VLsseg5e16(VRegister vd, XRegister rs1, XRegister rs2, VM vm) { in VLsseg5e16()
2701 void Riscv64Assembler::VLsseg5e32(VRegister vd, XRegister rs1, XRegister rs2, VM vm) { in VLsseg5e32()
2708 void Riscv64Assembler::VLsseg5e64(VRegister vd, XRegister rs1, XRegister rs2, VM vm) { in VLsseg5e64()
2715 void Riscv64Assembler::VLsseg6e8(VRegister vd, XRegister rs1, XRegister rs2, VM vm) { in VLsseg6e8()
2722 void Riscv64Assembler::VLsseg6e16(VRegister vd, XRegister rs1, XRegister rs2, VM vm) { in VLsseg6e16()
2729 void Riscv64Assembler::VLsseg6e32(VRegister vd, XRegister rs1, XRegister rs2, VM vm) { in VLsseg6e32()
2736 void Riscv64Assembler::VLsseg6e64(VRegister vd, XRegister rs1, XRegister rs2, VM vm) { in VLsseg6e64()
2743 void Riscv64Assembler::VLsseg7e8(VRegister vd, XRegister rs1, XRegister rs2, VM vm) { in VLsseg7e8()
2750 void Riscv64Assembler::VLsseg7e16(VRegister vd, XRegister rs1, XRegister rs2, VM vm) { in VLsseg7e16()
2757 void Riscv64Assembler::VLsseg7e32(VRegister vd, XRegister rs1, XRegister rs2, VM vm) { in VLsseg7e32()
2764 void Riscv64Assembler::VLsseg7e64(VRegister vd, XRegister rs1, XRegister rs2, VM vm) { in VLsseg7e64()
2771 void Riscv64Assembler::VLsseg8e8(VRegister vd, XRegister rs1, XRegister rs2, VM vm) { in VLsseg8e8()
2778 void Riscv64Assembler::VLsseg8e16(VRegister vd, XRegister rs1, XRegister rs2, VM vm) { in VLsseg8e16()
2785 void Riscv64Assembler::VLsseg8e32(VRegister vd, XRegister rs1, XRegister rs2, VM vm) { in VLsseg8e32()
2792 void Riscv64Assembler::VLsseg8e64(VRegister vd, XRegister rs1, XRegister rs2, VM vm) { in VLsseg8e64()
2799 void Riscv64Assembler::VSsseg2e8(VRegister vs3, XRegister rs1, XRegister rs2, VM vm) { in VSsseg2e8()
2805 void Riscv64Assembler::VSsseg2e16(VRegister vs3, XRegister rs1, XRegister rs2, VM vm) { in VSsseg2e16()
2811 void Riscv64Assembler::VSsseg2e32(VRegister vs3, XRegister rs1, XRegister rs2, VM vm) { in VSsseg2e32()
2817 void Riscv64Assembler::VSsseg2e64(VRegister vs3, XRegister rs1, XRegister rs2, VM vm) { in VSsseg2e64()
2823 void Riscv64Assembler::VSsseg3e8(VRegister vs3, XRegister rs1, XRegister rs2, VM vm) { in VSsseg3e8()
2829 void Riscv64Assembler::VSsseg3e16(VRegister vs3, XRegister rs1, XRegister rs2, VM vm) { in VSsseg3e16()
2835 void Riscv64Assembler::VSsseg3e32(VRegister vs3, XRegister rs1, XRegister rs2, VM vm) { in VSsseg3e32()
2841 void Riscv64Assembler::VSsseg3e64(VRegister vs3, XRegister rs1, XRegister rs2, VM vm) { in VSsseg3e64()
2847 void Riscv64Assembler::VSsseg4e8(VRegister vs3, XRegister rs1, XRegister rs2, VM vm) { in VSsseg4e8()
2853 void Riscv64Assembler::VSsseg4e16(VRegister vs3, XRegister rs1, XRegister rs2, VM vm) { in VSsseg4e16()
2859 void Riscv64Assembler::VSsseg4e32(VRegister vs3, XRegister rs1, XRegister rs2, VM vm) { in VSsseg4e32()
2865 void Riscv64Assembler::VSsseg4e64(VRegister vs3, XRegister rs1, XRegister rs2, VM vm) { in VSsseg4e64()
2871 void Riscv64Assembler::VSsseg5e8(VRegister vs3, XRegister rs1, XRegister rs2, VM vm) { in VSsseg5e8()
2877 void Riscv64Assembler::VSsseg5e16(VRegister vs3, XRegister rs1, XRegister rs2, VM vm) { in VSsseg5e16()
2883 void Riscv64Assembler::VSsseg5e32(VRegister vs3, XRegister rs1, XRegister rs2, VM vm) { in VSsseg5e32()
2889 void Riscv64Assembler::VSsseg5e64(VRegister vs3, XRegister rs1, XRegister rs2, VM vm) { in VSsseg5e64()
2895 void Riscv64Assembler::VSsseg6e8(VRegister vs3, XRegister rs1, XRegister rs2, VM vm) { in VSsseg6e8()
2901 void Riscv64Assembler::VSsseg6e16(VRegister vs3, XRegister rs1, XRegister rs2, VM vm) { in VSsseg6e16()
2907 void Riscv64Assembler::VSsseg6e32(VRegister vs3, XRegister rs1, XRegister rs2, VM vm) { in VSsseg6e32()
2913 void Riscv64Assembler::VSsseg6e64(VRegister vs3, XRegister rs1, XRegister rs2, VM vm) { in VSsseg6e64()
2919 void Riscv64Assembler::VSsseg7e8(VRegister vs3, XRegister rs1, XRegister rs2, VM vm) { in VSsseg7e8()
2925 void Riscv64Assembler::VSsseg7e16(VRegister vs3, XRegister rs1, XRegister rs2, VM vm) { in VSsseg7e16()
2931 void Riscv64Assembler::VSsseg7e32(VRegister vs3, XRegister rs1, XRegister rs2, VM vm) { in VSsseg7e32()
2937 void Riscv64Assembler::VSsseg7e64(VRegister vs3, XRegister rs1, XRegister rs2, VM vm) { in VSsseg7e64()
2943 void Riscv64Assembler::VSsseg8e8(VRegister vs3, XRegister rs1, XRegister rs2, VM vm) { in VSsseg8e8()
2949 void Riscv64Assembler::VSsseg8e16(VRegister vs3, XRegister rs1, XRegister rs2, VM vm) { in VSsseg8e16()
2955 void Riscv64Assembler::VSsseg8e32(VRegister vs3, XRegister rs1, XRegister rs2, VM vm) { in VSsseg8e32()
2961 void Riscv64Assembler::VSsseg8e64(VRegister vs3, XRegister rs1, XRegister rs2, VM vm) { in VSsseg8e64()
6386 void Riscv64Assembler::Storeb(XRegister rs2, XRegister rs1, int32_t offset) { in Storeb()
6390 void Riscv64Assembler::Storeh(XRegister rs2, XRegister rs1, int32_t offset) { in Storeh()
6394 void Riscv64Assembler::Storew(XRegister rs2, XRegister rs1, int32_t offset) { in Storew()
6398 void Riscv64Assembler::Stored(XRegister rs2, XRegister rs1, int32_t offset) { in Stored()
6410 void Riscv64Assembler::FStorew(FRegister rs2, XRegister rs1, int32_t offset) { in FStorew()
6414 void Riscv64Assembler::FStored(FRegister rs2, XRegister rs1, int32_t offset) { in FStored()
7646 void Riscv64Assembler::StoreToOffset(XRegister rs2, XRegister rs1, int32_t offset) { in StoreToOffset()
7663 void Riscv64Assembler::FStoreToOffset(FRegister rs2, XRegister rs1, int32_t offset) { in FStoreToOffset()