Lines Matching defs:uimm5

866 void Riscv64Assembler::Csrrwi(XRegister rd, uint32_t csr, uint32_t uimm5) {  in Csrrwi()
871 void Riscv64Assembler::Csrrsi(XRegister rd, uint32_t csr, uint32_t uimm5) { in Csrrsi()
876 void Riscv64Assembler::Csrrci(XRegister rd, uint32_t csr, uint32_t uimm5) { in Csrrci()
4027 void Riscv64Assembler::VRgather_vi(VRegister vd, VRegister vs2, uint32_t uimm5, VM vm) { in VRgather_vi()
4043 void Riscv64Assembler::VSlideup_vi(VRegister vd, VRegister vs2, uint32_t uimm5, VM vm) { in VSlideup_vi()
4068 void Riscv64Assembler::VSlidedown_vi(VRegister vd, VRegister vs2, uint32_t uimm5, VM vm) { in VSlidedown_vi()
4469 void Riscv64Assembler::VSll_vi(VRegister vd, VRegister vs2, uint32_t uimm5, VM vm) { in VSll_vi()
4538 void Riscv64Assembler::VSrl_vi(VRegister vd, VRegister vs2, uint32_t uimm5, VM vm) { in VSrl_vi()
4559 void Riscv64Assembler::VSra_vi(VRegister vd, VRegister vs2, uint32_t uimm5, VM vm) { in VSra_vi()
4580 void Riscv64Assembler::VSsrl_vi(VRegister vd, VRegister vs2, uint32_t uimm5, VM vm) { in VSsrl_vi()
4601 void Riscv64Assembler::VSsra_vi(VRegister vd, VRegister vs2, uint32_t uimm5, VM vm) { in VSsra_vi()
4622 void Riscv64Assembler::VNsrl_wi(VRegister vd, VRegister vs2, uint32_t uimm5, VM vm) { in VNsrl_wi()
4648 void Riscv64Assembler::VNsra_wi(VRegister vd, VRegister vs2, uint32_t uimm5, VM vm) { in VNsra_wi()
4669 void Riscv64Assembler::VNclipu_wi(VRegister vd, VRegister vs2, uint32_t uimm5, VM vm) { in VNclipu_wi()
4690 void Riscv64Assembler::VNclip_wi(VRegister vd, VRegister vs2, uint32_t uimm5, VM vm) { in VNclip_wi()
6346 void Riscv64Assembler::Csrwi(uint32_t csr, uint32_t uimm5) { in Csrwi()
6350 void Riscv64Assembler::Csrsi(uint32_t csr, uint32_t uimm5) { in Csrsi()
6354 void Riscv64Assembler::Csrci(uint32_t csr, uint32_t uimm5) { in Csrci()