Lines Matching full:printf
71 printf("%-21s(%#x) 0x%08x %s\n", # reg, reg, dword, desc); \
77 printf("%-21s(%#x) 0x%08x %s\n", # reg, reg, dword, desc); \
83 printf("%-21s(%#x) 0x%08x %s\n", # reg, reg, dword, desc); \
495 /* printf("%-18s %8s %s\n\n", "register name", "raw value", "description"); */ in dump_eaglelake()
533 printf("\nDetails:\n\n"); in dump_eaglelake()
536 printf("AUD_VID_DID vendor id\t\t\t0x%x\n", dword >> 16); in dump_eaglelake()
537 printf("AUD_VID_DID device id\t\t\t0x%x\n", dword & 0xffff); in dump_eaglelake()
540 printf("AUD_RID major revision\t\t\t0x%lx\n", REG_BITS(dword, 23, 20)); in dump_eaglelake()
541 printf("AUD_RID minor revision\t\t\t0x%lx\n", REG_BITS(dword, 19, 16)); in dump_eaglelake()
542 printf("AUD_RID revision id\t\t\t0x%lx\n", REG_BITS(dword, 15, 8)); in dump_eaglelake()
543 printf("AUD_RID stepping id\t\t\t0x%lx\n", REG_BITS(dword, 7, 0)); in dump_eaglelake()
546 printf("SDVOB enable\t\t\t\t%u\n", !!(dword & SDVO_ENABLE)); in dump_eaglelake()
547 printf("SDVOB HDMI encoding\t\t\t%u\n", !!(dword & SDVO_ENCODING_HDMI)); in dump_eaglelake()
548 printf("SDVOB SDVO encoding\t\t\t%u\n", !!(dword & SDVO_ENCODING_SDVO)); in dump_eaglelake()
549 printf("SDVOB null packets\t\t\t%u\n", !!(dword & SDVO_NULL_PACKETS_DURING_VSYNC)); in dump_eaglelake()
550 printf("SDVOB audio enabled\t\t\t%u\n", !!(dword & SDVO_AUDIO_ENABLE)); in dump_eaglelake()
553 printf("SDVOC enable\t\t\t\t%u\n", !!(dword & SDVO_ENABLE)); in dump_eaglelake()
554 printf("SDVOC HDMI encoding\t\t\t%u\n", !!(dword & SDVO_ENCODING_HDMI)); in dump_eaglelake()
555 printf("SDVOC SDVO encoding\t\t\t%u\n", !!(dword & SDVO_ENCODING_SDVO)); in dump_eaglelake()
556 printf("SDVOC null packets\t\t\t%u\n", !!(dword & SDVO_NULL_PACKETS_DURING_VSYNC)); in dump_eaglelake()
557 printf("SDVOC audio enabled\t\t\t%u\n", !!(dword & SDVO_AUDIO_ENABLE)); in dump_eaglelake()
560 printf("PORT_HOTPLUG_EN DisplayPort/HDMI port B\t%ld\n", REG_BIT(dword, 29)), in dump_eaglelake()
561 printf("PORT_HOTPLUG_EN DisplayPort/HDMI port C\t%ld\n", REG_BIT(dword, 28)), in dump_eaglelake()
562 printf("PORT_HOTPLUG_EN DisplayPort port D\t%ld\n", REG_BIT(dword, 27)), in dump_eaglelake()
563 printf("PORT_HOTPLUG_EN SDVOB\t\t\t%ld\n", REG_BIT(dword, 26)), in dump_eaglelake()
564 printf("PORT_HOTPLUG_EN SDVOC\t\t\t%ld\n", REG_BIT(dword, 25)), in dump_eaglelake()
565 printf("PORT_HOTPLUG_EN audio\t\t\t%ld\n", REG_BIT(dword, 24)), in dump_eaglelake()
566 printf("PORT_HOTPLUG_EN TV\t\t\t%ld\n", REG_BIT(dword, 23)), in dump_eaglelake()
567 printf("PORT_HOTPLUG_EN CRT\t\t\t%ld\n", REG_BIT(dword, 9)), in dump_eaglelake()
570 printf("VIDEO_DIP_CTL enable graphics DIP\t%ld\n", REG_BIT(dword, 31)), in dump_eaglelake()
571 printf("VIDEO_DIP_CTL port select\t\t[0x%lx] %s\n", in dump_eaglelake()
573 printf("VIDEO_DIP_CTL DIP buffer trans active\t%lu\n", REG_BIT(dword, 28)); in dump_eaglelake()
574 printf("VIDEO_DIP_CTL AVI DIP enabled\t\t%lu\n", REG_BIT(dword, 21)); in dump_eaglelake()
575 printf("VIDEO_DIP_CTL vendor DIP enabled\t%lu\n", REG_BIT(dword, 22)); in dump_eaglelake()
576 printf("VIDEO_DIP_CTL SPD DIP enabled\t\t%lu\n", REG_BIT(dword, 24)); in dump_eaglelake()
577 printf("VIDEO_DIP_CTL DIP buffer index\t\t[0x%lx] %s\n", in dump_eaglelake()
579 printf("VIDEO_DIP_CTL DIP trans freq\t\t[0x%lx] %s\n", in dump_eaglelake()
581 printf("VIDEO_DIP_CTL DIP buffer size\t\t%lu\n", REG_BITS(dword, 11, 8)); in dump_eaglelake()
582 printf("VIDEO_DIP_CTL DIP address\t\t%lu\n", REG_BITS(dword, 3, 0)); in dump_eaglelake()
585 printf("AUD_CONFIG pixel clock\t\t\t[0x%lx] %s\n", REG_BITS(dword, 19, 16), in dump_eaglelake()
587 printf("AUD_CONFIG fabrication enabled\t\t%lu\n", REG_BITS(dword, 2, 2)); in dump_eaglelake()
588 printf("AUD_CONFIG professional use allowed\t%lu\n", REG_BIT(dword, 1)); in dump_eaglelake()
589 printf("AUD_CONFIG fuse enabled\t\t\t%lu\n", REG_BIT(dword, 0)); in dump_eaglelake()
592 printf("AUD_DEBUG function reset\t\t%lu\n", REG_BIT(dword, 0)); in dump_eaglelake()
595 printf("AUD_SUBN_CNT starting node number\t0x%lx\n", REG_BITS(dword, 23, 16)); in dump_eaglelake()
596 printf("AUD_SUBN_CNT total number of nodes\t0x%lx\n", REG_BITS(dword, 7, 0)); in dump_eaglelake()
599 printf("AUD_SUBN_CNT2 starting node number\t0x%lx\n", REG_BITS(dword, 24, 16)); in dump_eaglelake()
600 printf("AUD_SUBN_CNT2 total number of nodes\t0x%lx\n", REG_BITS(dword, 7, 0)); in dump_eaglelake()
603 printf("AUD_FUNC_GRP unsol capable\t\t%lu\n", REG_BIT(dword, 8)); in dump_eaglelake()
604 printf("AUD_FUNC_GRP node type\t\t\t0x%lx\n", REG_BITS(dword, 7, 0)); in dump_eaglelake()
607 printf("AUD_GRP_CAP beep 0\t\t\t%lu\n", REG_BIT(dword, 16)); in dump_eaglelake()
608 printf("AUD_GRP_CAP input delay\t\t\t%lu\n", REG_BITS(dword, 11, 8)); in dump_eaglelake()
609 printf("AUD_GRP_CAP output delay\t\t%lu\n", REG_BITS(dword, 3, 0)); in dump_eaglelake()
612 printf("AUD_PWRST device power state\t\t%s\n", in dump_eaglelake()
614 printf("AUD_PWRST device power state setting\t%s\n", in dump_eaglelake()
618 printf("AUD_SUPPWR support D0\t\t\t%lu\n", REG_BIT(dword, 0)); in dump_eaglelake()
619 printf("AUD_SUPPWR support D1\t\t\t%lu\n", REG_BIT(dword, 1)); in dump_eaglelake()
620 printf("AUD_SUPPWR support D2\t\t\t%lu\n", REG_BIT(dword, 2)); in dump_eaglelake()
621 printf("AUD_SUPPWR support D3\t\t\t%lu\n", REG_BIT(dword, 3)); in dump_eaglelake()
624 printf("AUD_OUT_CWCAP widget type\t\t0x%lx\n", REG_BITS(dword, 23, 20)); in dump_eaglelake()
625 printf("AUD_OUT_CWCAP sample delay\t\t0x%lx\n", REG_BITS(dword, 19, 16)); in dump_eaglelake()
626 printf("AUD_OUT_CWCAP channel count\t\t%lu\n", in dump_eaglelake()
628 printf("AUD_OUT_CWCAP L-R swap\t\t\t%lu\n", REG_BIT(dword, 11)); in dump_eaglelake()
629 printf("AUD_OUT_CWCAP power control\t\t%lu\n", REG_BIT(dword, 10)); in dump_eaglelake()
630 printf("AUD_OUT_CWCAP digital\t\t\t%lu\n", REG_BIT(dword, 9)); in dump_eaglelake()
631 printf("AUD_OUT_CWCAP conn list\t\t\t%lu\n", REG_BIT(dword, 8)); in dump_eaglelake()
632 printf("AUD_OUT_CWCAP unsol\t\t\t%lu\n", REG_BIT(dword, 7)); in dump_eaglelake()
633 printf("AUD_OUT_CWCAP mute\t\t\t%lu\n", REG_BIT(dword, 5)); in dump_eaglelake()
634 printf("AUD_OUT_CWCAP format override\t\t%lu\n", REG_BIT(dword, 4)); in dump_eaglelake()
635 printf("AUD_OUT_CWCAP amp param override\t%lu\n", REG_BIT(dword, 3)); in dump_eaglelake()
636 printf("AUD_OUT_CWCAP out amp present\t\t%lu\n", REG_BIT(dword, 2)); in dump_eaglelake()
637 printf("AUD_OUT_CWCAP in amp present\t\t%lu\n", REG_BIT(dword, 1)); in dump_eaglelake()
640 printf("AUD_OUT_DIG_CNVT SPDIF category\t\t0x%lx\n", REG_BITS(dword, 14, 8)); in dump_eaglelake()
641 printf("AUD_OUT_DIG_CNVT SPDIF level\t\t%lu\n", REG_BIT(dword, 7)); in dump_eaglelake()
642 printf("AUD_OUT_DIG_CNVT professional\t\t%lu\n", REG_BIT(dword, 6)); in dump_eaglelake()
643 printf("AUD_OUT_DIG_CNVT non PCM\t\t%lu\n", REG_BIT(dword, 5)); in dump_eaglelake()
644 printf("AUD_OUT_DIG_CNVT copyright asserted\t%lu\n", REG_BIT(dword, 4)); in dump_eaglelake()
645 printf("AUD_OUT_DIG_CNVT filter preemphasis\t%lu\n", REG_BIT(dword, 3)); in dump_eaglelake()
646 printf("AUD_OUT_DIG_CNVT validity config\t%lu\n", REG_BIT(dword, 2)); in dump_eaglelake()
647 printf("AUD_OUT_DIG_CNVT validity flag\t\t%lu\n", REG_BIT(dword, 1)); in dump_eaglelake()
648 printf("AUD_OUT_DIG_CNVT digital enable\t\t%lu\n", REG_BIT(dword, 0)); in dump_eaglelake()
651 printf("AUD_OUT_CH_STR stream id\t\t0x%lx\n", REG_BITS(dword, 7, 4)); in dump_eaglelake()
652 printf("AUD_OUT_CH_STR lowest channel\t\t%lu\n", REG_BITS(dword, 3, 0)); in dump_eaglelake()
655 printf("AUD_OUT_STR_DESC stream channels\t%lu\n", REG_BITS(dword, 3, 0) + 1); in dump_eaglelake()
656 printf("AUD_OUT_STR_DESC Bits per Sample\t[%#lx] %s\n", in dump_eaglelake()
660 printf("AUD_PINW_CAP widget type\t\t0x%lx\n", REG_BITS(dword, 23, 20)); in dump_eaglelake()
661 printf("AUD_PINW_CAP sample delay\t\t0x%lx\n", REG_BITS(dword, 19, 16)); in dump_eaglelake()
662 printf("AUD_PINW_CAP channel count\t\t%lu\n", in dump_eaglelake()
664 printf("AUD_PINW_CAP HDCP\t\t\t%lu\n", REG_BIT(dword, 12)); in dump_eaglelake()
665 printf("AUD_PINW_CAP L-R swap\t\t\t%lu\n", REG_BIT(dword, 11)); in dump_eaglelake()
666 printf("AUD_PINW_CAP power control\t\t%lu\n", REG_BIT(dword, 10)); in dump_eaglelake()
667 printf("AUD_PINW_CAP digital\t\t\t%lu\n", REG_BIT(dword, 9)); in dump_eaglelake()
668 printf("AUD_PINW_CAP conn list\t\t\t%lu\n", REG_BIT(dword, 8)); in dump_eaglelake()
669 printf("AUD_PINW_CAP unsol\t\t\t%lu\n", REG_BIT(dword, 7)); in dump_eaglelake()
670 printf("AUD_PINW_CAP mute\t\t\t%lu\n", REG_BIT(dword, 5)); in dump_eaglelake()
671 printf("AUD_PINW_CAP format override\t\t%lu\n", REG_BIT(dword, 4)); in dump_eaglelake()
672 printf("AUD_PINW_CAP amp param override\t\t%lu\n", REG_BIT(dword, 3)); in dump_eaglelake()
673 printf("AUD_PINW_CAP out amp present\t\t%lu\n", REG_BIT(dword, 2)); in dump_eaglelake()
674 printf("AUD_PINW_CAP in amp present\t\t%lu\n", REG_BIT(dword, 1)); in dump_eaglelake()
678 printf("AUD_PIN_CAP EAPD\t\t\t%lu\n", REG_BIT(dword, 16)); in dump_eaglelake()
679 printf("AUD_PIN_CAP HDMI\t\t\t%lu\n", REG_BIT(dword, 7)); in dump_eaglelake()
680 printf("AUD_PIN_CAP output\t\t\t%lu\n", REG_BIT(dword, 4)); in dump_eaglelake()
681 printf("AUD_PIN_CAP presence detect\t\t%lu\n", REG_BIT(dword, 2)); in dump_eaglelake()
684 printf("AUD_PINW_CNTR mute status\t\t%lu\n", REG_BIT(dword, 8)); in dump_eaglelake()
685 printf("AUD_PINW_CNTR out enable\t\t%lu\n", REG_BIT(dword, 6)); in dump_eaglelake()
686 printf("AUD_PINW_CNTR amp mute status\t\t%lu\n", REG_BIT(dword, 8)); in dump_eaglelake()
687 printf("AUD_PINW_CNTR amp mute status\t\t%lu\n", REG_BIT(dword, 8)); in dump_eaglelake()
688 printf("AUD_PINW_CNTR stream type\t\t[0x%lx] %s\n", in dump_eaglelake()
693 printf("AUD_PINW_UNSOLRESP enable unsol resp\t%lu\n", REG_BIT(dword, 31)); in dump_eaglelake()
696 printf("AUD_CNTL_ST DIP audio enabled\t\t%lu\n", REG_BIT(dword, 21)); in dump_eaglelake()
697 printf("AUD_CNTL_ST DIP ACP enabled\t\t%lu\n", REG_BIT(dword, 22)); in dump_eaglelake()
698 printf("AUD_CNTL_ST DIP ISRCx enabled\t\t%lu\n", REG_BIT(dword, 23)); in dump_eaglelake()
699 printf("AUD_CNTL_ST DIP port select\t\t[0x%lx] %s\n", in dump_eaglelake()
701 printf("AUD_CNTL_ST DIP buffer index\t\t[0x%lx] %s\n", in dump_eaglelake()
703 printf("AUD_CNTL_ST DIP trans freq\t\t[0x%lx] %s\n", in dump_eaglelake()
705 printf("AUD_CNTL_ST DIP address\t\t\t%lu\n", REG_BITS(dword, 3, 0)); in dump_eaglelake()
706 printf("AUD_CNTL_ST CP ready\t\t\t%lu\n", REG_BIT(dword, 15)); in dump_eaglelake()
707 printf("AUD_CNTL_ST ELD valid\t\t\t%lu\n", REG_BIT(dword, 14)); in dump_eaglelake()
708 printf("AUD_CNTL_ST ELD ack\t\t\t%lu\n", REG_BIT(dword, 4)); in dump_eaglelake()
709 printf("AUD_CNTL_ST ELD bufsize\t\t\t%lu\n", REG_BITS(dword, 13, 9)); in dump_eaglelake()
710 printf("AUD_CNTL_ST ELD address\t\t\t%lu\n", REG_BITS(dword, 8, 5)); in dump_eaglelake()
713 printf("AUD_HDMIW_STATUS CDCLK/DOTCLK underrun\t%lu\n", REG_BIT(dword, 31)); in dump_eaglelake()
714 printf("AUD_HDMIW_STATUS CDCLK/DOTCLK overrun\t%lu\n", REG_BIT(dword, 30)); in dump_eaglelake()
715 printf("AUD_HDMIW_STATUS BCLK/CDCLK underrun\t%lu\n", REG_BIT(dword, 29)); in dump_eaglelake()
716 printf("AUD_HDMIW_STATUS BCLK/CDCLK overrun\t%lu\n", REG_BIT(dword, 28)); in dump_eaglelake()
719 printf("AUD_CONV_CHCNT HDMI HBR enabled\t\t%lu\n", REG_BITS(dword, 15, 14)); in dump_eaglelake()
720 printf("AUD_CONV_CHCNT HDMI channel count\t%lu\n", REG_BITS(dword, 11, 8) + 1); in dump_eaglelake()
722 printf("AUD_CONV_CHCNT HDMI channel mapping:\n"); in dump_eaglelake()
726 printf("\t\t\t\t\t[0x%x] %u => %lu\n", dword, i, REG_BITS(dword, 7, 4)); in dump_eaglelake()
729 printf("AUD_HDMIW_HDMIEDID HDMI ELD:\n\t"); in dump_eaglelake()
734 printf("%08x ", htonl(INREG(AUD_HDMIW_HDMIEDID))); in dump_eaglelake()
735 printf("\n"); in dump_eaglelake()
737 printf("AUD_HDMIW_INFOFR HDMI audio Infoframe:\n\t"); in dump_eaglelake()
743 printf("%08x ", htonl(INREG(AUD_HDMIW_INFOFR))); in dump_eaglelake()
744 printf("\n"); in dump_eaglelake()
864 printf("\nDetails:\n\n"); in dump_cpt()
867 printf("VIDEO_DIP_CTL_A Enable_Graphics_DIP\t\t\t%ld\n", REG_BIT(dword, 31)), in dump_cpt()
868 printf("VIDEO_DIP_CTL_A GCP_DIP_enable\t\t\t\t%ld\n", REG_BIT(dword, 25)), in dump_cpt()
869 printf("VIDEO_DIP_CTL_A Video_DIP_type_enable AVI\t\t%lu\n", REG_BIT(dword, 21)); in dump_cpt()
870 printf("VIDEO_DIP_CTL_A Video_DIP_type_enable Vendor\t\t%lu\n", REG_BIT(dword, 22)); in dump_cpt()
871 printf("VIDEO_DIP_CTL_A Video_DIP_type_enable Gamut\t\t%lu\n", REG_BIT(dword, 23)); in dump_cpt()
872 printf("VIDEO_DIP_CTL_A Video_DIP_type_enable Source \t\t%lu\n", REG_BIT(dword, 24)); in dump_cpt()
873 printf("VIDEO_DIP_CTL_A Video_DIP_buffer_index\t\t\t[0x%lx] %s\n", in dump_cpt()
875 printf("VIDEO_DIP_CTL_A Video_DIP_frequency\t\t\t[0x%lx] %s\n", in dump_cpt()
877 printf("VIDEO_DIP_CTL_A Video_DIP_buffer_size\t\t\t%lu\n", REG_BITS(dword, 11, 8)); in dump_cpt()
878 printf("VIDEO_DIP_CTL_A Video_DIP_access_address\t\t%lu\n", REG_BITS(dword, 3, 0)); in dump_cpt()
881 printf("VIDEO_DIP_CTL_B Enable_Graphics_DIP\t\t\t%ld\n", REG_BIT(dword, 31)), in dump_cpt()
882 printf("VIDEO_DIP_CTL_B GCP_DIP_enable\t\t\t\t%ld\n", REG_BIT(dword, 25)), in dump_cpt()
883 printf("VIDEO_DIP_CTL_B Video_DIP_type_enable AVI\t\t%lu\n", REG_BIT(dword, 21)); in dump_cpt()
884 printf("VIDEO_DIP_CTL_B Video_DIP_type_enable Vendor\t\t%lu\n", REG_BIT(dword, 22)); in dump_cpt()
885 printf("VIDEO_DIP_CTL_B Video_DIP_type_enable Gamut\t\t%lu\n", REG_BIT(dword, 23)); in dump_cpt()
886 printf("VIDEO_DIP_CTL_B Video_DIP_type_enable Source \t\t%lu\n", REG_BIT(dword, 24)); in dump_cpt()
887 printf("VIDEO_DIP_CTL_B Video_DIP_buffer_index\t\t\t[0x%lx] %s\n", in dump_cpt()
889 printf("VIDEO_DIP_CTL_B Video_DIP_frequency\t\t\t[0x%lx] %s\n", in dump_cpt()
891 printf("VIDEO_DIP_CTL_B Video_DIP_buffer_size\t\t\t%lu\n", REG_BITS(dword, 11, 8)); in dump_cpt()
892 printf("VIDEO_DIP_CTL_B Video_DIP_access_address\t\t%lu\n", REG_BITS(dword, 3, 0)); in dump_cpt()
895 printf("VIDEO_DIP_CTL_C Enable_Graphics_DIP\t\t\t%ld\n", REG_BIT(dword, 31)), in dump_cpt()
896 printf("VIDEO_DIP_CTL_C GCP_DIP_enable\t\t\t\t%ld\n", REG_BIT(dword, 25)), in dump_cpt()
897 printf("VIDEO_DIP_CTL_C Video_DIP_type_enable AVI\t\t%lu\n", REG_BIT(dword, 21)); in dump_cpt()
898 printf("VIDEO_DIP_CTL_C Video_DIP_type_enable Vendor\t\t%lu\n", REG_BIT(dword, 22)); in dump_cpt()
899 printf("VIDEO_DIP_CTL_C Video_DIP_type_enable Gamut\t\t%lu\n", REG_BIT(dword, 23)); in dump_cpt()
900 printf("VIDEO_DIP_CTL_C Video_DIP_type_enable Source \t\t%lu\n", REG_BIT(dword, 24)); in dump_cpt()
901 printf("VIDEO_DIP_CTL_C Video_DIP_buffer_index\t\t\t[0x%lx] %s\n", in dump_cpt()
903 printf("VIDEO_DIP_CTL_C Video_DIP_frequency\t\t\t[0x%lx] %s\n", in dump_cpt()
905 printf("VIDEO_DIP_CTL_C Video_DIP_buffer_size\t\t\t%lu\n", REG_BITS(dword, 11, 8)); in dump_cpt()
906 printf("VIDEO_DIP_CTL_C Video_DIP_access_address\t\t%lu\n", REG_BITS(dword, 3, 0)); in dump_cpt()
909 printf("AUD_VID_DID vendor id\t\t\t\t\t0x%x\n", dword >> 16); in dump_cpt()
910 printf("AUD_VID_DID device id\t\t\t\t\t0x%x\n", dword & 0xffff); in dump_cpt()
913 printf("AUD_RID Major_Revision\t\t\t\t\t0x%lx\n", REG_BITS(dword, 23, 20)); in dump_cpt()
914 printf("AUD_RID Minor_Revision\t\t\t\t\t0x%lx\n", REG_BITS(dword, 19, 16)); in dump_cpt()
915 printf("AUD_RID Revision_Id\t\t\t\t\t0x%lx\n", REG_BITS(dword, 15, 8)); in dump_cpt()
916 printf("AUD_RID Stepping_Id\t\t\t\t\t0x%lx\n", REG_BITS(dword, 7, 0)); in dump_cpt()
919 printf("HDMIB Port_Enable\t\t\t\t\t%u\n", !!(dword & SDVO_ENABLE)); in dump_cpt()
920 printf("HDMIB Transcoder_Select\t\t\t\t\t[0x%lx] %s\n", in dump_cpt()
922 printf("HDMIB sDVO_Border_Enable\t\t\t\t%lu\n", REG_BIT(dword, 7)); in dump_cpt()
923 printf("HDMIB HDCP_Port_Select\t\t\t\t\t%lu\n", REG_BIT(dword, 5)); in dump_cpt()
924 printf("HDMIB SDVO_HPD_Interrupt_Enable\t\t\t\t%lu\n", REG_BIT(dword, 23)); in dump_cpt()
925 printf("HDMIB Port_Detected\t\t\t\t\t%lu\n", REG_BIT(dword, 2)); in dump_cpt()
926 printf("HDMIB Encoding\t\t\t\t\t\t[0x%lx] %s\n", in dump_cpt()
928 printf("HDMIB HDMI_or_DVI_Select\t\t\t\t%s\n", REG_BIT(dword, 9) ? "HDMI" : "DVI"); in dump_cpt()
929 printf("HDMIB Audio_Output_Enable\t\t\t\t%u\n", !!(dword & SDVO_AUDIO_ENABLE)); in dump_cpt()
932 printf("HDMIC Port_Enable\t\t\t\t\t%u\n", !!(dword & SDVO_ENABLE)); in dump_cpt()
933 printf("HDMIC Transcoder_Select\t\t\t\t\t[0x%lx] %s\n", in dump_cpt()
935 printf("HDMIC sDVO_Border_Enable\t\t\t\t%lu\n", REG_BIT(dword, 7)); in dump_cpt()
936 printf("HDMIC HDCP_Port_Select\t\t\t\t\t%lu\n", REG_BIT(dword, 5)); in dump_cpt()
937 printf("HDMIC SDVO_HPD_Interrupt_Enable\t\t\t\t%lu\n", REG_BIT(dword, 23)); in dump_cpt()
938 printf("HDMIC Port_Detected\t\t\t\t\t%lu\n", REG_BIT(dword, 2)); in dump_cpt()
939 printf("HDMIC Encoding\t\t\t\t\t\t[0x%lx] %s\n", in dump_cpt()
941 printf("HDMIC HDMI_or_DVI_Select\t\t\t\t%s\n", REG_BIT(dword, 9) ? "HDMI" : "DVI"); in dump_cpt()
942 printf("HDMIC Audio_Output_Enable\t\t\t\t%u\n", !!(dword & SDVO_AUDIO_ENABLE)); in dump_cpt()
945 printf("HDMID Port_Enable\t\t\t\t\t%u\n", !!(dword & SDVO_ENABLE)); in dump_cpt()
946 printf("HDMID Transcoder_Select\t\t\t\t\t[0x%lx] %s\n", in dump_cpt()
948 printf("HDMID sDVO_Border_Enable\t\t\t\t%lu\n", REG_BIT(dword, 7)); in dump_cpt()
949 printf("HDMID HDCP_Port_Select\t\t\t\t\t%lu\n", REG_BIT(dword, 5)); in dump_cpt()
950 printf("HDMID SDVO_HPD_Interrupt_Enable\t\t\t\t%lu\n", REG_BIT(dword, 23)); in dump_cpt()
951 printf("HDMID Port_Detected\t\t\t\t\t%lu\n", REG_BIT(dword, 2)); in dump_cpt()
952 printf("HDMID Encoding\t\t\t\t\t\t[0x%lx] %s\n", in dump_cpt()
954 printf("HDMID HDMI_or_DVI_Select\t\t\t\t%s\n", REG_BIT(dword, 9) ? "HDMI" : "DVI"); in dump_cpt()
955 printf("HDMID Audio_Output_Enable\t\t\t\t%u\n", !!(dword & SDVO_AUDIO_ENABLE)); in dump_cpt()
958 printf("DP_CTL_B DisplayPort_Enable\t\t\t\t%lu\n", REG_BIT(dword, 31)); in dump_cpt()
959 printf("DP_CTL_B Port_Width_Selection\t\t\t\t[0x%lx] %s\n", in dump_cpt()
961 printf("DP_CTL_B Port_Detected\t\t\t\t\t%lu\n", REG_BIT(dword, 2)); in dump_cpt()
962 printf("DP_CTL_B HDCP_Port_Select\t\t\t\t%lu\n", REG_BIT(dword, 5)); in dump_cpt()
963 printf("DP_CTL_B Audio_Output_Enable\t\t\t\t%lu\n", REG_BIT(dword, 6)); in dump_cpt()
966 printf("DP_CTL_C DisplayPort_Enable\t\t\t\t%lu\n", REG_BIT(dword, 31)); in dump_cpt()
967 printf("DP_CTL_C Port_Width_Selection\t\t\t\t[0x%lx] %s\n", in dump_cpt()
969 printf("DP_CTL_C Port_Detected\t\t\t\t\t%lu\n", REG_BIT(dword, 2)); in dump_cpt()
970 printf("DP_CTL_C HDCP_Port_Select\t\t\t\t%lu\n", REG_BIT(dword, 5)); in dump_cpt()
971 printf("DP_CTL_C Audio_Output_Enable\t\t\t\t%lu\n", REG_BIT(dword, 6)); in dump_cpt()
974 printf("DP_CTL_D DisplayPort_Enable\t\t\t\t%lu\n", REG_BIT(dword, 31)); in dump_cpt()
975 printf("DP_CTL_D Port_Width_Selection\t\t\t\t[0x%lx] %s\n", in dump_cpt()
977 printf("DP_CTL_D Port_Detected\t\t\t\t\t%lu\n", REG_BIT(dword, 2)); in dump_cpt()
978 printf("DP_CTL_D HDCP_Port_Select\t\t\t\t%lu\n", REG_BIT(dword, 5)); in dump_cpt()
979 printf("DP_CTL_D Audio_Output_Enable\t\t\t\t%lu\n", REG_BIT(dword, 6)); in dump_cpt()
982 printf("AUD_CONFIG_A N_index_value\t\t\t\t[0x%lx] %s\n", REG_BIT(dword, 29), in dump_cpt()
984 printf("AUD_CONFIG_A N_programming_enable\t\t\t%lu\n", REG_BIT(dword, 28)); in dump_cpt()
985 printf("AUD_CONFIG_A Upper_N_value\t\t\t\t0x%02lx\n", REG_BITS(dword, 27, 20)); in dump_cpt()
986 printf("AUD_CONFIG_A Lower_N_value\t\t\t\t0x%03lx\n", REG_BITS(dword, 15, 4)); in dump_cpt()
987 printf("AUD_CONFIG_A Pixel_Clock_HDMI\t\t\t\t[0x%lx] %s\n", REG_BITS(dword, 19, 16), in dump_cpt()
989 printf("AUD_CONFIG_A Disable_NCTS\t\t\t\t%lu\n", REG_BIT(dword, 3)); in dump_cpt()
991 printf("AUD_CONFIG_B N_index_value\t\t\t\t[0x%lx] %s\n", REG_BIT(dword, 29), in dump_cpt()
993 printf("AUD_CONFIG_B N_programming_enable\t\t\t%lu\n", REG_BIT(dword, 28)); in dump_cpt()
994 printf("AUD_CONFIG_B Upper_N_value\t\t\t\t0x%02lx\n", REG_BITS(dword, 27, 20)); in dump_cpt()
995 printf("AUD_CONFIG_B Lower_N_value\t\t\t\t0x%03lx\n", REG_BITS(dword, 15, 4)); in dump_cpt()
996 printf("AUD_CONFIG_B Pixel_Clock_HDMI\t\t\t\t[0x%lx] %s\n", REG_BITS(dword, 19, 16), in dump_cpt()
998 printf("AUD_CONFIG_B Disable_NCTS\t\t\t\t%lu\n", REG_BIT(dword, 3)); in dump_cpt()
1000 printf("AUD_CONFIG_C N_index_value\t\t\t\t[0x%lx] %s\n", REG_BIT(dword, 29), in dump_cpt()
1002 printf("AUD_CONFIG_C N_programming_enable\t\t\t%lu\n", REG_BIT(dword, 28)); in dump_cpt()
1003 printf("AUD_CONFIG_C Upper_N_value\t\t\t\t0x%02lx\n", REG_BITS(dword, 27, 20)); in dump_cpt()
1004 printf("AUD_CONFIG_C Lower_N_value\t\t\t\t0x%03lx\n", REG_BITS(dword, 15, 4)); in dump_cpt()
1005 printf("AUD_CONFIG_C Pixel_Clock_HDMI\t\t\t\t[0x%lx] %s\n", REG_BITS(dword, 19, 16), in dump_cpt()
1007 printf("AUD_CONFIG_C Disable_NCTS\t\t\t\t%lu\n", REG_BIT(dword, 3)); in dump_cpt()
1010 printf("AUD_CTS_ENABLE_A Enable_CTS_or_M_programming\t\t%lu\n", REG_BIT(dword, 20)); in dump_cpt()
1011 printf("AUD_CTS_ENABLE_A CTS_M value Index\t\t\t%s\n", REG_BIT(dword, 21) ? "CTS" : "M"); in dump_cpt()
1012 printf("AUD_CTS_ENABLE_A CTS_programming\t\t\t%#lx\n", REG_BITS(dword, 19, 0)); in dump_cpt()
1014 printf("AUD_CTS_ENABLE_B Enable_CTS_or_M_programming\t\t%lu\n", REG_BIT(dword, 20)); in dump_cpt()
1015 printf("AUD_CTS_ENABLE_B CTS_M value Index\t\t\t%s\n", REG_BIT(dword, 21) ? "CTS" : "M"); in dump_cpt()
1016 printf("AUD_CTS_ENABLE_B CTS_programming\t\t\t%#lx\n", REG_BITS(dword, 19, 0)); in dump_cpt()
1018 printf("AUD_CTS_ENABLE_C Enable_CTS_or_M_programming\t\t%lu\n", REG_BIT(dword, 20)); in dump_cpt()
1019 printf("AUD_CTS_ENABLE_C CTS_M value Index\t\t\t%s\n", REG_BIT(dword, 21) ? "CTS" : "M"); in dump_cpt()
1020 printf("AUD_CTS_ENABLE_C CTS_programming\t\t\t%#lx\n", REG_BITS(dword, 19, 0)); in dump_cpt()
1023 printf("AUD_MISC_CTRL_A Sample_Fabrication_EN_bit\t\t%lu\n", REG_BIT(dword, 2)); in dump_cpt()
1024 printf("AUD_MISC_CTRL_A Sample_present_Disable\t\t\t%lu\n", REG_BIT(dword, 8)); in dump_cpt()
1025 printf("AUD_MISC_CTRL_A Output_Delay\t\t\t\t%lu\n", REG_BITS(dword, 7, 4)); in dump_cpt()
1026 printf("AUD_MISC_CTRL_A Pro_Allowed\t\t\t\t%lu\n", REG_BIT(dword, 1)); in dump_cpt()
1028 printf("AUD_MISC_CTRL_B Sample_Fabrication_EN_bit\t\t%lu\n", REG_BIT(dword, 2)); in dump_cpt()
1029 printf("AUD_MISC_CTRL_B Sample_present_Disable\t\t\t%lu\n", REG_BIT(dword, 8)); in dump_cpt()
1030 printf("AUD_MISC_CTRL_B Output_Delay\t\t\t\t%lu\n", REG_BITS(dword, 7, 4)); in dump_cpt()
1031 printf("AUD_MISC_CTRL_B Pro_Allowed\t\t\t\t%lu\n", REG_BIT(dword, 1)); in dump_cpt()
1033 printf("AUD_MISC_CTRL_C Sample_Fabrication_EN_bit\t\t%lu\n", REG_BIT(dword, 2)); in dump_cpt()
1034 printf("AUD_MISC_CTRL_C Sample_present_Disable\t\t\t%lu\n", REG_BIT(dword, 8)); in dump_cpt()
1035 printf("AUD_MISC_CTRL_C Output_Delay\t\t\t\t%lu\n", REG_BITS(dword, 7, 4)); in dump_cpt()
1036 printf("AUD_MISC_CTRL_C Pro_Allowed\t\t\t\t%lu\n", REG_BIT(dword, 1)); in dump_cpt()
1039 …printf("AUD_PWRST Func_Grp_Dev_PwrSt_Curr \t%s\n", power_state[REG_BITS(dword, 2… in dump_cpt()
1040 …printf("AUD_PWRST Func_Grp_Dev_PwrSt_Set \t%s\n", power_state[REG_BITS(dword, 2… in dump_cpt()
1041 …printf("AUD_PWRST ConvertorA_Widget_Power_State_Current \t%s\n", power_state[REG_BITS(dword, 1… in dump_cpt()
1042 …printf("AUD_PWRST ConvertorA_Widget_Power_State_Requsted \t%s\n", power_state[REG_BITS(dword, 1… in dump_cpt()
1043 …printf("AUD_PWRST ConvertorB_Widget_Power_State_Current \t%s\n", power_state[REG_BITS(dword, 1… in dump_cpt()
1044 …printf("AUD_PWRST ConvertorB_Widget_Power_State_Requested \t%s\n", power_state[REG_BITS(dword, 1… in dump_cpt()
1045 …printf("AUD_PWRST ConvC_Widget_PwrSt_Curr \t%s\n", power_state[REG_BITS(dword, 2… in dump_cpt()
1046 …printf("AUD_PWRST ConvC_Widget_PwrSt_Req \t%s\n", power_state[REG_BITS(dword, 2… in dump_cpt()
1047 …printf("AUD_PWRST PinB_Widget_Power_State_Current \t%s\n", power_state[REG_BITS(dword, … in dump_cpt()
1048 …printf("AUD_PWRST PinB_Widget_Power_State_Set \t%s\n", power_state[REG_BITS(dword, … in dump_cpt()
1049 …printf("AUD_PWRST PinC_Widget_Power_State_Current \t%s\n", power_state[REG_BITS(dword, … in dump_cpt()
1050 …printf("AUD_PWRST PinC_Widget_Power_State_Set \t%s\n", power_state[REG_BITS(dword, … in dump_cpt()
1051 …printf("AUD_PWRST PinD_Widget_Power_State_Current \t%s\n", power_state[REG_BITS(dword, 1… in dump_cpt()
1052 …printf("AUD_PWRST PinD_Widget_Power_State_Set \t%s\n", power_state[REG_BITS(dword, … in dump_cpt()
1055 printf("AUD_PORT_EN_HD_CFG Convertor_A_Digen\t\t\t%lu\n", REG_BIT(dword, 0)); in dump_cpt()
1056 printf("AUD_PORT_EN_HD_CFG Convertor_B_Digen\t\t\t%lu\n", REG_BIT(dword, 1)); in dump_cpt()
1057 printf("AUD_PORT_EN_HD_CFG Convertor_C_Digen\t\t\t%lu\n", REG_BIT(dword, 2)); in dump_cpt()
1058 printf("AUD_PORT_EN_HD_CFG ConvertorA_Stream_ID\t\t%lu\n", REG_BITS(dword, 7, 4)); in dump_cpt()
1059 printf("AUD_PORT_EN_HD_CFG ConvertorB_Stream_ID\t\t%lu\n", REG_BITS(dword, 11, 8)); in dump_cpt()
1060 printf("AUD_PORT_EN_HD_CFG ConvertorC_Stream_ID\t\t%lu\n", REG_BITS(dword, 15, 12)); in dump_cpt()
1061 printf("AUD_PORT_EN_HD_CFG Port_B_Out_Enable\t\t\t%lu\n", REG_BIT(dword, 16)); in dump_cpt()
1062 printf("AUD_PORT_EN_HD_CFG Port_C_Out_Enable\t\t\t%lu\n", REG_BIT(dword, 17)); in dump_cpt()
1063 printf("AUD_PORT_EN_HD_CFG Port_D_Out_Enable\t\t\t%lu\n", REG_BIT(dword, 18)); in dump_cpt()
1064 printf("AUD_PORT_EN_HD_CFG Port_B_Amp_Mute_Status\t\t%lu\n", REG_BIT(dword, 20)); in dump_cpt()
1065 printf("AUD_PORT_EN_HD_CFG Port_C_Amp_Mute_Status\t\t%lu\n", REG_BIT(dword, 21)); in dump_cpt()
1066 printf("AUD_PORT_EN_HD_CFG Port_D_Amp_Mute_Status\t\t%lu\n", REG_BIT(dword, 22)); in dump_cpt()
1069 printf("AUD_OUT_DIG_CNVT_A V\t\t\t\t\t%lu\n", REG_BIT(dword, 1)); in dump_cpt()
1070 printf("AUD_OUT_DIG_CNVT_A VCFG\t\t\t\t%lu\n", REG_BIT(dword, 2)); in dump_cpt()
1071 printf("AUD_OUT_DIG_CNVT_A PRE\t\t\t\t\t%lu\n", REG_BIT(dword, 3)); in dump_cpt()
1072 printf("AUD_OUT_DIG_CNVT_A Copy\t\t\t\t%lu\n", REG_BIT(dword, 4)); in dump_cpt()
1073 printf("AUD_OUT_DIG_CNVT_A NonAudio\t\t\t\t%lu\n", REG_BIT(dword, 5)); in dump_cpt()
1074 printf("AUD_OUT_DIG_CNVT_A PRO\t\t\t\t\t%lu\n", REG_BIT(dword, 6)); in dump_cpt()
1075 printf("AUD_OUT_DIG_CNVT_A Level\t\t\t\t%lu\n", REG_BIT(dword, 7)); in dump_cpt()
1076 printf("AUD_OUT_DIG_CNVT_A Category_Code\t\t\t%lu\n", REG_BITS(dword, 14, 8)); in dump_cpt()
1077 printf("AUD_OUT_DIG_CNVT_A Lowest_Channel_Number\t\t%lu\n", REG_BITS(dword, 19, 16)); in dump_cpt()
1078 printf("AUD_OUT_DIG_CNVT_A Stream_ID\t\t\t\t%lu\n", REG_BITS(dword, 23, 20)); in dump_cpt()
1081 printf("AUD_OUT_DIG_CNVT_B V\t\t\t\t\t%lu\n", REG_BIT(dword, 1)); in dump_cpt()
1082 printf("AUD_OUT_DIG_CNVT_B VCFG\t\t\t\t%lu\n", REG_BIT(dword, 2)); in dump_cpt()
1083 printf("AUD_OUT_DIG_CNVT_B PRE\t\t\t\t\t%lu\n", REG_BIT(dword, 3)); in dump_cpt()
1084 printf("AUD_OUT_DIG_CNVT_B Copy\t\t\t\t%lu\n", REG_BIT(dword, 4)); in dump_cpt()
1085 printf("AUD_OUT_DIG_CNVT_B NonAudio\t\t\t\t%lu\n", REG_BIT(dword, 5)); in dump_cpt()
1086 printf("AUD_OUT_DIG_CNVT_B PRO\t\t\t\t\t%lu\n", REG_BIT(dword, 6)); in dump_cpt()
1087 printf("AUD_OUT_DIG_CNVT_B Level\t\t\t\t%lu\n", REG_BIT(dword, 7)); in dump_cpt()
1088 printf("AUD_OUT_DIG_CNVT_B Category_Code\t\t\t%lu\n", REG_BITS(dword, 14, 8)); in dump_cpt()
1089 printf("AUD_OUT_DIG_CNVT_B Lowest_Channel_Number\t\t%lu\n", REG_BITS(dword, 19, 16)); in dump_cpt()
1090 printf("AUD_OUT_DIG_CNVT_B Stream_ID\t\t\t\t%lu\n", REG_BITS(dword, 23, 20)); in dump_cpt()
1093 printf("AUD_OUT_DIG_CNVT_C V\t\t\t\t\t%lu\n", REG_BIT(dword, 1)); in dump_cpt()
1094 printf("AUD_OUT_DIG_CNVT_C VCFG\t\t\t\t%lu\n", REG_BIT(dword, 2)); in dump_cpt()
1095 printf("AUD_OUT_DIG_CNVT_C PRE\t\t\t\t\t%lu\n", REG_BIT(dword, 3)); in dump_cpt()
1096 printf("AUD_OUT_DIG_CNVT_C Copy\t\t\t\t%lu\n", REG_BIT(dword, 4)); in dump_cpt()
1097 printf("AUD_OUT_DIG_CNVT_C NonAudio\t\t\t\t%lu\n", REG_BIT(dword, 5)); in dump_cpt()
1098 printf("AUD_OUT_DIG_CNVT_C PRO\t\t\t\t\t%lu\n", REG_BIT(dword, 6)); in dump_cpt()
1099 printf("AUD_OUT_DIG_CNVT_C Level\t\t\t\t%lu\n", REG_BIT(dword, 7)); in dump_cpt()
1100 printf("AUD_OUT_DIG_CNVT_C Category_Code\t\t\t%lu\n", REG_BITS(dword, 14, 8)); in dump_cpt()
1101 printf("AUD_OUT_DIG_CNVT_C Lowest_Channel_Number\t\t%lu\n", REG_BITS(dword, 19, 16)); in dump_cpt()
1102 printf("AUD_OUT_DIG_CNVT_C Stream_ID\t\t\t\t%lu\n", REG_BITS(dword, 23, 20)); in dump_cpt()
1104 printf("AUD_OUT_CH_STR Converter_Channel_MAP PORTB PORTC PORTD\n"); in dump_cpt()
1108 printf("\t\t\t\t%lu\t%lu\t%lu\t%lu\n", in dump_cpt()
1116 printf("AUD_OUT_STR_DESC_A HBR_enable\t\t\t\t%lu\n", REG_BITS(dword, 28, 27)); in dump_cpt()
1117 printf("AUD_OUT_STR_DESC_A Convertor_Channel_Count\t\t%lu\n", REG_BITS(dword, 20, 16) + 1); in dump_cpt()
1118 printf("AUD_OUT_STR_DESC_A Bits_per_Sample\t\t\t[%#lx] %s\n", in dump_cpt()
1120 printf("AUD_OUT_STR_DESC_A Number_of_Channels_in_a_Stream\t%lu\n", 1 + REG_BITS(dword, 3, 0)); in dump_cpt()
1123 printf("AUD_OUT_STR_DESC_B HBR_enable\t\t\t\t%lu\n", REG_BITS(dword, 28, 27)); in dump_cpt()
1124 printf("AUD_OUT_STR_DESC_B Convertor_Channel_Count\t\t%lu\n", REG_BITS(dword, 20, 16) + 1); in dump_cpt()
1125 printf("AUD_OUT_STR_DESC_B Bits_per_Sample\t\t\t[%#lx] %s\n", in dump_cpt()
1127 printf("AUD_OUT_STR_DESC_B Number_of_Channels_in_a_Stream\t%lu\n", 1 + REG_BITS(dword, 3, 0)); in dump_cpt()
1130 printf("AUD_OUT_STR_DESC_C HBR_enable\t\t\t\t%lu\n", REG_BITS(dword, 28, 27)); in dump_cpt()
1131 printf("AUD_OUT_STR_DESC_C Convertor_Channel_Count\t\t%lu\n", REG_BITS(dword, 20, 16) + 1); in dump_cpt()
1132 printf("AUD_OUT_STR_DESC_C Bits_per_Sample\t\t\t[%#lx] %s\n", in dump_cpt()
1134 printf("AUD_OUT_STR_DESC_C Number_of_Channels_in_a_Stream\t%lu\n", 1 + REG_BITS(dword, 3, 0)); in dump_cpt()
1137 printf("AUD_PINW_CONNLNG_SEL Connection_select_Control_B\t%#lx\n", REG_BITS(dword, 7, 0)); in dump_cpt()
1138 printf("AUD_PINW_CONNLNG_SEL Connection_select_Control_C\t%#lx\n", REG_BITS(dword, 15, 8)); in dump_cpt()
1139 printf("AUD_PINW_CONNLNG_SEL Connection_select_Control_D\t%#lx\n", REG_BITS(dword, 23, 16)); in dump_cpt()
1142 printf("AUD_CNTL_ST_A DIP_Port_Select\t\t\t\t[%#lx] %s\n", in dump_cpt()
1144 printf("AUD_CNTL_ST_A DIP_type_enable_status Audio DIP\t\t%lu\n", REG_BIT(dword, 21)); in dump_cpt()
1145 printf("AUD_CNTL_ST_A DIP_type_enable_status ACP DIP\t\t%lu\n", REG_BIT(dword, 22)); in dump_cpt()
1146 printf("AUD_CNTL_ST_A DIP_type_enable_status Generic 2 DIP\t%lu\n", REG_BIT(dword, 23)); in dump_cpt()
1147 printf("AUD_CNTL_ST_A DIP_transmission_frequency\t\t[0x%lx] %s\n", in dump_cpt()
1149 printf("AUD_CNTL_ST_A ELD_ACK\t\t\t\t\t%lu\n", REG_BIT(dword, 4)); in dump_cpt()
1150 printf("AUD_CNTL_ST_A ELD_buffer_size\t\t\t\t%lu\n", REG_BITS(dword, 14, 10)); in dump_cpt()
1153 printf("AUD_CNTL_ST_B DIP_Port_Select\t\t\t\t[%#lx] %s\n", in dump_cpt()
1155 printf("AUD_CNTL_ST_B DIP_type_enable_status Audio DIP\t\t%lu\n", REG_BIT(dword, 21)); in dump_cpt()
1156 printf("AUD_CNTL_ST_B DIP_type_enable_status ACP DIP\t\t%lu\n", REG_BIT(dword, 22)); in dump_cpt()
1157 printf("AUD_CNTL_ST_B DIP_type_enable_status Generic 2 DIP\t%lu\n", REG_BIT(dword, 23)); in dump_cpt()
1158 printf("AUD_CNTL_ST_B DIP_transmission_frequency\t\t[0x%lx] %s\n", in dump_cpt()
1160 printf("AUD_CNTL_ST_B ELD_ACK\t\t\t\t\t%lu\n", REG_BIT(dword, 4)); in dump_cpt()
1161 printf("AUD_CNTL_ST_B ELD_buffer_size\t\t\t\t%lu\n", REG_BITS(dword, 14, 10)); in dump_cpt()
1164 printf("AUD_CNTL_ST_C DIP_Port_Select\t\t\t\t[%#lx] %s\n", in dump_cpt()
1166 printf("AUD_CNTL_ST_C DIP_type_enable_status Audio DIP\t\t%lu\n", REG_BIT(dword, 21)); in dump_cpt()
1167 printf("AUD_CNTL_ST_C DIP_type_enable_status ACP DIP\t\t%lu\n", REG_BIT(dword, 22)); in dump_cpt()
1168 printf("AUD_CNTL_ST_C DIP_type_enable_status Generic 2 DIP\t%lu\n", REG_BIT(dword, 23)); in dump_cpt()
1169 printf("AUD_CNTL_ST_C DIP_transmission_frequency\t\t[0x%lx] %s\n", in dump_cpt()
1171 printf("AUD_CNTL_ST_C ELD_ACK\t\t\t\t\t%lu\n", REG_BIT(dword, 4)); in dump_cpt()
1172 printf("AUD_CNTL_ST_C ELD_buffer_size\t\t\t\t%lu\n", REG_BITS(dword, 14, 10)); in dump_cpt()
1175 printf("AUD_CNTRL_ST2 CP_ReadyB\t\t\t\t%lu\n", REG_BIT(dword, 1)); in dump_cpt()
1176 printf("AUD_CNTRL_ST2 ELD_validB\t\t\t\t%lu\n", REG_BIT(dword, 0)); in dump_cpt()
1177 printf("AUD_CNTRL_ST2 CP_ReadyC\t\t\t\t%lu\n", REG_BIT(dword, 5)); in dump_cpt()
1178 printf("AUD_CNTRL_ST2 ELD_validC\t\t\t\t%lu\n", REG_BIT(dword, 4)); in dump_cpt()
1179 printf("AUD_CNTRL_ST2 CP_ReadyD\t\t\t\t%lu\n", REG_BIT(dword, 9)); in dump_cpt()
1180 printf("AUD_CNTRL_ST2 ELD_validD\t\t\t\t%lu\n", REG_BIT(dword, 8)); in dump_cpt()
1183 printf("AUD_CNTRL_ST3 TransA_DPT_Audio_Output_En\t\t%lu\n", REG_BIT(dword, 3)); in dump_cpt()
1184 printf("AUD_CNTRL_ST3 TransA_to_Port_Sel\t\t\t[%#lx] %s\n", in dump_cpt()
1186 printf("AUD_CNTRL_ST3 TransB_DPT_Audio_Output_En\t\t%lu\n", REG_BIT(dword, 7)); in dump_cpt()
1187 printf("AUD_CNTRL_ST3 TransB_to_Port_Sel\t\t\t[%#lx] %s\n", in dump_cpt()
1189 printf("AUD_CNTRL_ST3 TransC_DPT_Audio_Output_En\t\t%lu\n", REG_BIT(dword, 11)); in dump_cpt()
1190 printf("AUD_CNTRL_ST3 TransC_to_Port_Sel\t\t\t[%#lx] %s\n", in dump_cpt()
1194 printf("AUD_HDMIW_STATUS Conv_A_CDCLK/DOTCLK_FIFO_Underrun\t%lu\n", REG_BIT(dword, 27)); in dump_cpt()
1195 printf("AUD_HDMIW_STATUS Conv_A_CDCLK/DOTCLK_FIFO_Overrun\t%lu\n", REG_BIT(dword, 26)); in dump_cpt()
1196 printf("AUD_HDMIW_STATUS Conv_B_CDCLK/DOTCLK_FIFO_Underrun\t%lu\n", REG_BIT(dword, 29)); in dump_cpt()
1197 printf("AUD_HDMIW_STATUS Conv_B_CDCLK/DOTCLK_FIFO_Overrun\t%lu\n", REG_BIT(dword, 28)); in dump_cpt()
1198 printf("AUD_HDMIW_STATUS Conv_C_CDCLK/DOTCLK_FIFO_Underrun\t%lu\n", REG_BIT(dword, 31)); in dump_cpt()
1199 printf("AUD_HDMIW_STATUS Conv_C_CDCLK/DOTCLK_FIFO_Overrun\t%lu\n", REG_BIT(dword, 30)); in dump_cpt()
1200 printf("AUD_HDMIW_STATUS BCLK/CDCLK_FIFO_Overrun\t\t%lu\n", REG_BIT(dword, 25)); in dump_cpt()
1201 printf("AUD_HDMIW_STATUS Function_Reset\t\t\t%lu\n", REG_BIT(dword, 24)); in dump_cpt()
1203 printf("AUD_HDMIW_HDMIEDID_A HDMI ELD:\n\t"); in dump_cpt()
1208 printf("%08x ", htonl(INREG(AUD_HDMIW_HDMIEDID_A))); in dump_cpt()
1209 printf("\n"); in dump_cpt()
1211 printf("AUD_HDMIW_HDMIEDID_B HDMI ELD:\n\t"); in dump_cpt()
1216 printf("%08x ", htonl(INREG(AUD_HDMIW_HDMIEDID_B))); in dump_cpt()
1217 printf("\n"); in dump_cpt()
1219 printf("AUD_HDMIW_HDMIEDID_C HDMI ELD:\n\t"); in dump_cpt()
1224 printf("%08x ", htonl(INREG(AUD_HDMIW_HDMIEDID_C))); in dump_cpt()
1225 printf("\n"); in dump_cpt()
1227 printf("AUD_HDMIW_INFOFR_A HDMI audio Infoframe:\n\t"); in dump_cpt()
1233 printf("%08x ", htonl(INREG(AUD_HDMIW_INFOFR_A))); in dump_cpt()
1234 printf("\n"); in dump_cpt()
1236 printf("AUD_HDMIW_INFOFR_B HDMI audio Infoframe:\n\t"); in dump_cpt()
1242 printf("%08x ", htonl(INREG(AUD_HDMIW_INFOFR_B))); in dump_cpt()
1243 printf("\n"); in dump_cpt()
1245 printf("AUD_HDMIW_INFOFR_C HDMI audio Infoframe:\n\t"); in dump_cpt()
1251 printf("%08x ", htonl(INREG(AUD_HDMIW_INFOFR_C))); in dump_cpt()
1252 printf("\n"); in dump_cpt()
1384 printf("%s Disable_NCTS\t\t\t\t%lu\n", prefix, REG_BIT(dword, 3)); in dump_aud_config()
1385 printf("%s Lower_N_value\t\t\t\t0x%03lx\n", prefix, REG_BITS(dword, 15, 4)); in dump_aud_config()
1386 printf("%s Pixel_Clock_HDMI\t\t\t[0x%lx] %s\n", prefix, REG_BITS(dword, 19, 16), in dump_aud_config()
1388 printf("%s Upper_N_value\t\t\t\t0x%02lx\n", prefix, REG_BITS(dword, 27, 20)); in dump_aud_config()
1389 printf("%s N_programming_enable\t\t\t%lu\n", prefix, REG_BIT(dword, 28)); in dump_aud_config()
1390 printf("%s N_index_value\t\t\t\t[0x%lx] %s\n", prefix, REG_BIT(dword, 29), in dump_aud_config()
1407 printf("%s Pro_Allowed\t\t\t\t%lu\n", prefix, REG_BIT(dword, 1)); in dump_aud_misc_control()
1408 printf("%s Sample_Fabrication_EN_bit\t\t%lu\n", prefix, REG_BIT(dword, 2)); in dump_aud_misc_control()
1409 printf("%s Output_Delay\t\t\t\t%lu\n", prefix, REG_BITS(dword, 7, 4)); in dump_aud_misc_control()
1410 printf("%s Sample_present_Disable\t\t%lu\n", prefix, REG_BIT(dword, 8)); in dump_aud_misc_control()
1418 printf("AUD_VID_DID device id\t\t\t\t\t0x%lx\n", REG_BITS(dword, 15, 0)); in dump_aud_vendor_device_id()
1419 printf("AUD_VID_DID vendor id\t\t\t\t\t0x%lx\n", REG_BITS(dword, 31, 16)); in dump_aud_vendor_device_id()
1427 printf("AUD_RID Stepping_Id\t\t\t\t\t0x%lx\n", REG_BITS(dword, 7, 0)); in dump_aud_revision_id()
1428 printf("AUD_RID Revision_Id\t\t\t\t\t0x%lx\n", REG_BITS(dword, 15, 8)); in dump_aud_revision_id()
1429 printf("AUD_RID Minor_Revision\t\t\t\t\t0x%lx\n", REG_BITS(dword, 19, 16)); in dump_aud_revision_id()
1430 printf("AUD_RID Major_Revision\t\t\t\t\t0x%lx\n", REG_BITS(dword, 23, 20)); in dump_aud_revision_id()
1446 printf("%s CTS_programming\t\t\t%#lx\n", prefix, REG_BITS(dword, 19, 0)); in dump_aud_m_cts_enable()
1447 printf("%s Enable_CTS_or_M_programming\t%lu\n", prefix, REG_BIT(dword, 20)); in dump_aud_m_cts_enable()
1448 printf("%s CTS_M value Index\t\t\t[0x%lx] %s\n",prefix, REG_BIT(dword, 21), in dump_aud_m_cts_enable()
1458 …printf("AUD_PWRST PinB_Widget_Power_State_Set \t%s\n", power_state[REG_BITS(… in dump_aud_power_state()
1459 …printf("AUD_PWRST PinB_Widget_Power_State_Current \t%s\n", power_state[REG_BITS(… in dump_aud_power_state()
1460 …printf("AUD_PWRST PinC_Widget_Power_State_Set \t%s\n", power_state[REG_BITS(… in dump_aud_power_state()
1461 …printf("AUD_PWRST PinC_Widget_Power_State_Current \t%s\n", power_state[REG_BITS(… in dump_aud_power_state()
1462 …printf("AUD_PWRST PinD_Widget_Power_State_Set \t%s\n", power_state[REG_BITS(… in dump_aud_power_state()
1463 …printf("AUD_PWRST PinD_Widget_Power_State_Current \t%s\n", power_state[REG_BITS(… in dump_aud_power_state()
1466 …printf("AUD_PWRST ConvertorA_Widget_Power_State_Requsted \t%s\n", power_state[REG_BITS(dword, 1… in dump_aud_power_state()
1467 …printf("AUD_PWRST ConvertorA_Widget_Power_State_Current \t%s\n", power_state[REG_BITS(dword, 1… in dump_aud_power_state()
1468 …printf("AUD_PWRST ConvertorB_Widget_Power_State_Requested \t%s\n", power_state[REG_BITS(dword, 1… in dump_aud_power_state()
1469 …printf("AUD_PWRST ConvertorB_Widget_Power_State_Current \t%s\n", power_state[REG_BITS(dword, 1… in dump_aud_power_state()
1471 …printf("AUD_PWRST Convertor1_Widget_Power_State_Requsted \t%s\n", power_state[REG_BITS(dword, 1… in dump_aud_power_state()
1472 …printf("AUD_PWRST Convertor1_Widget_Power_State_Current \t%s\n", power_state[REG_BITS(dword, 1… in dump_aud_power_state()
1473 …printf("AUD_PWRST Convertor2_Widget_Power_State_Requested \t%s\n", power_state[REG_BITS(dword, 1… in dump_aud_power_state()
1474 …printf("AUD_PWRST Convertor2_Widget_Power_State_Current \t%s\n", power_state[REG_BITS(dword, 1… in dump_aud_power_state()
1479 …printf("AUD_PWRST Func_Grp_Dev_PwrSt_Set \t%s\n", power_state[REG_BITS(dword, 2… in dump_aud_power_state()
1480 …printf("AUD_PWRST Func_Grp_Dev_PwrSt_Curr \t%s\n", power_state[REG_BITS(dword, 2… in dump_aud_power_state()
1483 …printf("AUD_PWRST ConvertorC_Widget_Power_State_Requested \t%s\n", power_state[REG_BITS(dword, 2… in dump_aud_power_state()
1484 …printf("AUD_PWRST ConvertorC_Widget_Power_State_Current \t%s\n", power_state[REG_BITS(dword, 2… in dump_aud_power_state()
1486 …printf("AUD_PWRST Convertor3_Widget_Power_State_Requested \t%s\n", power_state[REG_BITS(dword, 2… in dump_aud_power_state()
1487 …printf("AUD_PWRST Convertor3_Widget_Power_State_Current \t%s\n", power_state[REG_BITS(dword, 2… in dump_aud_power_state()
1489 …printf("AUD_PWRST Func_Grp_Dev_PwrSt_Set \t%s\n", power_state[REG_BITS(dword, 2… in dump_aud_power_state()
1490 …printf("AUD_PWRST Func_Grp_Dev_PwrSt_Curr \t%s\n", power_state[REG_BITS(dword, 2… in dump_aud_power_state()
1505 printf("AUD_TC%c_EDID_DATA ELD:\n\t", 'A' + index - TRANSCODER_A); in dump_aud_edid_data()
1510 printf("AUD_HDMIW_HDMIEDID_%c HDMI ELD:\n\t", 'A' + index - PIPE_A); in dump_aud_edid_data()
1517 printf("%08x ", htonl(INREG(edid_data))); in dump_aud_edid_data()
1518 printf("\n"); in dump_aud_edid_data()
1532 printf("AUD_TC%c_INFOFR audio Infoframe:\n\t", 'A' + index - TRANSCODER_A); in dump_aud_infoframe()
1537 printf("AUD_HDMIW_INFOFR_%c HDMI audio Infoframe:\n\t", 'A' + index - PIPE_A); in dump_aud_infoframe()
1545 printf("%08x ", htonl(INREG(info_frm))); in dump_aud_infoframe()
1546 printf("\n"); in dump_aud_infoframe()
1556 printf("AUD_PORT_EN_HD_CFG Convertor_A_Digen\t\t\t%lu\n", REG_BIT(dword, 0)); in dump_aud_port_en_hd_cfg()
1557 printf("AUD_PORT_EN_HD_CFG Convertor_B_Digen\t\t\t%lu\n", REG_BIT(dword, 1)); in dump_aud_port_en_hd_cfg()
1558 printf("AUD_PORT_EN_HD_CFG Convertor_A_Stream_ID\t\t%lu\n", REG_BITS(dword, 7, 4)); in dump_aud_port_en_hd_cfg()
1559 printf("AUD_PORT_EN_HD_CFG Convertor_B_Stream_ID\t\t%lu\n", REG_BITS(dword, 11, 8)); in dump_aud_port_en_hd_cfg()
1561 printf("AUD_PORT_EN_HD_CFG Port_B_Out_Enable\t\t\t%lu\n", REG_BIT(dword, 12)); in dump_aud_port_en_hd_cfg()
1562 printf("AUD_PORT_EN_HD_CFG Port_C_Out_Enable\t\t\t%lu\n", REG_BIT(dword, 13)); in dump_aud_port_en_hd_cfg()
1563 printf("AUD_PORT_EN_HD_CFG Port_D_Out_Enable\t\t\t%lu\n", REG_BIT(dword, 14)); in dump_aud_port_en_hd_cfg()
1564 printf("AUD_PORT_EN_HD_CFG Port_B_Amp_Mute_Status\t\t%lu\n", REG_BIT(dword, 16)); in dump_aud_port_en_hd_cfg()
1565 printf("AUD_PORT_EN_HD_CFG Port_C_Amp_Mute_Status\t\t%lu\n", REG_BIT(dword, 17)); in dump_aud_port_en_hd_cfg()
1566 printf("AUD_PORT_EN_HD_CFG Port_D_Amp_Mute_Status\t\t%lu\n", REG_BIT(dword, 18)); in dump_aud_port_en_hd_cfg()
1568 printf("AUD_PORT_EN_HD_CFG Convertor_A_Digen\t\t\t%lu\n", REG_BIT(dword, 0)); in dump_aud_port_en_hd_cfg()
1569 printf("AUD_PORT_EN_HD_CFG Convertor_B_Digen\t\t\t%lu\n", REG_BIT(dword, 1)); in dump_aud_port_en_hd_cfg()
1570 printf("AUD_PORT_EN_HD_CFG Convertor_C_Digen\t\t\t%lu\n", REG_BIT(dword, 2)); in dump_aud_port_en_hd_cfg()
1571 printf("AUD_PORT_EN_HD_CFG Convertor_A_Stream_ID\t\t%lu\n", REG_BITS(dword, 7, 4)); in dump_aud_port_en_hd_cfg()
1572 printf("AUD_PORT_EN_HD_CFG Convertor_B_Stream_ID\t\t%lu\n", REG_BITS(dword, 11, 8)); in dump_aud_port_en_hd_cfg()
1573 printf("AUD_PORT_EN_HD_CFG Convertor_C_Stream_ID\t\t%lu\n", REG_BITS(dword, 15, 12)); in dump_aud_port_en_hd_cfg()
1575 printf("AUD_PORT_EN_HD_CFG Port_B_Out_Enable\t\t\t%lu\n", REG_BIT(dword, 16)); in dump_aud_port_en_hd_cfg()
1576 printf("AUD_PORT_EN_HD_CFG Port_C_Out_Enable\t\t\t%lu\n", REG_BIT(dword, 17)); in dump_aud_port_en_hd_cfg()
1577 printf("AUD_PORT_EN_HD_CFG Port_D_Out_Enable\t\t\t%lu\n", REG_BIT(dword, 18)); in dump_aud_port_en_hd_cfg()
1578 printf("AUD_PORT_EN_HD_CFG Port_B_Amp_Mute_Status\t\t%lu\n", REG_BIT(dword, 20)); in dump_aud_port_en_hd_cfg()
1579 printf("AUD_PORT_EN_HD_CFG Port_C_Amp_Mute_Status\t\t%lu\n", REG_BIT(dword, 21)); in dump_aud_port_en_hd_cfg()
1580 printf("AUD_PORT_EN_HD_CFG Port_D_Amp_Mute_Status\t\t%lu\n", REG_BIT(dword, 22)); in dump_aud_port_en_hd_cfg()
1589 printf("AUD_PIPE_CONV_CFG Convertor_1_Digen\t\t\t%lu\n", REG_BIT(dword, 0)); in dump_aud_pipe_conv_cfg()
1590 printf("AUD_PIPE_CONV_CFG Convertor_2_Digen\t\t\t%lu\n", REG_BIT(dword, 1)); in dump_aud_pipe_conv_cfg()
1591 printf("AUD_PIPE_CONV_CFG Convertor_3_Digen\t\t\t%lu\n", REG_BIT(dword, 2)); in dump_aud_pipe_conv_cfg()
1592 printf("AUD_PIPE_CONV_CFG Convertor_1_Stream_ID\t\t%lu\n", REG_BITS(dword, 7, 4)); in dump_aud_pipe_conv_cfg()
1593 printf("AUD_PIPE_CONV_CFG Convertor_2_Stream_ID\t\t%lu\n", REG_BITS(dword, 11, 8)); in dump_aud_pipe_conv_cfg()
1594 printf("AUD_PIPE_CONV_CFG Convertor_3_Stream_ID\t\t%lu\n", REG_BITS(dword, 15, 12)); in dump_aud_pipe_conv_cfg()
1596 printf("AUD_PIPE_CONV_CFG Port_B_Out_Enable\t\t\t%lu\n", REG_BIT(dword, 16)); in dump_aud_pipe_conv_cfg()
1597 printf("AUD_PIPE_CONV_CFG Port_C_Out_Enable\t\t\t%lu\n", REG_BIT(dword, 17)); in dump_aud_pipe_conv_cfg()
1598 printf("AUD_PIPE_CONV_CFG Port_D_Out_Enable\t\t\t%lu\n", REG_BIT(dword, 18)); in dump_aud_pipe_conv_cfg()
1599 printf("AUD_PIPE_CONV_CFG Port_B_Amp_Mute_Status\t\t%lu\n", REG_BIT(dword, 20)); in dump_aud_pipe_conv_cfg()
1600 printf("AUD_PIPE_CONV_CFG Port_C_Amp_Mute_Status\t\t%lu\n", REG_BIT(dword, 21)); in dump_aud_pipe_conv_cfg()
1601 printf("AUD_PIPE_CONV_CFG Port_D_Amp_Mute_Status\t\t%lu\n", REG_BIT(dword, 22)); in dump_aud_pipe_conv_cfg()
1617 printf("%s V\t\t\t\t\t%lu\n", prefix, REG_BIT(dword, 1)); in dump_aud_dig_cnvt()
1618 printf("%s VCFG\t\t\t\t%lu\n", prefix, REG_BIT(dword, 2)); in dump_aud_dig_cnvt()
1619 printf("%s PRE\t\t\t\t\t%lu\n", prefix, REG_BIT(dword, 3)); in dump_aud_dig_cnvt()
1620 printf("%s Copy\t\t\t\t%lu\n", prefix, REG_BIT(dword, 4)); in dump_aud_dig_cnvt()
1621 printf("%s NonAudio\t\t\t\t%lu\n", prefix, REG_BIT(dword, 5)); in dump_aud_dig_cnvt()
1622 printf("%s PRO\t\t\t\t\t%lu\n", prefix, REG_BIT(dword, 6)); in dump_aud_dig_cnvt()
1623 printf("%s Level\t\t\t\t%lu\n", prefix, REG_BIT(dword, 7)); in dump_aud_dig_cnvt()
1624 printf("%s Category_Code\t\t\t%lu\n", prefix, REG_BITS(dword, 14, 8)); in dump_aud_dig_cnvt()
1625 printf("%s Lowest_Channel_Number\t\t%lu\n", prefix, REG_BITS(dword, 19, 16)); in dump_aud_dig_cnvt()
1626 printf("%s Stream_ID\t\t\t\t%lu\n", prefix, REG_BITS(dword, 23, 20)); in dump_aud_dig_cnvt()
1643 printf("%s Number_of_Channels_in_a_Stream\t%lu\n", prefix, REG_BITS(dword, 3, 0) + 1); in dump_aud_str_desc()
1644 printf("%s Bits_per_Sample\t\t\t[%#lx] %s\n", prefix, REG_BITS(dword, 6, 4), in dump_aud_str_desc()
1647 printf("%s Sample_Base_Rate_Divisor\t\t[%#lx] %s\n", prefix, REG_BITS(dword, 10, 8), in dump_aud_str_desc()
1649 printf("%s Sample_Base_Rate_Mult\t\t[%#lx] %s\n", prefix, REG_BITS(dword, 13, 11), in dump_aud_str_desc()
1651 printf("%s Sample_Base_Rate\t\t\t[%#lx] %s\t", prefix, REG_BIT(dword, 14), in dump_aud_str_desc()
1655 printf("=> Sample Rate %d Hz\n", rate); in dump_aud_str_desc()
1657 printf("%s Convertor_Channel_Count\t\t%lu\n", prefix, REG_BITS(dword, 20, 16) + 1); in dump_aud_str_desc()
1660 printf("%s HBR_enable\t\t\t\t%lu\n", prefix, REG_BITS(dword, 28, 27)); in dump_aud_str_desc()
1669 printf("AUD_OUT_CHAN_MAP Converter_Channel_MAP PORTB PORTC PORTD\n"); in dump_aud_out_chan_map()
1673 printf("\t\t\t\t%lu\t%lu\t%lu\t%lu\n", in dump_aud_out_chan_map()
1689 printf("%s Connect_List_Length\t\t%lu\n", prefix, REG_BITS(dword, 6, 0)); in dump_aud_connect_list()
1690 printf("%s Form \t\t\t\t[%#lx] %s\n", prefix, REG_BIT(dword, 7), in dump_aud_connect_list()
1692 …printf("%s Connect_List_Entry\t\t%lu, %lu\n", prefix, REG_BITS(dword, 15, 8), REG_BITS(dword, 23,… in dump_aud_connect_list()
1709 printf("%s Connection_select_Port_B\t%#lx\n", prefix, REG_BITS(dword, 7, 0)); in dump_aud_connect_select()
1710 printf("%s Connection_select_Port_C\t%#lx\n", prefix, REG_BITS(dword, 15, 8)); in dump_aud_connect_select()
1711 printf("%s Connection_select_Port_D\t%#lx\n", prefix, REG_BITS(dword, 23, 16)); in dump_aud_connect_select()
1722 printf("Audio DIP and ELD control state for Transcoder %c\n", 'A' + index - TRANSCODER_A); in dump_aud_ctrl_state()
1726 printf("Audio control state - Pipe %c\n", 'A' + index - PIPE_A); in dump_aud_ctrl_state()
1729 printf("\tELD_ACK\t\t\t\t\t\t%lu\n", REG_BIT(dword, 4)); in dump_aud_ctrl_state()
1730 printf("\tELD_buffer_size\t\t\t\t\t%lu\n", REG_BITS(dword, 14, 10)); in dump_aud_ctrl_state()
1731 printf("\tDIP_transmission_frequency\t\t\t[0x%lx] %s\n", REG_BITS(dword, 17, 16), in dump_aud_ctrl_state()
1733 printf("\tDIP Buffer Index \t\t\t\t[0x%lx] %s\n", REG_BITS(dword, 20, 18), in dump_aud_ctrl_state()
1735 printf("\tAudio DIP type enable status\t\t\t[0x%04lx] %s, %s, %s\n", REG_BITS(dword, 24, 21), in dump_aud_ctrl_state()
1737 printf("\tAudio DIP port select\t\t\t\t[0x%lx] %s\n", REG_BITS(dword, 30, 29), in dump_aud_ctrl_state()
1739 printf("\n"); in dump_aud_ctrl_state()
1747 printf("AUD_CNTL_ST2 ELD_validB\t\t\t\t%lu\n", REG_BIT(dword, 0)); in dump_aud_ctrl_state2()
1748 printf("AUD_CNTL_ST2 CP_ReadyB\t\t\t\t\t%lu\n", REG_BIT(dword, 1)); in dump_aud_ctrl_state2()
1749 printf("AUD_CNTL_ST2 ELD_validC\t\t\t\t%lu\n", REG_BIT(dword, 4)); in dump_aud_ctrl_state2()
1750 printf("AUD_CNTL_ST2 CP_ReadyC\t\t\t\t\t%lu\n", REG_BIT(dword, 5)); in dump_aud_ctrl_state2()
1751 printf("AUD_CNTL_ST2 ELD_validD\t\t\t\t%lu\n", REG_BIT(dword, 8)); in dump_aud_ctrl_state2()
1752 printf("AUD_CNTL_ST2 CP_ReadyD\t\t\t\t\t%lu\n", REG_BIT(dword, 9)); in dump_aud_ctrl_state2()
1761 printf("AUD_PIN_ELD_CP_VLD Transcoder_A ELD_valid\t\t%lu\n", REG_BIT(dword, 0)); in dump_aud_eld_cp_vld()
1762 printf("AUD_PIN_ELD_CP_VLD Transcoder_A CP_Ready \t\t%lu\n", REG_BIT(dword, 1)); in dump_aud_eld_cp_vld()
1763 printf("AUD_PIN_ELD_CP_VLD Transcoder_A Out_enable\t\t%lu\n", REG_BIT(dword, 2)); in dump_aud_eld_cp_vld()
1764 printf("AUD_PIN_ELD_CP_VLD Transcoder_A Inactive\t\t%lu\n", REG_BIT(dword, 3)); in dump_aud_eld_cp_vld()
1765 printf("AUD_PIN_ELD_CP_VLD Transcoder_B ELD_valid\t\t%lu\n", REG_BIT(dword, 4)); in dump_aud_eld_cp_vld()
1766 printf("AUD_PIN_ELD_CP_VLD Transcoder_B CP_Ready\t\t%lu\n", REG_BIT(dword, 5)); in dump_aud_eld_cp_vld()
1767 printf("AUD_PIN_ELD_CP_VLD Transcoder_B OUT_enable\t\t%lu\n", REG_BIT(dword, 6)); in dump_aud_eld_cp_vld()
1768 printf("AUD_PIN_ELD_CP_VLD Transcoder_B Inactive\t\t%lu\n", REG_BIT(dword, 7)); in dump_aud_eld_cp_vld()
1769 printf("AUD_PIN_ELD_CP_VLD Transcoder_C ELD_valid\t\t%lu\n", REG_BIT(dword, 8)); in dump_aud_eld_cp_vld()
1770 printf("AUD_PIN_ELD_CP_VLD Transcoder_C CP_Ready\t\t%lu\n", REG_BIT(dword, 9)); in dump_aud_eld_cp_vld()
1771 printf("AUD_PIN_ELD_CP_VLD Transcoder_C OUT_enable\t\t%lu\n", REG_BIT(dword, 10)); in dump_aud_eld_cp_vld()
1772 printf("AUD_PIN_ELD_CP_VLD Transcoder_C Inactive\t\t%lu\n", REG_BIT(dword, 11)); in dump_aud_eld_cp_vld()
1780 printf("AUD_HDMIW_STATUS Function_Reset\t\t\t%lu\n", REG_BIT(dword, 24)); in dump_aud_hdmi_status()
1781 printf("AUD_HDMIW_STATUS BCLK/CDCLK_FIFO_Overrun\t\t%lu\n", REG_BIT(dword, 25)); in dump_aud_hdmi_status()
1782 printf("AUD_HDMIW_STATUS Conv_A_CDCLK/DOTCLK_FIFO_Overrun\t%lu\n", REG_BIT(dword, 28)); in dump_aud_hdmi_status()
1783 printf("AUD_HDMIW_STATUS Conv_A_CDCLK/DOTCLK_FIFO_Underrun\t%lu\n", REG_BIT(dword, 29)); in dump_aud_hdmi_status()
1784 printf("AUD_HDMIW_STATUS Conv_B_CDCLK/DOTCLK_FIFO_Overrun\t%lu\n", REG_BIT(dword, 30)); in dump_aud_hdmi_status()
1785 printf("AUD_HDMIW_STATUS Conv_B_CDCLK/DOTCLK_FIFO_Underrun\t%lu\n", REG_BIT(dword, 31)); in dump_aud_hdmi_status()
1821 printf("%s DisplayPort_Enable\t\t\t\t\t%lu\n", prefix, REG_BIT(dword, 31)); in dump_dp_port_ctrl()
1822 …printf("%s Transcoder_Select\t\t\t\t\t%s\n", prefix, REG_BIT(dword, 30) ? "Transcoder B" … in dump_dp_port_ctrl()
1823 printf("%s Port_Width_Selection\t\t\t\t[0x%lx] %s\n", prefix, REG_BITS(dword, 21, 19), in dump_dp_port_ctrl()
1825 printf("%s Port_Detected\t\t\t\t\t%lu\n", prefix, REG_BIT(dword, 2)); in dump_dp_port_ctrl()
1826 printf("%s HDCP_Port_Select\t\t\t\t\t%lu\n", prefix, REG_BIT(dword, 5)); in dump_dp_port_ctrl()
1827 printf("%s Audio_Output_Enable\t\t\t\t%lu\n", prefix, REG_BIT(dword, 6)); in dump_dp_port_ctrl()
1845 printf("%s HDMI_Enable\t\t\t\t\t%u\n", prefix, !!(dword & SDVO_ENABLE)); in dump_hdmi_port_ctrl()
1846 …printf("%s Transcoder_Select\t\t\t\t%s\n", prefix, REG_BIT(dword, 30) ? "Transcoder B"… in dump_hdmi_port_ctrl()
1847 printf("%s HDCP_Port_Select\t\t\t\t%lu\n", prefix, REG_BIT(dword, 5)); in dump_hdmi_port_ctrl()
1849 printf("%s SDVO Hot Plug Interrupt Detect Enable\t%lu\n", prefix, REG_BIT(dword, 23)); in dump_hdmi_port_ctrl()
1850 printf("%s Digital_Port_Detected\t\t\t%lu\n", prefix, REG_BIT(dword, 2)); in dump_hdmi_port_ctrl()
1851 printf("%s Encoding\t\t\t\t\t[0x%lx] %s\n", prefix, REG_BITS(dword, 11, 10), in dump_hdmi_port_ctrl()
1853 …printf("%s Null_packets_enabled_during_Vsync\t\t%u\n", prefix, !!(dword & SDVO_NULL_PACKETS_DURING… in dump_hdmi_port_ctrl()
1854 printf("%s Audio_Output_Enable\t\t\t\t%u\n", prefix, !!(dword & SDVO_AUDIO_ENABLE)); in dump_hdmi_port_ctrl()
1906 printf("\nDetails:\n\n"); in dump_ironlake()
2033 printf("DDI %c Buffer control\n", 'A' + port - PORT_A); in dump_ddi_buf_ctl()
2035 printf("\tDP port width\t\t\t\t\t[0x%lx] %s\n", REG_BITS(dword, 3, 1), in dump_ddi_buf_ctl()
2037 printf("\tDDI Buffer Enable\t\t\t\t%ld\n", REG_BIT(dword, 31)); in dump_ddi_buf_ctl()
2045 printf("Pipe %c DDI Function Control\n", 'A' + pipe - PIPE_A); in dump_ddi_func_ctl()
2047 printf("\tREG_BITS per color\t\t\t\t\t[0x%lx] %s\n", REG_BITS(dword, 22, 20), in dump_ddi_func_ctl()
2049 printf("\tPIPE DDI Mode\t\t\t\t\t[0x%lx] %s\n", REG_BITS(dword, 26, 24), in dump_ddi_func_ctl()
2051 printf("\tPIPE DDI selection\t\t\t\t[0x%lx] %s\n", REG_BITS(dword, 30, 28), in dump_ddi_func_ctl()
2053 printf("\tPIPE DDI Function Enable\t\t\t[0x%lx]\n", REG_BIT(dword, 31)); in dump_ddi_func_ctl()
2064 printf("%s Connect_List_Length\t%lu\n", prefix, REG_BITS(dword, 6, 0)); in dump_aud_connect_list_entry_length()
2065 printf("%s Form \t\t[%#lx] %s\n", prefix, REG_BIT(dword, 7), in dump_aud_connect_list_entry_length()
2067 printf("%s Connect_List_Entry\t%lu\n", prefix, REG_BITS(dword, 15, 8)); in dump_aud_connect_list_entry_length()
2075 printf("AUD_PIPE_CONN_SEL_CTRL Connection_select_Port_B\t%#lx\n", REG_BITS(dword, 7, 0)); in dump_aud_connect_select_ctrl()
2076 printf("AUD_PIPE_CONN_SEL_CTRL Connection_select_Port_C\t%#lx\n", REG_BITS(dword, 15, 8)); in dump_aud_connect_select_ctrl()
2077 printf("AUD_PIPE_CONN_SEL_CTRL Connection_select_Port_D\t%#lx\n", REG_BITS(dword, 23, 16)); in dump_aud_connect_select_ctrl()
2086 printf("Audio DIP and ELD control state for Transcoder %c\n", 'A' + transcoder - TRANSCODER_A); in dump_aud_dip_eld_ctrl_st()
2088 printf("\tELD_ACK\t\t\t\t\t\t%lu\n", REG_BIT(dword, 4)); in dump_aud_dip_eld_ctrl_st()
2089 printf("\tELD_buffer_size\t\t\t\t\t%lu\n", REG_BITS(dword, 14, 10)); in dump_aud_dip_eld_ctrl_st()
2090 printf("\tDIP_transmission_frequency\t\t\t[0x%lx] %s\n", REG_BITS(dword, 17, 16), in dump_aud_dip_eld_ctrl_st()
2092 printf("\tDIP Buffer Index \t\t\t\t[0x%lx] %s\n", REG_BITS(dword, 20, 18), in dump_aud_dip_eld_ctrl_st()
2094 printf("\tAudio DIP type enable status\t\t\t[0x%04lx] %s, %s, %s\n", REG_BITS(dword, 24, 21), in dump_aud_dip_eld_ctrl_st()
2096 printf("\tAudio DIP port select\t\t\t\t[0x%lx] %s\n", REG_BITS(dword, 30, 29), in dump_aud_dip_eld_ctrl_st()
2098 printf("\n"); in dump_aud_dip_eld_ctrl_st()
2106 printf("AUD_HDMI_FIFO_STATUS Function_Reset\t\t\t%lu\n", REG_BIT(dword, 24)); in dump_aud_hdmi_fifo_status()
2107 printf("AUD_HDMI_FIFO_STATUS Conv_1_CDCLK/DOTCLK_FIFO_Overrun\t%lu\n", REG_BIT(dword, 26)); in dump_aud_hdmi_fifo_status()
2108 printf("AUD_HDMI_FIFO_STATUS Conv_1_CDCLK/DOTCLK_FIFO_Underrun\t%lu\n", REG_BIT(dword, 27)); in dump_aud_hdmi_fifo_status()
2109 printf("AUD_HDMI_FIFO_STATUS Conv_2_CDCLK/DOTCLK_FIFO_Overrun\t%lu\n", REG_BIT(dword, 28)); in dump_aud_hdmi_fifo_status()
2110 printf("AUD_HDMI_FIFO_STATUS Conv_2_CDCLK/DOTCLK_FIFO_Underrun\t%lu\n", REG_BIT(dword, 29)); in dump_aud_hdmi_fifo_status()
2111 printf("AUD_HDMI_FIFO_STATUS Conv_3_CDCLK/DOTCLK_FIFO_Overrun\t%lu\n", REG_BIT(dword, 30)); in dump_aud_hdmi_fifo_status()
2112 printf("AUD_HDMI_FIFO_STATUS Conv_3_CDCLK/DOTCLK_FIFO_Underrun\t%lu\n", REG_BIT(dword, 31)); in dump_aud_hdmi_fifo_status()
2117 printf("\t"); in parse_bdw_audio_chicken_bit_reg()
2118 printf("%s\n\t", OPNAME(vanilla_dp12_en, REG_BIT(dword, 31))); in parse_bdw_audio_chicken_bit_reg()
2119 printf("%s\n\t", OPNAME(vanilla_3_widgets_en, REG_BIT(dword, 30))); in parse_bdw_audio_chicken_bit_reg()
2120 printf("%s\n\t", OPNAME(block_audio, REG_BIT(dword, 10))); in parse_bdw_audio_chicken_bit_reg()
2121 printf("%s\n\t", OPNAME(dis_eld_valid_pulse_trans, REG_BIT(dword, 9))); in parse_bdw_audio_chicken_bit_reg()
2122 printf("%s\n\t", OPNAME(dis_pd_pulse_trans, REG_BIT(dword, 8))); in parse_bdw_audio_chicken_bit_reg()
2123 printf("%s\n\t", OPNAME(dis_ts_delta_err, REG_BIT(dword, 7))); in parse_bdw_audio_chicken_bit_reg()
2124 printf("%s\n\t", OPNAME(dis_ts_fix_dp_hbr, REG_BIT(dword, 6))); in parse_bdw_audio_chicken_bit_reg()
2125 printf("%s\n\t", OPNAME(pattern_gen_8_ch_en, REG_BIT(dword, 5))); in parse_bdw_audio_chicken_bit_reg()
2126 printf("%s\n\t", OPNAME(pattern_gen_2_ch_en, REG_BIT(dword, 4))); in parse_bdw_audio_chicken_bit_reg()
2127 printf("%s\n\t", OPNAME(fabric_32_44_dis, REG_BIT(dword, 3))); in parse_bdw_audio_chicken_bit_reg()
2128 printf("%s\n\t", OPNAME(epss_dis, REG_BIT(dword, 2))); in parse_bdw_audio_chicken_bit_reg()
2129 printf("%s\n\t", OPNAME(ts_test_mode, REG_BIT(dword, 1))); in parse_bdw_audio_chicken_bit_reg()
2130 printf("%s\n", OPNAME(en_mmio_program, REG_BIT(dword, 0))); in parse_bdw_audio_chicken_bit_reg()
2135 printf("\t"); in parse_skl_audio_freq_cntrl_reg()
2136 printf("%s\n\t", OPNAME(sdi_operate_mode, REG_BIT(dword, 15))); in parse_skl_audio_freq_cntrl_reg()
2137 printf("%s\n\t", OPNAME(bclk_96mhz, REG_BIT(dword, 4))); in parse_skl_audio_freq_cntrl_reg()
2138 printf("%s\n", OPNAME(bclk_48mhz, REG_BIT(dword, 3))); in parse_skl_audio_freq_cntrl_reg()
2251 printf("\nDetails:\n\n"); in dump_hsw_plus()
2314 printf("IRV [%1lx] %s\t", REG_BIT(dword, 1), in dump_hsw_plus()
2316 printf("ICB [%1lx] %s\n", REG_BIT(dword, 1), in dump_hsw_plus()
2320 printf("AUD_CHICKENBIT_REG Audio Chicken Bits: %08x\n", dword); in dump_hsw_plus()
2325 printf("AUD_DP_DIP_STATUS Audio DP & DIP FIFO Status: %08x\n\t", dword); in dump_hsw_plus()
2328 printf("%s\n\t", audio_dp_dip_status[i]); in dump_hsw_plus()
2329 printf("\n"); in dump_hsw_plus()
2332 printf("AUD_FREQ_CNTRL Audio BCLK Frequency Control: %08x\n", dword); in dump_hsw_plus()
2411 printf("\n"); in dump_braswell()
2413 printf("\nDetails:\n\n"); in dump_braswell()
2478 printf("%s audio registers:\n\n", intel_get_device_info(devid)->codename); in main()