Lines Matching defs:V1
2949 static SDValue getMOVL(SelectionDAG &DAG, const SDLoc &dl, MVT VT, SDValue V1, in getMOVL()
3838 SDValue V1, unsigned TargetMask, in getTargetShuffleNode()
3853 SDValue V1, SDValue V2, SelectionDAG &DAG) { in getTargetShuffleNode()
4661 static SDValue concat128BitVectors(SDValue V1, SDValue V2, EVT VT, in concat128BitVectors()
4668 static SDValue concat256BitVectors(SDValue V1, SDValue V2, EVT VT, in concat256BitVectors()
4698 SDValue V1, SDValue V2) { in getUnpackl()
4711 SDValue V1, SDValue V2) { in getUnpackh()
4731 SDValue V1 = IsZero in getShuffleVectorZeroOrUndef() local
5098 SDValue V1 = Ops[0]; in setTargetShuffleZeroElements() local
5398 SDValue V1 = FirstNonZero.getOperand(0); in LowerBuildVectorv4x32() local
5545 SDValue V1 = DAG.getLoad(NVT, dl, Chain, Ptr, in LowerAsSplatVectorLoad() local
6118 SDValue &V0, SDValue &V1) { in isHorizontalBinOp()
6229 static SDValue ExpandHorizontalBinOp(const SDValue &V0, const SDValue &V1, in ExpandHorizontalBinOp()
6907 SDValue V1 = Op.getOperand(0); in LowerAVXCONCAT_VECTORS() local
6970 SDValue V1 = Op.getOperand(0); in LowerCONCAT_VECTORSvXi1() local
7146 static bool isShuffleEquivalent(SDValue V1, SDValue V2, ArrayRef<int> Mask, in isShuffleEquivalent()
7235 SDValue V1, SDValue V2) { in computeZeroableShuffleElements()
7304 ArrayRef<int> Mask, SDValue V1, in lowerVectorShuffleWithPSHUFB()
7355 ArrayRef<int> Mask, SDValue V1, in lowerVectorShuffleWithUNPCK()
7391 static SDValue lowerVectorShuffleAsBitMask(const SDLoc &DL, MVT VT, SDValue V1, in lowerVectorShuffleAsBitMask()
7434 static SDValue lowerVectorShuffleAsBitBlend(const SDLoc &DL, MVT VT, SDValue V1, in lowerVectorShuffleAsBitBlend()
7466 static SDValue lowerVectorShuffleAsBlend(const SDLoc &DL, MVT VT, SDValue V1, in lowerVectorShuffleAsBlend()
7629 SDValue V1, SDValue V2, in lowerVectorShuffleAsBlendAndPermute()
7663 MVT VT, SDValue V1, in lowerVectorShuffleAsDecomposedShuffleBlend()
7713 SDValue V1, SDValue V2, in lowerVectorShuffleAsByteRotate()
7848 static SDValue lowerVectorShuffleAsShift(const SDLoc &DL, MVT VT, SDValue V1, in lowerVectorShuffleAsShift()
7919 static SDValue lowerVectorShuffleWithSSE4A(const SDLoc &DL, MVT VT, SDValue V1, in lowerVectorShuffleWithSSE4A()
8222 const SDLoc &DL, MVT VT, SDValue V1, SDValue V2, ArrayRef<int> Mask, in lowerVectorShuffleAsZeroOrAnyExtend()
8379 const SDLoc &DL, MVT VT, SDValue V1, SDValue V2, ArrayRef<int> Mask, in lowerVectorShuffleAsElementInsertion()
8537 SDValue V1, SDValue V2, in lowerVectorShuffleAsBroadcast()
8699 static bool matchVectorShuffleAsInsertPS(SDValue &V1, SDValue &V2, in matchVectorShuffleAsInsertPS()
8766 static SDValue lowerVectorShuffleAsInsertPS(const SDLoc &DL, SDValue V1, in lowerVectorShuffleAsInsertPS()
8793 SDValue V1, SDValue V2, in lowerVectorShuffleAsPermuteAndUnpack()
8907 SDValue V1, SDValue V2, in lowerV2F64VectorShuffle()
8985 SDValue V1, SDValue V2, in lowerV2I64VectorShuffle()
9116 ArrayRef<int> Mask, SDValue V1, in lowerVectorShuffleWithSHUFPS()
9205 SDValue V1, SDValue V2, in lowerV4F32VectorShuffle()
9286 SDValue V1, SDValue V2, in lowerV4I32VectorShuffle()
9852 const SDLoc &DL, MVT VT, SDValue V1, SDValue V2, ArrayRef<int> Mask, in lowerVectorShuffleAsBlendOfPSHUFBs()
9914 SDValue V1, SDValue V2, in lowerV8I16VectorShuffle()
10095 SDValue V1, SDValue V2, in lowerV16I8VectorShuffle()
10384 MVT VT, SDValue V1, SDValue V2, in lower128BitVectorShuffle()
10467 static SDValue splitAndLowerVectorShuffle(const SDLoc &DL, MVT VT, SDValue V1, in splitAndLowerVectorShuffle()
10594 SDValue V1, SDValue V2, in lowerVectorShuffleAsSplitOrBlend()
10653 SDValue V1, SDValue V2, in lowerVectorShuffleAsLanePermuteAndBlend()
10694 static SDValue lowerV2X128VectorShuffle(const SDLoc &DL, MVT VT, SDValue V1, in lowerV2X128VectorShuffle()
10792 const SDLoc &DL, MVT VT, SDValue V1, SDValue V2, ArrayRef<int> Mask, in lowerVectorShuffleByMerging128BitLanes()
10861 SDValue V1, SDValue V2, in lowerVectorShuffleWithUndefHalf()
10997 const SDLoc &DL, MVT VT, SDValue V1, SDValue V2, ArrayRef<int> Mask, in lowerShuffleAsRepeatedMaskAndLanePermute()
11122 ArrayRef<int> Mask, SDValue V1, in lowerVectorShuffleWithSHUFPD()
11157 SDValue V1, SDValue V2, in lowerV4F64VectorShuffle()
11250 SDValue V1, SDValue V2, in lowerV4I64VectorShuffle()
11323 SDValue V1, SDValue V2, in lowerV8F32VectorShuffle()
11413 SDValue V1, SDValue V2, in lowerV8I32VectorShuffle()
11496 SDValue V1, SDValue V2, in lowerV16I16VectorShuffle()
11577 SDValue V1, SDValue V2, in lowerV32I8VectorShuffle()
11648 MVT VT, SDValue V1, SDValue V2, in lower256BitVectorShuffle()
11712 ArrayRef<int> Mask, SDValue V1, in lowerV4X128VectorShuffle()
11759 ArrayRef<int> Mask, SDValue V1, in lowerVectorShuffleWithPERMV()
11776 SDValue V1, SDValue V2, in lowerV8F64VectorShuffle()
11823 SDValue V1, SDValue V2, in lowerV16F32VectorShuffle()
11860 SDValue V1, SDValue V2, in lowerV8I64VectorShuffle()
11906 SDValue V1, SDValue V2, in lowerV16I32VectorShuffle()
11945 SDValue V1, SDValue V2, in lowerV32I16VectorShuffle()
11984 SDValue V1, SDValue V2, in lowerV64I8VectorShuffle()
12021 MVT VT, SDValue V1, SDValue V2, in lower512BitVectorShuffle()
12060 MVT VT, SDValue V1, SDValue V2, in lower1BitVectorShuffle()
12118 SDValue V1 = Op.getOperand(0); in lowerVectorShuffle() local
14834 SDValue V1 = DAG.getNode(ISD::TRUNCATE, dl, VT, WideVal.getOperand(1)); in EmitTest() local
20232 auto SignBitSelect = [&](MVT SelVT, SDValue Sel, SDValue V0, SDValue V1) { in LowerShift()
20374 auto SignBitSelect = [&](SDValue Sel, SDValue V0, SDValue V1) { in LowerShift()
24677 SDValue V1 = SVOp->getOperand(0); in combineShuffle256() local
25203 SDValue V1 = Input, V2 = Input; in combineX86ShuffleChain() local
25749 SDValue V1 = N->getOperand(1); in combineTargetShuffle() local
26007 SDValue V1 = N->getOperand(0); in combineShuffleToAddSub() local
27983 SDValue V1 = N01->getOperand(0); in combineANDXORWithAllOnesIntoANDNP() local