Lines Matching refs:hci_cmd_buffer
181 static void chipset_set_baudrate_command(uint32_t baudrate, uint8_t *hci_cmd_buffer){ in chipset_set_baudrate_command() argument
182 hci_cmd_buffer[0] = 0x36; in chipset_set_baudrate_command()
183 hci_cmd_buffer[1] = 0xFF; in chipset_set_baudrate_command()
184 hci_cmd_buffer[2] = 0x04; in chipset_set_baudrate_command()
185 hci_cmd_buffer[3] = baudrate & 0xff; in chipset_set_baudrate_command()
186 hci_cmd_buffer[4] = (baudrate >> 8) & 0xff; in chipset_set_baudrate_command()
187 hci_cmd_buffer[5] = (baudrate >> 16) & 0xff; in chipset_set_baudrate_command()
188 hci_cmd_buffer[6] = 0; in chipset_set_baudrate_command()
191 static void chipset_set_bd_addr_command(bd_addr_t addr, uint8_t *hci_cmd_buffer){ in chipset_set_bd_addr_command() argument
192 hci_cmd_buffer[0] = 0x06; in chipset_set_bd_addr_command()
193 hci_cmd_buffer[1] = 0xFC; in chipset_set_bd_addr_command()
194 hci_cmd_buffer[2] = 0x06; in chipset_set_bd_addr_command()
195 reverse_bd_addr(addr, &hci_cmd_buffer[3]); in chipset_set_bd_addr_command()
233 static void update_set_power_vector(uint8_t *hci_cmd_buffer){ in update_set_power_vector() argument
234 uint8_t modulation_type = hci_cmd_buffer[3]; in update_set_power_vector()
239 (void)memcpy(&hci_cmd_buffer[4], init_power_vectors[modulation_type], 16); in update_set_power_vector()
253 hci_cmd_buffer[4+1] = 2 * get_max_power_for_modulation_type(modulation_type); in update_set_power_vector()
258 hci_cmd_buffer[4+i] = 2 * power_db; in update_set_power_vector()
272 static void update_set_class2_single_power(uint8_t * hci_cmd_buffer){ in update_set_class2_single_power() argument
276 …hci_cmd_buffer[3+i] = get_highest_level_for_given_power(get_max_power_for_modulation_type(i), max_… in update_set_class2_single_power()
281 static void update_sleep_mode_configurations(uint8_t * hci_cmd_buffer){ in update_sleep_mode_configurations() argument
283 hci_cmd_buffer[4] = 1; in update_sleep_mode_configurations()
285 hci_cmd_buffer[4] = 0; in update_sleep_mode_configurations()
289 static void update_init_script_command(uint8_t *hci_cmd_buffer){ in update_init_script_command() argument
291 uint16_t opcode = hci_cmd_buffer[0] | (hci_cmd_buffer[1] << 8); in update_init_script_command()
295 update_set_class2_single_power(hci_cmd_buffer); in update_init_script_command()
298 update_set_power_vector(hci_cmd_buffer); in update_init_script_command()
301 update_sleep_mode_configurations(hci_cmd_buffer); in update_init_script_command()
308 static btstack_chipset_result_t chipset_next_command(uint8_t * hci_cmd_buffer){ in chipset_next_command() argument
315 memcpy(hci_cmd_buffer, hci_route_sco_over_hci, sizeof(hci_route_sco_over_hci)); in chipset_next_command()
323 … memcpy(hci_cmd_buffer, hci_write_codec_config_cvsd, sizeof(hci_write_codec_config_cvsd)); in chipset_next_command()
337 FlashReadBlock(&hci_cmd_buffer[0], init_script_addr + init_script_offset, 3); // cmd header in chipset_next_command()
339 int payload_len = hci_cmd_buffer[2]; in chipset_next_command()
340 …FlashReadBlock(&hci_cmd_buffer[3], init_script_addr + init_script_offset, payload_len); // cmd pa… in chipset_next_command()
345 memcpy_P(&hci_cmd_buffer[0], &init_script[init_script_offset], 3); in chipset_next_command()
347 int payload_len = hci_cmd_buffer[2]; in chipset_next_command()
348 memcpy_P(&hci_cmd_buffer[3], &init_script[init_script_offset], payload_len); in chipset_next_command()
354 memcpy(&hci_cmd_buffer[0], init_script_ptr + init_script_offset, 3); // cmd header in chipset_next_command()
356 int payload_len = hci_cmd_buffer[2]; in chipset_next_command()
357 memcpy(&hci_cmd_buffer[3], init_script_ptr + init_script_offset, payload_len); // cmd payload in chipset_next_command()
364 update_init_script_command(hci_cmd_buffer); in chipset_next_command()