Lines Matching +full:enable +full:- +full:method
1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Lorenzo Pieralisi <[email protected]>
21 with updates for 32-bit and 64-bit ARM systems provided in this document.
30 - square brackets define bitfields, eg reg[7:0] value of the bitfield in
59 On 32-bit ARM v7 or later systems this property is
68 On ARM v8 64-bit systems this property is required
71 * If cpus node's #address-cells property is set to 2
79 * If cpus node's #address-cells property is set to 1
88 - apple,avalanche
89 - apple,blizzard
90 - apple,cyclone
91 - apple,firestorm
92 - apple,hurricane-zephyr
93 - apple,icestorm
94 - apple,mistral
95 - apple,monsoon
96 - apple,twister
97 - apple,typhoon
98 - arm,arm710t
99 - arm,arm720t
100 - arm,arm740t
101 - arm,arm7ej-s
102 - arm,arm7tdmi
103 - arm,arm7tdmi-s
104 - arm,arm9es
105 - arm,arm9ej-s
106 - arm,arm920t
107 - arm,arm922t
108 - arm,arm925
109 - arm,arm926e-s
110 - arm,arm926ej-s
111 - arm,arm940t
112 - arm,arm946e-s
113 - arm,arm966e-s
114 - arm,arm968e-s
115 - arm,arm9tdmi
116 - arm,arm1020e
117 - arm,arm1020t
118 - arm,arm1022e
119 - arm,arm1026ej-s
120 - arm,arm1136j-s
121 - arm,arm1136jf-s
122 - arm,arm1156t2-s
123 - arm,arm1156t2f-s
124 - arm,arm1176jzf
125 - arm,arm1176jz-s
126 - arm,arm1176jzf-s
127 - arm,arm11mpcore
128 - arm,armv8 # Only for s/w models
129 - arm,cortex-a5
130 - arm,cortex-a7
131 - arm,cortex-a8
132 - arm,cortex-a9
133 - arm,cortex-a12
134 - arm,cortex-a15
135 - arm,cortex-a17
136 - arm,cortex-a32
137 - arm,cortex-a34
138 - arm,cortex-a35
139 - arm,cortex-a53
140 - arm,cortex-a55
141 - arm,cortex-a57
142 - arm,cortex-a65
143 - arm,cortex-a72
144 - arm,cortex-a73
145 - arm,cortex-a75
146 - arm,cortex-a76
147 - arm,cortex-a77
148 - arm,cortex-a78
149 - arm,cortex-a78ae
150 - arm,cortex-a78c
151 - arm,cortex-a510
152 - arm,cortex-a520
153 - arm,cortex-a710
154 - arm,cortex-a715
155 - arm,cortex-a720
156 - arm,cortex-a725
157 - arm,cortex-m0
158 - arm,cortex-m0+
159 - arm,cortex-m1
160 - arm,cortex-m3
161 - arm,cortex-m4
162 - arm,cortex-r4
163 - arm,cortex-r5
164 - arm,cortex-r7
165 - arm,cortex-r52
166 - arm,cortex-x1
167 - arm,cortex-x1c
168 - arm,cortex-x2
169 - arm,cortex-x3
170 - arm,cortex-x4
171 - arm,cortex-x925
172 - arm,neoverse-e1
173 - arm,neoverse-n1
174 - arm,neoverse-n2
175 - arm,neoverse-n3
176 - arm,neoverse-v1
177 - arm,neoverse-v2
178 - arm,neoverse-v3
179 - arm,neoverse-v3ae
180 - brcm,brahma-b15
181 - brcm,brahma-b53
182 - brcm,vulcan
183 - cavium,thunder
184 - cavium,thunder2
185 - faraday,fa526
186 - intel,sa110
187 - intel,sa1100
188 - marvell,feroceon
189 - marvell,mohawk
190 - marvell,pj4a
191 - marvell,pj4b
192 - marvell,sheeva-v5
193 - marvell,sheeva-v7
194 - nvidia,tegra132-denver
195 - nvidia,tegra186-denver
196 - nvidia,tegra194-carmel
197 - qcom,krait
198 - qcom,kryo
199 - qcom,kryo240
200 - qcom,kryo250
201 - qcom,kryo260
202 - qcom,kryo280
203 - qcom,kryo360
204 - qcom,kryo385
205 - qcom,kryo465
206 - qcom,kryo468
207 - qcom,kryo485
208 - qcom,kryo560
209 - qcom,kryo570
210 - qcom,kryo660
211 - qcom,kryo670
212 - qcom,kryo685
213 - qcom,kryo780
214 - qcom,oryon
215 - qcom,scorpion
216 - samsung,mongoose-m2
217 - samsung,mongoose-m3
218 - samsung,mongoose-m5
220 enable-method:
223 # On ARM v8 64-bit this property is required
224 - enum:
225 - psci
226 - spin-table
227 # On ARM 32-bit systems this property is optional
228 - enum:
229 - actions,s500-smp
230 - allwinner,sun6i-a31
231 - allwinner,sun8i-a23
232 - allwinner,sun9i-a80-smp
233 - allwinner,sun8i-a83t-smp
234 - amlogic,meson8-smp
235 - amlogic,meson8b-smp
236 - arm,realview-smp
237 - aspeed,ast2600-smp
238 - brcm,bcm11351-cpu-method
239 - brcm,bcm23550
240 - brcm,bcm2836-smp
241 - brcm,bcm63138
242 - brcm,bcm-nsp-smp
243 - brcm,brahma-b15
244 - marvell,armada-375-smp
245 - marvell,armada-380-smp
246 - marvell,armada-390-smp
247 - marvell,armada-xp-smp
248 - marvell,98dx3236-smp
249 - marvell,mmp3-smp
250 - mediatek,mt6589-smp
251 - mediatek,mt81xx-tz-smp
252 - qcom,gcc-msm8660
253 - qcom,kpss-acc-v1
254 - qcom,kpss-acc-v2
255 - qcom,msm8226-smp
256 - qcom,msm8909-smp
257 # Only valid on ARM 32-bit, see above for ARM v8 64-bit
258 - qcom,msm8916-smp
259 - renesas,apmu
260 - renesas,r9a06g032-smp
261 - rockchip,rk3036-smp
262 - rockchip,rk3066-smp
263 - socionext,milbeaut-m10v-smp
264 - ste,dbx500-smp
265 - ti,am3352
266 - ti,am4372
268 cpu-release-addr:
270 - $ref: /schemas/types.yaml#/definitions/uint32
271 - $ref: /schemas/types.yaml#/definitions/uint64
273 The DT specification defines this as 64-bit always, but some 32-bit Arm
274 systems have used a 32-bit value which must be supported.
275 Required for systems that have an "enable-method"
276 property value of "spin-table".
278 cpu-idle-states:
279 $ref: /schemas/types.yaml#/definitions/phandle-array
284 by this cpu (see ./idle-states.yaml).
286 capacity-dmips-mhz:
288 u32 value representing CPU capacity (see ../cpu/cpu-capacity.txt) in
289 DMIPS/MHz, relative to highest capacity-dmips-mhz
292 cci-control-port: true
294 dynamic-power-coefficient:
305 calculate the dynamic power as below -
307 Pdyn = dynamic-power-coefficient * V^2 * f
311 performance-domains:
316 dvfs/performance-domain.yaml.
318 power-domains:
323 power-domain-names:
326 power-domains property.
338 Required for systems that have an "enable-method" property
339 value of "qcom,kpss-acc-v1" or "qcom,kpss-acc-v2"
348 Required for systems that have an "enable-method" property
349 value of "qcom,kpss-acc-v1", "qcom,kpss-acc-v2", "qcom,msm8226-smp" or
350 "qcom,msm8916-smp".
352 * arm/msm/qcom,kpss-acc.txt
359 Optional for systems that have an "enable-method"
360 property value of "rockchip,rk3066-smp"
362 the cpu-core power-domains.
364 secondary-boot-reg:
367 Required for systems that have an "enable-method" property value of
368 "brcm,bcm11351-cpu-method", "brcm,bcm23550" or "brcm,bcm-nsp-smp".
374 The secondary-boot-reg property is a u32 value that specifies the
381 # If the enable-method property contains one of those values
383 enable-method:
386 - brcm,bcm11351-cpu-method
387 - brcm,bcm23550
388 - brcm,bcm-nsp-smp
389 # and if enable-method is present
391 - enable-method
395 - secondary-boot-reg
398 - device_type
399 - reg
400 - compatible
403 rockchip,pmu: [enable-method]
408 - |
410 #size-cells = <0>;
411 #address-cells = <1>;
415 compatible = "arm,cortex-a15";
421 compatible = "arm,cortex-a15";
427 compatible = "arm,cortex-a7";
433 compatible = "arm,cortex-a7";
438 - |
439 // Example 2 (Cortex-A8 uniprocessor 32-bit system):
441 #size-cells = <0>;
442 #address-cells = <1>;
446 compatible = "arm,cortex-a8";
451 - |
452 // Example 3 (ARM 926EJ-S uniprocessor 32-bit system):
454 #size-cells = <0>;
455 #address-cells = <1>;
459 compatible = "arm,arm926ej-s";
464 - |
465 // Example 4 (ARM Cortex-A57 64-bit system):
467 #size-cells = <0>;
468 #address-cells = <2>;
472 compatible = "arm,cortex-a57";
474 enable-method = "spin-table";
475 cpu-release-addr = <0 0x20000000>;
480 compatible = "arm,cortex-a57";
482 enable-method = "spin-table";
483 cpu-release-addr = <0 0x20000000>;
488 compatible = "arm,cortex-a57";
490 enable-method = "spin-table";
491 cpu-release-addr = <0 0x20000000>;
496 compatible = "arm,cortex-a57";
498 enable-method = "spin-table";
499 cpu-release-addr = <0 0x20000000>;
504 compatible = "arm,cortex-a57";
506 enable-method = "spin-table";
507 cpu-release-addr = <0 0x20000000>;
512 compatible = "arm,cortex-a57";
514 enable-method = "spin-table";
515 cpu-release-addr = <0 0x20000000>;
520 compatible = "arm,cortex-a57";
522 enable-method = "spin-table";
523 cpu-release-addr = <0 0x20000000>;
528 compatible = "arm,cortex-a57";
530 enable-method = "spin-table";
531 cpu-release-addr = <0 0x20000000>;
536 compatible = "arm,cortex-a57";
538 enable-method = "spin-table";
539 cpu-release-addr = <0 0x20000000>;
544 compatible = "arm,cortex-a57";
546 enable-method = "spin-table";
547 cpu-release-addr = <0 0x20000000>;
552 compatible = "arm,cortex-a57";
554 enable-method = "spin-table";
555 cpu-release-addr = <0 0x20000000>;
560 compatible = "arm,cortex-a57";
562 enable-method = "spin-table";
563 cpu-release-addr = <0 0x20000000>;
568 compatible = "arm,cortex-a57";
570 enable-method = "spin-table";
571 cpu-release-addr = <0 0x20000000>;
576 compatible = "arm,cortex-a57";
578 enable-method = "spin-table";
579 cpu-release-addr = <0 0x20000000>;
584 compatible = "arm,cortex-a57";
586 enable-method = "spin-table";
587 cpu-release-addr = <0 0x20000000>;
592 compatible = "arm,cortex-a57";
594 enable-method = "spin-table";
595 cpu-release-addr = <0 0x20000000>;