Lines Matching +full:imx53 +full:- +full:rtc
1 // SPDX-License-Identifier: GPL-2.0
5 #include <dt-bindings/clock/imx6ul-clock.h>
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/input/input.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include "imx6ul-pinfunc.h"
12 #address-cells = <1>;
13 #size-cells = <1>;
16 * pre-existing /chosen node to be available to insert the
57 #address-cells = <1>;
58 #size-cells = <0>;
61 compatible = "arm,cortex-a7";
64 clock-frequency = <696000000>;
65 clock-latency = <61036>; /* two CLK32 periods */
66 #cooling-cells = <2>;
67 operating-points =
73 fsl,soc-operating-points =
86 clock-names = "arm", "pll2_bus", "pll2_pfd2_396m",
89 arm-supply = <®_arm>;
90 soc-supply = <®_soc>;
91 nvmem-cells = <&cpu_speed_grade>;
92 nvmem-cell-names = "speed_grade";
97 compatible = "arm,armv7-timer";
102 interrupt-parent = <&intc>;
106 ckil: clock-cli {
107 compatible = "fixed-clock";
108 #clock-cells = <0>;
109 clock-frequency = <32768>;
110 clock-output-names = "ckil";
113 osc: clock-osc {
114 compatible = "fixed-clock";
115 #clock-cells = <0>;
116 clock-frequency = <24000000>;
117 clock-output-names = "osc";
120 ipp_di0: clock-di0 {
121 compatible = "fixed-clock";
122 #clock-cells = <0>;
123 clock-frequency = <0>;
124 clock-output-names = "ipp_di0";
127 ipp_di1: clock-di1 {
128 compatible = "fixed-clock";
129 #clock-cells = <0>;
130 clock-frequency = <0>;
131 clock-output-names = "ipp_di1";
135 compatible = "arm,cortex-a7-pmu";
136 interrupt-parent = <&gpc>;
141 #address-cells = <1>;
142 #size-cells = <1>;
143 compatible = "simple-bus";
144 interrupt-parent = <&gpc>;
148 compatible = "mmio-sram";
151 #address-cells = <1>;
152 #size-cells = <1>;
155 intc: interrupt-controller@a01000 {
156 compatible = "arm,gic-400", "arm,cortex-a7-gic";
158 #interrupt-cells = <3>;
159 interrupt-controller;
160 interrupt-parent = <&intc>;
167 dma_apbh: dma-controller@1804000 {
168 compatible = "fsl,imx6q-dma-apbh", "fsl,imx28-dma-apbh";
174 #dma-cells = <1>;
175 dma-channels = <4>;
179 gpmi: nand-controller@1806000 {
180 compatible = "fsl,imx6q-gpmi-nand";
181 #address-cells = <1>;
182 #size-cells = <0>;
184 reg-names = "gpmi-nand", "bch";
186 interrupt-names = "bch";
192 clock-names = "gpmi_io", "gpmi_apb", "gpmi_bch",
195 dma-names = "rx-tx";
200 compatible = "fsl,aips-bus", "simple-bus";
201 #address-cells = <1>;
202 #size-cells = <1>;
206 spba-bus@2000000 {
207 compatible = "fsl,spba-bus", "simple-bus";
208 #address-cells = <1>;
209 #size-cells = <1>;
214 #address-cells = <1>;
215 #size-cells = <0>;
216 compatible = "fsl,imx6ul-ecspi", "fsl,imx51-ecspi";
221 clock-names = "ipg", "per";
223 dma-names = "rx", "tx";
228 #address-cells = <1>;
229 #size-cells = <0>;
230 compatible = "fsl,imx6ul-ecspi", "fsl,imx51-ecspi";
235 clock-names = "ipg", "per";
237 dma-names = "rx", "tx";
242 #address-cells = <1>;
243 #size-cells = <0>;
244 compatible = "fsl,imx6ul-ecspi", "fsl,imx51-ecspi";
249 clock-names = "ipg", "per";
251 dma-names = "rx", "tx";
256 #address-cells = <1>;
257 #size-cells = <0>;
258 compatible = "fsl,imx6ul-ecspi", "fsl,imx51-ecspi";
263 clock-names = "ipg", "per";
265 dma-names = "rx", "tx";
270 compatible = "fsl,imx6ul-uart",
271 "fsl,imx6q-uart";
276 clock-names = "ipg", "per";
278 dma-names = "rx", "tx";
283 compatible = "fsl,imx6ul-uart",
284 "fsl,imx6q-uart";
289 clock-names = "ipg", "per";
291 dma-names = "rx", "tx";
296 compatible = "fsl,imx6ul-uart",
297 "fsl,imx6q-uart";
302 clock-names = "ipg", "per";
304 dma-names = "rx", "tx";
309 #sound-dai-cells = <0>;
310 compatible = "fsl,imx6ul-sai", "fsl,imx6sx-sai";
316 clock-names = "bus", "mclk1", "mclk2", "mclk3";
319 dma-names = "rx", "tx";
324 #sound-dai-cells = <0>;
325 compatible = "fsl,imx6ul-sai", "fsl,imx6sx-sai";
331 clock-names = "bus", "mclk1", "mclk2", "mclk3";
334 dma-names = "rx", "tx";
339 #sound-dai-cells = <0>;
340 compatible = "fsl,imx6ul-sai", "fsl,imx6sx-sai";
346 clock-names = "bus", "mclk1", "mclk2", "mclk3";
349 dma-names = "rx", "tx";
354 compatible = "fsl,imx6ul-asrc", "fsl,imx53-asrc";
364 clock-names = "mem", "ipg", "asrck_0",
371 dma-names = "rxa", "rxb", "rxc",
373 fsl,asrc-rate = <48000>;
374 fsl,asrc-width = <16>;
380 compatible = "fsl,imx6ul-tsc";
386 clock-names = "tsc", "adc";
391 compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm";
396 clock-names = "ipg", "per";
397 #pwm-cells = <3>;
402 compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm";
407 clock-names = "ipg", "per";
408 #pwm-cells = <3>;
413 compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm";
418 clock-names = "ipg", "per";
419 #pwm-cells = <3>;
424 compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm";
429 clock-names = "ipg", "per";
430 #pwm-cells = <3>;
435 compatible = "fsl,imx6ul-flexcan", "fsl,imx6q-flexcan";
440 clock-names = "ipg", "per";
441 fsl,stop-mode = <&gpr 0x10 1>;
446 compatible = "fsl,imx6ul-flexcan", "fsl,imx6q-flexcan";
451 clock-names = "ipg", "per";
452 fsl,stop-mode = <&gpr 0x10 2>;
457 compatible = "fsl,imx6ul-gpt", "fsl,imx6sx-gpt";
462 clock-names = "ipg", "per";
466 compatible = "fsl,imx6ul-gpio", "fsl,imx35-gpio";
471 gpio-controller;
472 #gpio-cells = <2>;
473 interrupt-controller;
474 #interrupt-cells = <2>;
475 gpio-ranges = <&iomuxc 0 23 10>, <&iomuxc 10 17 6>,
480 compatible = "fsl,imx6ul-gpio", "fsl,imx35-gpio";
485 gpio-controller;
486 #gpio-cells = <2>;
487 interrupt-controller;
488 #interrupt-cells = <2>;
489 gpio-ranges = <&iomuxc 0 49 16>, <&iomuxc 16 111 6>;
493 compatible = "fsl,imx6ul-gpio", "fsl,imx35-gpio";
498 gpio-controller;
499 #gpio-cells = <2>;
500 interrupt-controller;
501 #interrupt-cells = <2>;
502 gpio-ranges = <&iomuxc 0 65 29>;
506 compatible = "fsl,imx6ul-gpio", "fsl,imx35-gpio";
511 gpio-controller;
512 #gpio-cells = <2>;
513 interrupt-controller;
514 #interrupt-cells = <2>;
515 gpio-ranges = <&iomuxc 0 94 17>, <&iomuxc 17 117 12>;
519 compatible = "fsl,imx6ul-gpio", "fsl,imx35-gpio";
524 gpio-controller;
525 #gpio-cells = <2>;
526 interrupt-controller;
527 #interrupt-cells = <2>;
528 gpio-ranges = <&iomuxc 0 7 10>, <&iomuxc 10 5 2>;
532 compatible = "fsl,imx6ul-fec", "fsl,imx6q-fec";
534 interrupt-names = "int0", "pps";
541 clock-names = "ipg", "ahb", "ptp",
543 fsl,num-tx-queues = <1>;
544 fsl,num-rx-queues = <1>;
545 fsl,stop-mode = <&gpr 0x10 4>;
546 fsl,magic-packet;
547 nvmem-cells = <&fec2_mac_addr>;
548 nvmem-cell-names = "mac-address";
553 compatible = "fsl,imx6ul-kpp", "fsl,imx21-kpp";
561 compatible = "fsl,imx6ul-wdt", "fsl,imx21-wdt";
568 compatible = "fsl,imx6ul-wdt", "fsl,imx21-wdt";
575 clks: clock-controller@20c4000 {
576 compatible = "fsl,imx6ul-ccm";
580 #clock-cells = <1>;
582 clock-names = "ckil", "osc", "ipp_di0", "ipp_di1";
586 compatible = "fsl,imx6ul-anatop", "fsl,imx6q-anatop",
587 "syscon", "simple-mfd";
593 reg_3p0: regulator-3p0 {
594 compatible = "fsl,anatop-regulator";
595 regulator-name = "vdd3p0";
596 regulator-min-microvolt = <2625000>;
597 regulator-max-microvolt = <3400000>;
598 anatop-reg-offset = <0x120>;
599 anatop-vol-bit-shift = <8>;
600 anatop-vol-bit-width = <5>;
601 anatop-min-bit-val = <0>;
602 anatop-min-voltage = <2625000>;
603 anatop-max-voltage = <3400000>;
604 anatop-enable-bit = <0>;
607 reg_arm: regulator-vddcore {
608 compatible = "fsl,anatop-regulator";
609 regulator-name = "cpu";
610 regulator-min-microvolt = <725000>;
611 regulator-max-microvolt = <1450000>;
612 regulator-always-on;
613 anatop-reg-offset = <0x140>;
614 anatop-vol-bit-shift = <0>;
615 anatop-vol-bit-width = <5>;
616 anatop-delay-reg-offset = <0x170>;
617 anatop-delay-bit-shift = <24>;
618 anatop-delay-bit-width = <2>;
619 anatop-min-bit-val = <1>;
620 anatop-min-voltage = <725000>;
621 anatop-max-voltage = <1450000>;
624 reg_soc: regulator-vddsoc {
625 compatible = "fsl,anatop-regulator";
626 regulator-name = "vddsoc";
627 regulator-min-microvolt = <725000>;
628 regulator-max-microvolt = <1450000>;
629 regulator-always-on;
630 anatop-reg-offset = <0x140>;
631 anatop-vol-bit-shift = <18>;
632 anatop-vol-bit-width = <5>;
633 anatop-delay-reg-offset = <0x170>;
634 anatop-delay-bit-shift = <28>;
635 anatop-delay-bit-width = <2>;
636 anatop-min-bit-val = <1>;
637 anatop-min-voltage = <725000>;
638 anatop-max-voltage = <1450000>;
642 compatible = "fsl,imx6ul-tempmon", "fsl,imx6sx-tempmon";
643 interrupt-parent = <&gpc>;
646 nvmem-cells = <&tempmon_calib>, <&tempmon_temp_grade>;
647 nvmem-cell-names = "calib", "temp_grade";
649 #thermal-sensor-cells = <0>;
654 compatible = "fsl,imx6ul-usbphy", "fsl,imx23-usbphy";
658 phy-3p0-supply = <®_3p0>;
663 compatible = "fsl,imx6ul-usbphy", "fsl,imx23-usbphy";
667 phy-3p0-supply = <®_3p0>;
672 compatible = "fsl,sec-v4.0-mon", "syscon", "simple-mfd";
675 snvs_rtc: snvs-rtc-lp {
676 compatible = "fsl,sec-v4.0-mon-rtc-lp";
683 snvs_poweroff: snvs-poweroff {
684 compatible = "syscon-poweroff";
692 snvs_pwrkey: snvs-powerkey {
693 compatible = "fsl,sec-v4.0-pwrkey";
697 wakeup-source;
701 snvs_lpgpr: snvs-lpgpr {
702 compatible = "fsl,imx6ul-snvs-lpgpr";
716 src: reset-controller@20d8000 {
717 compatible = "fsl,imx6ul-src", "fsl,imx51-src";
721 #reset-cells = <1>;
725 compatible = "fsl,imx6ul-gpc", "fsl,imx6q-gpc";
727 interrupt-controller;
728 #interrupt-cells = <3>;
730 interrupt-parent = <&intc>;
732 clock-names = "ipg";
735 #address-cells = <1>;
736 #size-cells = <0>;
738 power-domain@0 {
740 #power-domain-cells = <0>;
746 compatible = "fsl,imx6ul-iomuxc";
750 gpr: iomuxc-gpr@20e4000 {
751 compatible = "fsl,imx6ul-iomuxc-gpr",
752 "fsl,imx6q-iomuxc-gpr", "syscon";
757 compatible = "fsl,imx6ul-gpt", "fsl,imx6sx-gpt";
762 clock-names = "ipg", "per";
766 sdma: dma-controller@20ec000 {
767 compatible = "fsl,imx6ul-sdma", "fsl,imx6q-sdma",
768 "fsl,imx35-sdma";
773 clock-names = "ipg", "ahb";
774 #dma-cells = <3>;
775 fsl,sdma-ram-script-name = "imx/sdma/sdma-imx6q.bin";
779 compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm";
784 clock-names = "ipg", "per";
785 #pwm-cells = <3>;
790 compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm";
795 clock-names = "ipg", "per";
796 #pwm-cells = <3>;
801 compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm";
806 clock-names = "ipg", "per";
807 #pwm-cells = <3>;
812 compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm";
817 clock-names = "ipg", "per";
818 #pwm-cells = <3>;
824 compatible = "fsl,aips-bus", "simple-bus";
825 #address-cells = <1>;
826 #size-cells = <1>;
831 compatible = "fsl,imx6ul-caam", "fsl,sec-v4.0";
832 #address-cells = <1>;
833 #size-cells = <1>;
839 clock-names = "ipg", "aclk", "mem";
842 compatible = "fsl,sec-v4.0-job-ring";
848 compatible = "fsl,sec-v4.0-job-ring";
854 compatible = "fsl,sec-v4.0-job-ring";
861 compatible = "fsl,imx6ul-usb", "fsl,imx27-usb";
867 ahb-burst-config = <0x0>;
868 tx-burst-size-dword = <0x10>;
869 rx-burst-size-dword = <0x10>;
874 compatible = "fsl,imx6ul-usb", "fsl,imx27-usb";
880 ahb-burst-config = <0x0>;
881 tx-burst-size-dword = <0x10>;
882 rx-burst-size-dword = <0x10>;
887 #index-cells = <1>;
888 compatible = "fsl,imx6ul-usbmisc", "fsl,imx6q-usbmisc";
893 compatible = "fsl,imx6ul-fec", "fsl,imx6q-fec";
895 interrupt-names = "int0", "pps";
902 clock-names = "ipg", "ahb", "ptp",
904 fsl,num-tx-queues = <1>;
905 fsl,num-rx-queues = <1>;
906 fsl,stop-mode = <&gpr 0x10 3>;
907 fsl,magic-packet;
908 nvmem-cells = <&fec1_mac_addr>;
909 nvmem-cell-names = "mac-address";
914 compatible = "fsl,imx6ul-usdhc", "fsl,imx6sx-usdhc";
920 clock-names = "ipg", "ahb", "per";
921 fsl,tuning-step = <2>;
922 fsl,tuning-start-tap = <20>;
923 bus-width = <4>;
928 compatible = "fsl,imx6ul-usdhc", "fsl,imx6sx-usdhc";
934 clock-names = "ipg", "ahb", "per";
935 bus-width = <4>;
936 fsl,tuning-step = <2>;
937 fsl,tuning-start-tap = <20>;
942 compatible = "fsl,imx6ul-adc", "fsl,vf610-adc";
946 clock-names = "adc";
947 fsl,adck-max-frequency = <30000000>, <40000000>,
953 #address-cells = <1>;
954 #size-cells = <0>;
955 compatible = "fsl,imx6ul-i2c", "fsl,imx21-i2c";
963 #address-cells = <1>;
964 #size-cells = <0>;
965 compatible = "fsl,imx6ul-i2c", "fsl,imx21-i2c";
973 #address-cells = <1>;
974 #size-cells = <0>;
975 compatible = "fsl,imx6ul-i2c", "fsl,imx21-i2c";
982 memory-controller@21b0000 {
983 compatible = "fsl,imx6ul-mmdc", "fsl,imx6q-mmdc";
988 weim: memory-controller@21b8000 {
989 #address-cells = <2>;
990 #size-cells = <1>;
991 compatible = "fsl,imx6ul-weim", "fsl,imx6q-weim";
995 fsl,weim-cs-gpr = <&gpr>;
1000 #address-cells = <1>;
1001 #size-cells = <1>;
1002 compatible = "fsl,imx6ul-ocotp", "syscon";
1010 tempmon_temp_grade: temp-grade@20 {
1014 cpu_speed_grade: speed-grade@10 {
1018 fec1_mac_addr: mac-addr@88 {
1022 fec2_mac_addr: mac-addr@8e {
1028 compatible = "fsl,imx6ul-csi";
1032 clock-names = "mclk";
1037 compatible = "fsl,imx6ul-lcdif", "fsl,imx6sx-lcdif";
1043 clock-names = "pix", "axi", "disp_axi";
1048 compatible = "fsl,imx6ul-pxp";
1052 clock-names = "axi";
1056 #address-cells = <1>;
1057 #size-cells = <0>;
1058 compatible = "fsl,imx6ul-qspi";
1060 reg-names = "QuadSPI", "QuadSPI-memory";
1064 clock-names = "qspi_en", "qspi";
1069 compatible = "fsl,imx6ul-wdt", "fsl,imx21-wdt";
1077 compatible = "fsl,imx6ul-uart",
1078 "fsl,imx6q-uart";
1083 clock-names = "ipg", "per";
1085 dma-names = "rx", "tx";
1090 compatible = "fsl,imx6ul-uart",
1091 "fsl,imx6q-uart";
1096 clock-names = "ipg", "per";
1098 dma-names = "rx", "tx";
1103 compatible = "fsl,imx6ul-uart",
1104 "fsl,imx6q-uart";
1109 clock-names = "ipg", "per";
1111 dma-names = "rx", "tx";
1116 compatible = "fsl,imx6ul-uart",
1117 "fsl,imx6q-uart";
1122 clock-names = "ipg", "per";
1124 dma-names = "rx", "tx";
1129 #address-cells = <1>;
1130 #size-cells = <0>;
1131 compatible = "fsl,imx6ul-i2c", "fsl,imx21-i2c";
1139 compatible = "fsl,imx6ul-uart",
1140 "fsl,imx6q-uart";
1145 clock-names = "ipg", "per";
1147 dma-names = "rx", "tx";