1 // SPDX-License-Identifier: GPL-2.0
3  * Copyright (C) 2022-2023 Loongson Technology Corporation Limited
5 #define pr_fmt(fmt) "hw-breakpoint: " fmt
85 	GEN_READ_WB_REG_CASES(CSR_CFG_CTRL, CTRL, t, val);  in read_wb_reg()
100 	GEN_WRITE_WB_REG_CASES(CSR_CFG_CTRL, CTRL, t, val);  in write_wb_reg()
114  * hw_breakpoint_slot_setup - Find and setup a perf slot according to operations
123  *	-ENOSPC if no slot is available/matches
124  *	-EINVAL on wrong operations parameter
150 			return -EINVAL;  in hw_breakpoint_slot_setup()
154 	return -ENOSPC;  in hw_breakpoint_slot_setup()
159 	memset(tsk->thread.hbp_break, 0, sizeof(tsk->thread.hbp_break));  in ptrace_hw_copy_thread()
160 	memset(tsk->thread.hbp_watch, 0, sizeof(tsk->thread.hbp_watch));  in ptrace_hw_copy_thread()
169 	struct thread_struct *t = &tsk->thread;  in flush_ptrace_hw_breakpoint()
172 		if (t->hbp_break[i]) {  in flush_ptrace_hw_breakpoint()
173 			unregister_hw_breakpoint(t->hbp_break[i]);  in flush_ptrace_hw_breakpoint()
174 			t->hbp_break[i] = NULL;  in flush_ptrace_hw_breakpoint()
179 		if (t->hbp_watch[i]) {  in flush_ptrace_hw_breakpoint()
180 			unregister_hw_breakpoint(t->hbp_watch[i]);  in flush_ptrace_hw_breakpoint()
181 			t->hbp_watch[i] = NULL;  in flush_ptrace_hw_breakpoint()
189 	u32 ctrl, privilege;  in hw_breakpoint_control()  local
201 	if (bp->hw.target)  in hw_breakpoint_control()
202 		regs = task_pt_regs(bp->hw.target);  in hw_breakpoint_control()
204 	if (info->ctrl.type == LOONGARCH_BREAKPOINT_EXECUTE) {  in hw_breakpoint_control()
222 		if (info->ctrl.type == LOONGARCH_BREAKPOINT_EXECUTE) {  in hw_breakpoint_control()
223 			write_wb_reg(CSR_CFG_ADDR, i, 0, info->address);  in hw_breakpoint_control()
224 			write_wb_reg(CSR_CFG_MASK, i, 0, info->mask);  in hw_breakpoint_control()
228 			write_wb_reg(CSR_CFG_ADDR, i, 1, info->address);  in hw_breakpoint_control()
229 			write_wb_reg(CSR_CFG_MASK, i, 1, info->mask);  in hw_breakpoint_control()
231 			ctrl = encode_ctrl_reg(info->ctrl);  in hw_breakpoint_control()
232 			write_wb_reg(CSR_CFG_CTRL, i, 1, ctrl | privilege);  in hw_breakpoint_control()
236 		if (bp->hw.target && test_tsk_thread_flag(bp->hw.target, TIF_LOAD_WATCH))  in hw_breakpoint_control()
237 			regs->csr_prmd |= CSR_PRMD_PWE;  in hw_breakpoint_control()
241 		if (info->ctrl.type == LOONGARCH_BREAKPOINT_EXECUTE) {  in hw_breakpoint_control()
252 		if (bp->hw.target)  in hw_breakpoint_control()
253 			regs->csr_prmd &= ~CSR_PRMD_PWE;  in hw_breakpoint_control()
300 	unsigned int len;  in arch_check_bp_in_kernelspace()  local
303 	va = hw->address;  in arch_check_bp_in_kernelspace()
304 	len = get_hbp_len(hw->ctrl.len);  in arch_check_bp_in_kernelspace()
306 	return (va >= TASK_SIZE) && ((va + len - 1) >= TASK_SIZE);  in arch_check_bp_in_kernelspace()
314 int arch_bp_generic_fields(struct arch_hw_breakpoint_ctrl ctrl,  in arch_bp_generic_fields()  argument
318 	switch (ctrl.type) {  in arch_bp_generic_fields()
332 		return -EINVAL;  in arch_bp_generic_fields()
335 	/* Len */  in arch_bp_generic_fields()
336 	switch (ctrl.len) {  in arch_bp_generic_fields()
350 		return -EINVAL;  in arch_bp_generic_fields()
364 	switch (attr->bp_type) {  in arch_build_bp_info()
366 		hw->ctrl.type = LOONGARCH_BREAKPOINT_EXECUTE;  in arch_build_bp_info()
369 		hw->ctrl.type = LOONGARCH_BREAKPOINT_LOAD;  in arch_build_bp_info()
372 		hw->ctrl.type = LOONGARCH_BREAKPOINT_STORE;  in arch_build_bp_info()
375 		hw->ctrl.type = LOONGARCH_BREAKPOINT_LOAD | LOONGARCH_BREAKPOINT_STORE;  in arch_build_bp_info()
378 		return -EINVAL;  in arch_build_bp_info()
381 	/* Len */  in arch_build_bp_info()
382 	switch (attr->bp_len) {  in arch_build_bp_info()
384 		hw->ctrl.len = LOONGARCH_BREAKPOINT_LEN_1;  in arch_build_bp_info()
387 		hw->ctrl.len = LOONGARCH_BREAKPOINT_LEN_2;  in arch_build_bp_info()
390 		hw->ctrl.len = LOONGARCH_BREAKPOINT_LEN_4;  in arch_build_bp_info()
393 		hw->ctrl.len = LOONGARCH_BREAKPOINT_LEN_8;  in arch_build_bp_info()
396 		return -EINVAL;  in arch_build_bp_info()
400 	hw->address = attr->bp_addr;  in arch_build_bp_info()
406  * Validate the arch-specific HW Breakpoint register settings.
420 	if (hw->ctrl.type == LOONGARCH_BREAKPOINT_EXECUTE) {  in hw_breakpoint_arch_parse()
422 		hw->address &= ~alignment_mask;  in hw_breakpoint_arch_parse()
430 	u32 ctrl;  in update_bp_registers()  local
454 			if ((info->ctrl.type == LOONGARCH_BREAKPOINT_EXECUTE) && (type == 0)) {  in update_bp_registers()
458 				ctrl = read_wb_reg(CSR_CFG_CTRL, i, 1);  in update_bp_registers()
459 				if (info->ctrl.type == LOONGARCH_BREAKPOINT_LOAD)  in update_bp_registers()
460 					ctrl |= 0x1 << MWPnCFG3_LoadEn;  in update_bp_registers()
461 				if (info->ctrl.type == LOONGARCH_BREAKPOINT_STORE)  in update_bp_registers()
462 					ctrl |= 0x1 << MWPnCFG3_StoreEn;  in update_bp_registers()
463 				write_wb_reg(CSR_CFG_CTRL, i, 1, ctrl);  in update_bp_registers()
465 			regs->csr_prmd |= CSR_PRMD_PWE;  in update_bp_registers()
467 			if ((info->ctrl.type == LOONGARCH_BREAKPOINT_EXECUTE) && (type == 0)) {  in update_bp_registers()
470 				ctrl = read_wb_reg(CSR_CFG_CTRL, i, 1);  in update_bp_registers()
471 				if (info->ctrl.type == LOONGARCH_BREAKPOINT_LOAD)  in update_bp_registers()
472 					ctrl &= ~0x1 << MWPnCFG3_LoadEn;  in update_bp_registers()
473 				if (info->ctrl.type == LOONGARCH_BREAKPOINT_STORE)  in update_bp_registers()
474 					ctrl &= ~0x1 << MWPnCFG3_StoreEn;  in update_bp_registers()
475 				write_wb_reg(CSR_CFG_CTRL, i, 1, ctrl);  in update_bp_registers()
477 			regs->csr_prmd &= ~CSR_PRMD_PWE;  in update_bp_registers()
553 		if (!((regs->csr_era ^ addr) & ~mask))  in hw_breakpoint_thread_switch()
555 		regs->csr_prmd |= CSR_PRMD_PWE;  in hw_breakpoint_thread_switch()