Lines Matching +full:10 +full:base +full:- +full:t1

14 #include <asm/asm-offsets.h>
26 mfc0 t1, CP0_STATUS
27 LONG_S t1, THREAD_STATUS(a0)
40 sll t0, 7-LONGLOG-1
41 li t1, -32768 /* Base address of CVMSEG */
46 LONG_L t8, 0(t1) /* Load from CVMSEG */
48 LONG_L t9, LONGSIZE(t1)/* Load from CVMSEG */
49 LONG_ADDU t1, LONGSIZE*2 /* Increment loc in CVMSEG */
53 LONG_S t9, -LONGSIZE(t2)/* Store CVMSEG to thread storage */
76 PTR_ADDU t0, $28, _THREAD_SIZE - 32
77 set_saved_sp t0, t1, t2
79 mfc0 t1, CP0_STATUS /* Do we really need this? */
81 and t1, a3
85 or a2, t1
103 dmfc2 t1, 0x0202
106 sd t1, OCTEON_CP2_CRC_LENGTH(a0)
113 dmfc2 t1, 0x040A
117 sd t1, OCTEON_CP2_LLM_DAT+8(a0)
122 dmfc2 t1, 0x0080
127 sd t1, OCTEON_CP2_3DES_KEY(a0)
128 dmfc2 t1, 0x0111 /* only necessary for pass 1 */
135 sd t1, OCTEON_CP2_AES_INP0(a0) /* only necessary for pass 1 */
136 dmfc2 t1, 0x0105
143 sd t1, OCTEON_CP2_AES_KEY+8(a0)
144 dmfc2 t1, 0x0100
151 sd t1, OCTEON_CP2_AES_RESULT(a0)
156 /* the non-pass1 state when !CvmCtl[NOCRYPTO] */
157 dmfc2 t1, 0x0240
161 subu v1, v0, v1 /* prid - lowest OCTEON III PrId */
163 sd t1, OCTEON_CP2_HSH_DATW(a0)
164 dmfc2 t1, 0x0244
171 sd t1, OCTEON_CP2_HSH_DATW+32(a0)
172 dmfc2 t1, 0x0248
179 sd t1, OCTEON_CP2_HSH_DATW+64(a0)
180 dmfc2 t1, 0x024C
187 sd t1, OCTEON_CP2_HSH_DATW+96(a0)
188 dmfc2 t1, 0x0251
195 sd t1, OCTEON_CP2_HSH_IVW+8(a0)
196 dmfc2 t1, 0x0255
203 sd t1, OCTEON_CP2_HSH_IVW+40(a0)
204 dmfc2 t1, 0x0259
211 sd t1, OCTEON_CP2_GFM_MULT+8(a0)
218 dmfc2 t1, 0x0050
220 sd t1, OCTEON_CP2_SHA3+8(a0)
228 dmfc2 t1, 0x0042
234 sd t1, OCTEON_CP2_HSH_DATW+16(a0)
235 dmfc2 t1, 0x0046
242 sd t1, OCTEON_CP2_HSH_DATW+48(a0)
267 ld t1, OCTEON_CP2_CRC_LENGTH(a0)
272 dmtc2 t1, 0x1202
278 ld t1, OCTEON_CP2_LLM_DAT+8(a0)
280 dmtc2 t1, 0x040A
288 ld t1, OCTEON_CP2_3DES_KEY(a0)
292 dmtc2 t1, 0x0080
293 ld t1, OCTEON_CP2_3DES_RESULT(a0)
298 dmtc2 t1, 0x0098
299 ld t1, OCTEON_CP2_AES_IV+8(a0)
304 dmtc2 t1, 0x0103
305 ld t1, OCTEON_CP2_AES_KEY+16(a0)
310 dmtc2 t1, 0x0106
311 ld t1, OCTEON_CP2_AES_RESULT(a0)
317 dmtc2 t1, 0x0100
318 bne v0, t3, 3f /* Skip the next stuff for non-pass1 */
323 ld t1, OCTEON_CP2_HSH_DATW+8(a0)
327 dmtc2 t1, 0x0041
328 ld t1, OCTEON_CP2_HSH_DATW+32(a0)
333 dmtc2 t1, 0x0044
334 ld t1, OCTEON_CP2_HSH_IVW(a0)
339 dmtc2 t1, 0x0048
344 3: /* this is post-pass1 code */
348 ld t1, OCTEON_CP2_HSH_DATW+16(a0)
353 dmtc2 t1, 0x0242
354 ld t1, OCTEON_CP2_HSH_DATW+40(a0)
359 dmtc2 t1, 0x0245
360 ld t1, OCTEON_CP2_HSH_DATW+64(a0)
365 dmtc2 t1, 0x0248
366 ld t1, OCTEON_CP2_HSH_DATW+88(a0)
371 dmtc2 t1, 0x024B
372 ld t1, OCTEON_CP2_HSH_DATW+112(a0)
377 dmtc2 t1, 0x024E
378 ld t1, OCTEON_CP2_HSH_IVW+16(a0)
383 dmtc2 t1, 0x0252
384 ld t1, OCTEON_CP2_HSH_IVW+40(a0)
389 dmtc2 t1, 0x0255
390 ld t1, OCTEON_CP2_GFM_MULT(a0)
395 dmtc2 t1, 0x0258
396 ld t1, OCTEON_CP2_GFM_RESULT(a0)
400 subu v0, t3, v0 /* prid - lowest OCTEON III PrId */
401 dmtc2 t1, 0x025A
406 ld t1, OCTEON_CP2_SHA3+8(a0)
408 dmtc2 t1, 0x0050
420 * safely modify v1,k0, k1,$10-$15, and $24. It will
454 v3mulu $10, $0, $0 /* read P0 */
457 sd $10, PT_MTP+(0*8)(sp) /* store P0 */
458 v3mulu $10, $0, $0 /* read P3 */
464 sd $10, PT_MTP+(3*8)(sp) /* store P3 */
465 v3mulu $13, $13, $0 /* P4-P0 = MPL5-MPL1, $13 = MPL0 */
467 v3mulu $10, $0, $0 /* read MPL1 */
472 sd $10, PT_MPL+(1*8)(sp) /* store MPL1 */
473 v3mulu $10, $0, $0 /* read MPL4 */
477 sd $10, PT_MPL+(4*8)(sp) /* store MPL4 */
521 ld $10, PT_MPL+(1*8)(sp) /* read MPL1 */
527 /* mtm1 $10, $11 restore MPL1 and MPL4 */
529 ld $10, PT_MTP+(0*8)(sp) /* read P0 */
535 /* mtp0 $10, $11 restore P0 and P3 */
537 ld $10, PT_MTP+(2*8)(sp) /* read P2 */
543 /* mtp2 $10, $11 restore P2 and P5 */