Lines Matching +full:10 +full:base +full:- +full:t1
16 #include <asm/asm-offsets.h>
21 * As we are sharing code base with the mips32 tree (which use the o32 ABI
26 #undef t1
30 #define t1 $9 macro
31 #define t2 $10
164 lw t1, 0x04(src)
167 ADDC(sum, t1)
178 ld t1, 0x08(src)
180 ADDC(sum, t1)
182 CSUM_BIGCHUNK1(src, 0x00, sum, t0, t1, t3, t4)
193 CSUM_BIGCHUNK(src, 0x00, sum, t0, t1, t3, t4)
194 CSUM_BIGCHUNK(src, 0x20, sum, t0, t1, t3, t4)
195 CSUM_BIGCHUNK(src, 0x40, sum, t0, t1, t3, t4)
196 CSUM_BIGCHUNK(src, 0x60, sum, t0, t1, t3, t4)
208 CSUM_BIGCHUNK(src, 0x00, sum, t0, t1, t3, t4)
209 CSUM_BIGCHUNK(src, 0x20, sum, t0, t1, t3, t4)
217 CSUM_BIGCHUNK(src, 0x00, sum, t0, t1, t3, t4)
244 ulw t1, (src)
247 dsll t1, t1, 32 /* clear lower 32bit */
249 ADDC(sum, t1)
251 1: move t1, zero
256 ulhu t1, (src)
260 sll t1, t1, 16
268 or t1, t2
270 1: ADDC(sum, t1)
428 #define REST(unit) (FIRST(unit)+NBYTES-1)
430 #define ADDRMASK (NBYTES-1)
440 li sum, -1
454 and t1, dst, ADDRMASK
458 bnez t1, .Ldst_unaligned\@
462 * use delay slot for fall-through
473 LOAD(t1, UNIT(1)(src))
483 ADDC(t0, t1)
484 STORE(t1, UNIT(1)(dst))
512 and rem, len, (NBYTES-1) # rem = len % NBYTES
517 LOAD(t1, UNIT(1)(src))
523 ADDC(t0, t1)
524 STORE(t1, UNIT(1)(dst))
555 * because can't assume read-access to dst. Instead, use
559 * wide-issue mips processors because the code has fewer branches and
560 * more instruction-level parallelism.
564 ADD t1, dst, len # t1 is just past last byte of dst
570 STREST(t0, -1(t1))
580 * t1 = dst & ADDRMASK; T1 > 0
590 SUB t2, t2, t1 # t2 = number of bytes copied
591 xor match, t0, t1
593 SLL t4, t1, 3 # t4 = number of bits to discard
606 and rem, len, (4*NBYTES-1) # rem = len % 4*NBYTES
615 LDFIRST(t1, FIRST(1)(src))
618 LDREST(t1, REST(1)(src))
628 ADDC(t0, t1)
629 STORE(t1, UNIT(1)(dst))
642 and rem, len, NBYTES-1 # rem = len % NBYTES
666 #define SHIFT_START 8*(NBYTES-1)
667 #define SHIFT_INC -8
688 LOADBU(t0, NBYTES-2(src))
690 STOREB(t0, NBYTES-2(dst))