52 	const char *isa;  in riscv_early_of_processor_hartid()  local
70 	if (of_property_read_string(node, "riscv,isa-base", &isa))  in riscv_early_of_processor_hartid()
73 	if (IS_ENABLED(CONFIG_32BIT) && strncasecmp(isa, "rv32i", 5)) {  in riscv_early_of_processor_hartid()
78 	if (IS_ENABLED(CONFIG_64BIT) && strncasecmp(isa, "rv64i", 5)) {  in riscv_early_of_processor_hartid()
83 	if (!of_property_present(node, "riscv,isa-extensions"))  in riscv_early_of_processor_hartid()
86 	if (of_property_match_string(node, "riscv,isa-extensions", "i") < 0 ||  in riscv_early_of_processor_hartid()
87 	    of_property_match_string(node, "riscv,isa-extensions", "m") < 0 ||  in riscv_early_of_processor_hartid()
88 	    of_property_match_string(node, "riscv,isa-extensions", "a") < 0) {  in riscv_early_of_processor_hartid()
97 		pr_warn("CPU with hartid=%lu is invalid: this kernel does not parse \"riscv,isa\"",  in riscv_early_of_processor_hartid()
102 	if (of_property_read_string(node, "riscv,isa", &isa)) {  in riscv_early_of_processor_hartid()
103 		pr_warn("CPU with hartid=%lu has no \"riscv,isa-base\" or \"riscv,isa\" property\n",  in riscv_early_of_processor_hartid()
108 	if (IS_ENABLED(CONFIG_32BIT) && strncasecmp(isa, "rv32ima", 7)) {  in riscv_early_of_processor_hartid()
113 	if (IS_ENABLED(CONFIG_64BIT) && strncasecmp(isa, "rv64ima", 7)) {  in riscv_early_of_processor_hartid()
257 			if (!__riscv_isa_extension_available(vendor_bitmap->isa, ext_data[j].id))  in print_vendor_isa()
342 	 * For historical raisins, the isa: line is limited to the lowest common  in c_show()
344 	 * extensions supported on this hart is printed later in the hart isa:  in c_show()
347 	seq_puts(m, "isa\t\t: ");  in c_show()
366 	 * Print the ISA extensions specific to this hart, which may show  in c_show()
369 	seq_puts(m, "hart isa\t: ");  in c_show()
370 	print_isa(m, hart_isa[cpu_id].isa, cpu_id);  in c_show()