Lines Matching full:isa
38 /* Host ISA bitmap */
41 /* Per-cpu ISA extensions. */
49 * @isa_bitmap: ISA bitmap to use
52 * NOTE: If isa_bitmap is NULL then Host ISA bitmap will be used.
66 * @isa_bitmap: ISA bitmap to use
70 * NOTE: If isa_bitmap is NULL then Host ISA bitmap will be used.
87 pr_err("Zicbom detected in ISA string, disabling as no cbom-block-size found\n"); in riscv_ext_zicbom_validate()
101 pr_err("Zicboz detected in ISA string, disabling as no cboz-block-size found\n"); in riscv_ext_zicboz_validate()
259 * privileged ISA, the existence of the CSRs is implied by any extension which
260 * specifies [ms]envcfg bit(s). Hence, we define a custom ISA extension for the
283 * The canonical order of ISA extension names in the ISA string is defined in
287 * isa_ext_arr defines the order of the ISA string in /proc/cpuinfo.
436 * "Resolve" a source ISA bitmap into one that matches kernel configuration as
455 pr_err("Failed to reach a stable ISA state\n"); in riscv_resolve_isa()
475 /* No need to keep it in source isa now that it is enabled */ in riscv_resolve_isa()
498 static void __init riscv_parse_isa_string(const char *isa, unsigned long *bitmap) in riscv_parse_isa_string() argument
506 isa += 4; in riscv_parse_isa_string()
508 while (*isa) { in riscv_parse_isa_string()
509 const char *ext = isa++; in riscv_parse_isa_string()
510 const char *ext_end = isa; in riscv_parse_isa_string()
517 pr_warn_once("Vendor extensions are ignored in riscv,isa. Use riscv,isa-extensions instead."); in riscv_parse_isa_string()
525 for (; *isa && *isa != '_'; ++isa) in riscv_parse_isa_string()
533 * not valid ISA extensions. It works unless the first in riscv_parse_isa_string()
534 * multi-letter extension in the ISA string begins with in riscv_parse_isa_string()
538 ++isa; in riscv_parse_isa_string()
564 for (; *isa && *isa != '_'; ++isa) in riscv_parse_isa_string()
565 if (unlikely(!isalnum(*isa))) in riscv_parse_isa_string()
568 ext_end = isa; in riscv_parse_isa_string()
594 * ensure that, when isa was incremented at the start of the loop, in riscv_parse_isa_string()
612 if (!isdigit(*isa)) in riscv_parse_isa_string()
615 while (isdigit(*++isa)) in riscv_parse_isa_string()
618 if (tolower(*isa) != 'p') in riscv_parse_isa_string()
621 if (!isdigit(*++isa)) { in riscv_parse_isa_string()
622 --isa; in riscv_parse_isa_string()
626 while (isdigit(*++isa)) in riscv_parse_isa_string()
633 * The parser expects that at the start of an iteration isa points to the in riscv_parse_isa_string()
638 if (*isa == '_') in riscv_parse_isa_string()
639 ++isa; in riscv_parse_isa_string()
651 const char *isa; in riscv_fill_hwcap_from_isa_string() local
680 rc = of_property_read_string(node, "riscv,isa", &isa); in riscv_fill_hwcap_from_isa_string()
683 pr_warn("Unable to find \"riscv,isa\" devicetree entry\n"); in riscv_fill_hwcap_from_isa_string()
687 rc = acpi_get_riscv_isa(rhct, cpu, &isa); in riscv_fill_hwcap_from_isa_string()
689 pr_warn("Unable to get ISA for the hart - %d\n", cpu); in riscv_fill_hwcap_from_isa_string()
694 riscv_parse_isa_string(isa, source_isa); in riscv_fill_hwcap_from_isa_string()
697 * These ones were as they were part of the base ISA when the in riscv_fill_hwcap_from_isa_string()
699 * unconditionally where `i` is in riscv,isa on DT systems. in riscv_fill_hwcap_from_isa_string()
709 * "V" in ISA strings is ambiguous in practice: it should mean in riscv_fill_hwcap_from_isa_string()
721 riscv_resolve_isa(source_isa, isainfo->isa, &this_hwcap, isa2hwcap); in riscv_fill_hwcap_from_isa_string()
724 * All "okay" hart should have same isa. Set HWCAP based on in riscv_fill_hwcap_from_isa_string()
734 bitmap_copy(riscv_isa, isainfo->isa, RISCV_ISA_EXT_MAX); in riscv_fill_hwcap_from_isa_string()
736 bitmap_and(riscv_isa, riscv_isa, isainfo->isa, RISCV_ISA_EXT_MAX); in riscv_fill_hwcap_from_isa_string()
755 if (of_property_match_string(cpu_node, "riscv,isa-extensions", in riscv_fill_cpu_vendor_ext()
765 set_bit(ext.subset_ext_ids[k], isavendorinfo->isa); in riscv_fill_cpu_vendor_ext()
767 set_bit(ext.id, isavendorinfo->isa); in riscv_fill_cpu_vendor_ext()
785 bitmap_copy(ext_list->all_harts_isa_bitmap.isa, in riscv_fill_vendor_ext_list()
786 ext_list->per_hart_isa_bitmap[cpu].isa, in riscv_fill_vendor_ext_list()
790 bitmap_and(ext_list->all_harts_isa_bitmap.isa, in riscv_fill_vendor_ext_list()
791 ext_list->all_harts_isa_bitmap.isa, in riscv_fill_vendor_ext_list()
792 ext_list->per_hart_isa_bitmap[cpu].isa, in riscv_fill_vendor_ext_list()
855 if (!of_property_present(cpu_node, "riscv,isa-extensions")) { in riscv_fill_hwcap_from_ext_list()
863 if (of_property_match_string(cpu_node, "riscv,isa-extensions", in riscv_fill_hwcap_from_ext_list()
870 riscv_resolve_isa(source_isa, isainfo->isa, &this_hwcap, isa2hwcap); in riscv_fill_hwcap_from_ext_list()
876 * All "okay" harts should have same isa. Set HWCAP based on in riscv_fill_hwcap_from_ext_list()
885 bitmap_copy(riscv_isa, isainfo->isa, RISCV_ISA_EXT_MAX); in riscv_fill_hwcap_from_ext_list()
887 bitmap_and(riscv_isa, riscv_isa, isainfo->isa, RISCV_ISA_EXT_MAX); in riscv_fill_hwcap_from_ext_list()
941 pr_info("Falling back to deprecated \"riscv,isa\"\n"); in riscv_fill_hwcap()
965 * ISA string in device tree might have 'v' flag, but in riscv_fill_hwcap()
977 pr_info("riscv: base ISA extensions %s\n", print_str); in riscv_fill_hwcap()
1082 WARN(1, "This extension id:%d is not in ISA extension list", id); in riscv_cpufeature_patch_func()