Lines Matching +full:xlen +full:- +full:1

1 // SPDX-License-Identifier: GPL-2.0-only
9 #include <asm/alternative-macros.h>
20  * Refer to https://www.corsix.org/content/barrett-reduction-polynomials for
24  * let "-" denotes polynomial sub (XOR)
27  * let "S" denotes source data, XLEN bit wide
29  * let "T" denotes 2^(XLEN+32)
30  * let "QT" denotes quotient of T/P, with the bit for 2^XLEN being implicit
33  * => S * (2^32) - S * (2^32) / P * P
37  * => lowest 32 bits of: S * quotient / 2^XLEN * P
46 /* Slide by XLEN bits per iteration */
49 /* Each below polynomial quotient has an implicit bit for 2^XLEN */
51 /* Polynomial quotient of (2^(XLEN+32))/CRC32_POLY, in LE format */
54 /* Polynomial quotient of (2^(XLEN+32))/CRC32C_POLY, in LE format */
57 /* Polynomial quotient of (2^(XLEN+32))/CRC32_POLY, in BE format, it should be
58  * the same as the bit-reversed version of CRC32_POLY_QT_LE
74 		      "clmul	%0, %1, %2\n"  in crc32_le_zbc()
75 		      "slli	%0, %0, 1\n"  in crc32_le_zbc()
76 		      "xor	%0, %0, %1\n"  in crc32_le_zbc()
112 		      "clmul	%0, %1, %2\n"  in crc32_le_zbc()
113 		      "slli	%0, %0, 1\n"  in crc32_le_zbc()
114 		      "xor	%0, %0, %1\n"  in crc32_le_zbc()
140 		      "clmulh	%0, %1, %2\n"  in crc32_be_zbc()
141 		      "xor	%0, %0, %1\n"  in crc32_be_zbc()
152 #define STEP		(1 << STEP_ORDER)
153 #define OFFSET_MASK	(STEP - 1)
166 		s = ((unsigned long)*p++ << (__riscv_xlen - 8)) | (s >> 8);  in crc32_le_unaligned()
168 	s ^= (unsigned long)crc << (__riscv_xlen - bits);  in crc32_le_unaligned()
188 			     RISCV_ISA_EXT_ZBC, 1)  in crc32_le_generic()
194 		head_len = min(STEP - offset, len);  in crc32_le_generic()
197 		len -= head_len;  in crc32_le_generic()
247 		s ^= crc >> (32 - bits);  in crc32_be_unaligned()
250 		s ^= (unsigned long)crc << (bits - 32);  in crc32_be_unaligned()
266 			     RISCV_ISA_EXT_ZBC, 1)  in crc32_be_arch()
272 		head_len = min(STEP - offset, len);  in crc32_be_arch()
275 		len -= head_len;  in crc32_be_arch()