Lines Matching +full:0 +full:x0000c000

14 #define PIF_SYSCALL			0	/* inside a system call */
26 #define PSW32_MASK_PER		_AC(0x40000000, UL)
27 #define PSW32_MASK_DAT		_AC(0x04000000, UL)
28 #define PSW32_MASK_IO		_AC(0x02000000, UL)
29 #define PSW32_MASK_EXT		_AC(0x01000000, UL)
30 #define PSW32_MASK_KEY		_AC(0x00F00000, UL)
31 #define PSW32_MASK_BASE		_AC(0x00080000, UL)	/* Always one */
32 #define PSW32_MASK_MCHECK	_AC(0x00040000, UL)
33 #define PSW32_MASK_WAIT		_AC(0x00020000, UL)
34 #define PSW32_MASK_PSTATE	_AC(0x00010000, UL)
35 #define PSW32_MASK_ASC		_AC(0x0000C000, UL)
36 #define PSW32_MASK_CC		_AC(0x00003000, UL)
37 #define PSW32_MASK_PM		_AC(0x00000f00, UL)
38 #define PSW32_MASK_RI		_AC(0x00000080, UL)
40 #define PSW32_ADDR_AMODE	_AC(0x80000000, UL)
41 #define PSW32_ADDR_INSN		_AC(0x7FFFFFFF, UL)
45 #define PSW32_ASC_PRIMARY	_AC(0x00000000, UL)
46 #define PSW32_ASC_ACCREG	_AC(0x00004000, UL)
47 #define PSW32_ASC_SECONDARY	_AC(0x00008000, UL)
48 #define PSW32_ASC_HOME		_AC(0x0000C000, UL)
83 	PSW_BITS_AMODE_24BIT = 0,
89 	PSW_BITS_AS_PRIMARY	= 0,
105 #define PGM_INT_CODE_MASK	0x7f
106 #define PGM_INT_CODE_PER	0x80
168 #define PER_EVENT_MASK			0xEB000000UL
170 #define PER_EVENT_BRANCH		0x80000000UL
171 #define PER_EVENT_IFETCH		0x40000000UL
172 #define PER_EVENT_STORE			0x20000000UL
173 #define PER_EVENT_STORE_REAL		0x08000000UL
174 #define PER_EVENT_TRANSACTION_END	0x02000000UL
175 #define PER_EVENT_NULLIFICATION		0x01000000UL
177 #define PER_CONTROL_MASK		0x00e00000UL
179 #define PER_CONTROL_BRANCH_ADDRESS	0x00800000UL
180 #define PER_CONTROL_SUSPENSION		0x00400000UL
181 #define PER_CONTROL_ALTERATION		0x00200000UL
216 #define user_mode(regs) (((regs)->psw.mask & PSW_MASK_PSTATE) != 0)
240  * @n:		function argument number (start from 0)