1 // SPDX-License-Identifier: GPL-2.0-only
3  * Support of MSI, HPET and DMAR interrupts.
16 #include <linux/msi.h>
31 	irq_data_get_irq_chip(irqd)->irq_write_msi_msg(irqd, msg);  in irq_msi_update_msg()
38 	struct irq_data *parent = irqd->parent_data;  in msi_set_affinity()  local
47 	ret = parent->chip->irq_set_affinity(parent, mask, force);  in msi_set_affinity()
52 	 * For non-maskable and non-remapped MSI interrupts the migration  in msi_set_affinity()
55 	 * caused by the non-atomic update of the address/data pair.  in msi_set_affinity()
58 	 * - The MSI is maskable (remapped MSI does not use this code path).  in msi_set_affinity()
60 	 * - The new vector is the same as the old vector  in msi_set_affinity()
61 	 * - The old vector is MANAGED_IRQ_SHUTDOWN_VECTOR (interrupt starts up)  in msi_set_affinity()
62 	 * - The interrupt is not yet started up  in msi_set_affinity()
63 	 * - The new destination CPU is the same as the old destination CPU  in msi_set_affinity()
66 	    cfg->vector == old_cfg.vector ||  in msi_set_affinity()
69 	    cfg->dest_apicid == old_cfg.dest_apicid) {  in msi_set_affinity()
111 	if (IS_ERR_OR_NULL(this_cpu_read(vector_irq[cfg->vector])))  in msi_set_affinity()
112 		this_cpu_write(vector_irq[cfg->vector], VECTOR_RETRIGGERED);  in msi_set_affinity()
115 	old_cfg.vector = cfg->vector;  in msi_set_affinity()
139 	if (lapic_vector_set_in_irr(cfg->vector))  in msi_set_affinity()
140 		irq_data_get_irq_chip(irqd)->irq_retrigger(irqd);  in msi_set_affinity()
146  * pci_dev_has_default_msi_parent_domain - Check whether the device has the default
147  *					   MSI parent domain associated
152 	struct irq_domain *domain = dev_get_msi_domain(&dev->dev);  in pci_dev_has_default_msi_parent_domain()
155 		domain = dev_get_msi_domain(&dev->bus->dev);  in pci_dev_has_default_msi_parent_domain()
163  * x86_msi_prepare - Setup of msi_alloc_info_t for allocations
169  * This function is to be used for all types of MSI domains above the x86
178 	struct msi_domain_info *info = domain->host_data;  in x86_msi_prepare()
182 	switch (info->bus_token) {  in x86_msi_prepare()
184 		alloc->type = X86_IRQ_ALLOC_TYPE_PCI_MSI;  in x86_msi_prepare()
187 		alloc->type = X86_IRQ_ALLOC_TYPE_PCI_MSIX;  in x86_msi_prepare()
190 		return -EINVAL;  in x86_msi_prepare()
195  * x86_init_dev_msi_info - Domain info setup for MSI domains
198  * @real_parent:	The real parent domain of the to initialize domain
201  * This function is to be used for all types of MSI domains above the x86
208 	const struct msi_parent_ops *pops = real_parent->msi_parent_ops;  in x86_init_dev_msi_info()
210 	/* MSI parent domain specific settings */  in x86_init_dev_msi_info()
211 	switch (real_parent->bus_token) {  in x86_init_dev_msi_info()
216 		info->chip->irq_set_affinity = msi_set_affinity;  in x86_init_dev_msi_info()
217 		info->chip->flags |= IRQCHIP_MOVE_DEFERRED;  in x86_init_dev_msi_info()
228 	switch(info->bus_token) {  in x86_init_dev_msi_info()
238 	 * Mask out the domain specific MSI feature flags which are not  in x86_init_dev_msi_info()
239 	 * supported by the real parent.  in x86_init_dev_msi_info()
241 	info->flags			&= pops->supported_flags;  in x86_init_dev_msi_info()
243 	info->flags			|= X86_VECTOR_MSI_FLAGS_REQUIRED;  in x86_init_dev_msi_info()
245 	/* This is always invoked from the top level MSI domain! */  in x86_init_dev_msi_info()
246 	info->ops->msi_prepare		= x86_msi_prepare;  in x86_init_dev_msi_info()
248 	info->chip->irq_ack		= irq_chip_ack_parent;  in x86_init_dev_msi_info()
249 	info->chip->irq_retrigger	= irq_chip_retrigger_hierarchy;  in x86_init_dev_msi_info()
250 	info->chip->flags		|= IRQCHIP_SKIP_SET_WAKE |  in x86_init_dev_msi_info()
253 	info->handler			= handle_edge_irq;  in x86_init_dev_msi_info()
254 	info->handler_name		= "edge";  in x86_init_dev_msi_info()
269 	x86_vector_domain->flags |= IRQ_DOMAIN_FLAG_MSI_PARENT;  in native_create_pci_msi_domain()
270 	x86_vector_domain->msi_parent_ops = &x86_vector_msi_parent_ops;  in native_create_pci_msi_domain()
285 	if (to_pci_dev(dev)->msix_enabled)  in pci_msi_prepare()
286 		arg->type = X86_IRQ_ALLOC_TYPE_PCI_MSIX;  in pci_msi_prepare()
288 		arg->type = X86_IRQ_ALLOC_TYPE_PCI_MSI;  in pci_msi_prepare()
295  * The Intel IOMMU (ab)uses the high bits of the MSI address to contain the
307 	dmar_msi_write(data->irq, msg);  in dmar_msi_write_msg()
311 	.name			= "DMAR-MSI",
327 	irq_domain_set_info(domain, virq, arg->devid, info->chip, NULL,  in dmar_msi_init()
328 			    handle_edge_irq, arg->data, "edge");  in dmar_msi_init()
353 	fn = irq_domain_alloc_named_fwnode("DMAR-MSI");  in dmar_get_irq_domain()
371 		return -1;  in dmar_alloc_hwirq()