Lines Matching full:hpet

6 #include <linux/hpet.h>
12 #include <asm/hpet.h>
17 #define pr_fmt(fmt) "hpet: " fmt
50 * HPET address is set in acpi/boot.c, when an ACPI entry exists
100 * HPET command line enable / disable
119 __setup("hpet=", hpet_setup);
134 * is_hpet_enabled - Check whether the legacy HPET timer interrupt is enabled
184 * When the HPET driver (/dev/hpet) is enabled, we need to reserve
235 /* Associate the first unused channel to /dev/hpet */ in hpet_select_device_channel()
248 /* Common HPET functions */
316 * HPET on AMD 81xx needs a second write (with HPET_TN_SETVAL in hpet_clkevt_set_state_periodic()
378 * delayed internally up to two HPET clock cycles in certain in hpet_clkevt_set_next_event()
421 * Start HPET with the boot CPU's cpumask and make it global after in hpet_legacy_clockevent_register()
425 strscpy(hc->name, "hpet", sizeof(hc->name)); in hpet_legacy_clockevent_register()
431 * Legacy horrors and sins from the past. HPET used periodic mode in hpet_legacy_clockevent_register()
438 * the next interrupt is not delivered despite the HPET channel in hpet_legacy_clockevent_register()
439 * being programmed correctly. Reprogramming the HPET after in hpet_legacy_clockevent_register()
446 * stage makes if hang because the HPET does not get in hpet_legacy_clockevent_register()
449 * Both issues require major surgery and especially the kick HPET in hpet_legacy_clockevent_register()
451 * This 'assume periodic works' magic has survived since HPET in hpet_legacy_clockevent_register()
461 /* Start HPET legacy interrupts */ in hpet_legacy_clockevent_register()
471 * HPET MSI Support
506 .name = "HPET-MSI",
571 hpet_msi_controller.name = "IR-HPET-MSI"; in hpet_create_irq_domain()
621 pr_info("Spurious interrupt HPET channel %d\n", hc->num); in hpet_msi_interrupt_handler()
720 /* Only consider HPET channel with MSI support */ in hpet_select_clockevents()
724 sprintf(hc->name, "hpet%d", i); in hpet_select_clockevents()
755 * Reading the HPET counter is a very slow operation. If a large number of
756 * CPUs are trying to access the HPET counter simultaneously, it can cause
758 * happen when HPET is the default clock source instead of TSC. For a
763 * If multiple CPUs are trying to access the HPET counter at the same time,
771 * The lock and the HPET value are stored together and can be read in a
783 static union hpet_lock hpet __cacheline_aligned = {
795 * Read HPET directly if in NMI. in read_hpet()
801 * Read the current state of the lock and HPET value atomically. in read_hpet()
803 old.lockval = READ_ONCE(hpet.lockval); in read_hpet()
809 if (arch_spin_trylock(&hpet.lock)) { in read_hpet()
814 WRITE_ONCE(hpet.value, new.value); in read_hpet()
815 arch_spin_unlock(&hpet.lock); in read_hpet()
825 * Wait until the HPET value change or the lock is free to indicate in read_hpet()
829 * HPET value while the lock holder was in the process of releasing in read_hpet()
831 * the value immediately instead of waiting for the next HPET reader in read_hpet()
836 new.lockval = READ_ONCE(hpet.lockval); in read_hpet()
852 .name = "hpet",
862 * HPET emulation to provide proper frequency setting.
864 * On such systems the SMM code is initialized with the first HPET register
868 * HPET is up and running before we proceed any further.
870 * A counting loop is safe, as the HPET access takes thousands of CPU cycles.
884 pr_warn("Config register invalid. Disabling HPET\n"); in hpet_cfg_working()
909 pr_warn("Counter not counting. HPET disabled\n"); in hpet_counting()
931 * Check whether the system supports PC10. If so force disable HPET as that
939 * That's perfectly fine. HPET is a piece of hardware designed by committee
944 * If HPET is functional it is useful for calibrating TSC, but this can be
949 * In theory HPET support should be removed altogether, but there are older
978 pr_warn("HPET force enabled via command line, but dysfunctional in PC10.\n"); in hpet_is_pc10_damaged()
982 pr_info("HPET dysfunctional in PC10. Force disabled.\n"); in hpet_is_pc10_damaged()
988 * hpet_enable - Try to setup the HPET timer. Returns 1 on success.
1024 * Read the HPET ID register to retrieve the IRQ routing in hpet_enable()
1030 /* This is the HPET channel number which is zero based */ in hpet_enable()
1042 pr_warn("Disabling HPET.\n"); in hpet_enable()
1108 * which might have detected a system on which the HPET can be enforced.
1110 * Also, the MSI machinery is not working yet when the HPET is initialized
1113 * If the HPET is enabled, then:
1115 * 1) Reserve one channel for /dev/hpet if CONFIG_HPET=y
1117 * 3) Setup /dev/hpet if CONFIG_HPET=y
1143 ret = cpuhp_setup_state(CPUHP_AP_X86_HPET_ONLINE, "x86/hpet:online", in hpet_late_init()
1147 ret = cpuhp_setup_state(CPUHP_X86_HPET_DEAD, "x86/hpet:dead", NULL, in hpet_late_init()
1176 /* If the HPET was enabled at boot time, reenable it */ in hpet_disable()
1184 * HPET in LegacyReplacement mode eats up the RTC interrupt line. When HPET
1222 * Check that the HPET counter c1 is ahead of c2
1261 * is not supported by all HPET implementations for channel 1.
1314 * Return 0 if HPET is not being used.