Lines Matching +full:mode +full:- +full:xxx
10 * Copyright (C) 2001 - 2005 Tensilica, Inc.
21 #include <asm/asm-offsets.h>
41 /* Big and little endian 16-bit values are located in
43 * abstract the notion of extracting a 16-bit value from a
104 * -------------------
109 * -----------------------------
113 * XXX 0011 ssss tttt 0010
114 * XXX 0100 ssss tttt 0010
117 * XXX 0111 ssss tttt 0010
118 * XXX 1000 ssss tttt 0010
120 * XXX 1010 0010
122 * XXX 1100 0010
123 * XXX 1101 0010
124 * XXX 1110 0010
126 * -----------------------------
128 * sub-opcode (NIBBLE_R) -+ | |
129 * t field (NIBBLE_T) -----------+ |
130 * major opcode (NIBBLE_OP0) --------------+
196 addi a7, a7, 2 # increment PC (assume 16-bit insn)
237 addi a6, a5, -OP0_S32I_N
262 l32e a5, a3, -8
263 l32e a6, a3, -4
271 addi a7, a7, 2 # increment PC (assume 16-bit insn)
288 addi a5, a5, -OP1_L16SI
367 bbsi.l a0, PS_UM_BIT, 2f # jump if user mode
382 addi a7, a7, 2 # incr. PC,assume 16-bit instruction
385 addi a5, a5, -OP0_S32I_N
388 addi a7, a7, 1 # increment PC, 32-bit instruction
390 addi a7, a7, 3 # increment PC, 32-bit instruction
397 movi a5, -1
398 __extl a3, a3 # get 16-bit value
399 __exth a6, a5 # get 16-bit mask ffffffff:ffff0000
409 movi a5, -1 # mask: ffffffff:XXXX0000
415 __src_b a8, a5, a6 # lo-mask F..F0..0 (BE) 0..0F..F (LE)
416 __src_b a6, a6, a5 # hi-mask 0..0F..F (BE) F..F0..0 (LE)
418 l32e a5, a4, -8
426 s32e a5, a4, -8
427 l32e a8, a4, -4
436 s32e a6, a4, -4
448 addi a4, a4, -1 # decrement LCOUNT and set
455 /* Update icount if we're single-stepping in userspace. */
516 * mappings. However, high-level interrupt handlers might
558 bbsi.l a0, PS_UM_BIT, 1f # jump if user mode