Lines Matching +full:rcar +full:- +full:gen3 +full:- +full:rpc +full:- +full:if

1 // SPDX-License-Identifier: GPL-2.0
3 * R-Car Gen3 Clock Pulse Generator Library
5 * Copyright (C) 2015-2018 Glider bvba
8 * Based on clk-rcar-gen3.c
14 #include <linux/clk-provider.h>
23 #include "rcar-cpg-lib.h"
48 csn->saved = readl(csn->reg); in cpg_simple_notifier_call()
52 writel(csn->saved, csn->reg); in cpg_simple_notifier_call()
61 csn->nb.notifier_call = cpg_simple_notifier_call; in cpg_simple_notifier_register()
62 raw_notifier_chain_register(notifiers, &csn->nb); in cpg_simple_notifier_register()
70 #define STPnHCK BIT(9 - SDnSRCFC_SHIFT)
98 if (!csn) in cpg_sdh_clk_register()
99 return ERR_PTR(-ENOMEM); in cpg_sdh_clk_register()
101 csn->reg = sdnckcr; in cpg_sdh_clk_register()
106 if (IS_ERR(clk)) { in cpg_sdh_clk_register()
130 * One notifier covers both RPC and RPCD2 clocks as they are both
144 struct rpc_clock *rpc; in cpg_rpc_clk_register() local
147 rpc = kzalloc(sizeof(*rpc), GFP_KERNEL); in cpg_rpc_clk_register()
148 if (!rpc) in cpg_rpc_clk_register()
149 return ERR_PTR(-ENOMEM); in cpg_rpc_clk_register()
151 rpc->div.reg = rpcckcr; in cpg_rpc_clk_register()
152 rpc->div.width = 3; in cpg_rpc_clk_register()
153 rpc->div.table = cpg_rpc_div_table; in cpg_rpc_clk_register()
154 rpc->div.lock = &cpg_lock; in cpg_rpc_clk_register()
156 rpc->gate.reg = rpcckcr; in cpg_rpc_clk_register()
157 rpc->gate.bit_idx = 8; in cpg_rpc_clk_register()
158 rpc->gate.flags = CLK_GATE_SET_TO_DISABLE; in cpg_rpc_clk_register()
159 rpc->gate.lock = &cpg_lock; in cpg_rpc_clk_register()
161 rpc->csn.reg = rpcckcr; in cpg_rpc_clk_register()
164 &rpc->div.hw, &clk_divider_ops, in cpg_rpc_clk_register()
165 &rpc->gate.hw, &clk_gate_ops, in cpg_rpc_clk_register()
167 if (IS_ERR(clk)) { in cpg_rpc_clk_register()
168 kfree(rpc); in cpg_rpc_clk_register()
172 cpg_simple_notifier_register(notifiers, &rpc->csn); in cpg_rpc_clk_register()
189 if (!rpcd2) in cpg_rpcd2_clk_register()
190 return ERR_PTR(-ENOMEM); in cpg_rpcd2_clk_register()
192 rpcd2->fixed.mult = 1; in cpg_rpcd2_clk_register()
193 rpcd2->fixed.div = 2; in cpg_rpcd2_clk_register()
195 rpcd2->gate.reg = rpcckcr; in cpg_rpcd2_clk_register()
196 rpcd2->gate.bit_idx = 9; in cpg_rpcd2_clk_register()
197 rpcd2->gate.flags = CLK_GATE_SET_TO_DISABLE; in cpg_rpcd2_clk_register()
198 rpcd2->gate.lock = &cpg_lock; in cpg_rpcd2_clk_register()
201 &rpcd2->fixed.hw, &clk_fixed_factor_ops, in cpg_rpcd2_clk_register()
202 &rpcd2->gate.hw, &clk_gate_ops, in cpg_rpcd2_clk_register()
204 if (IS_ERR(clk)) in cpg_rpcd2_clk_register()