27  * sun4i_get_pll1_factors() - calculates n, k, m, p factors for PLL1
29  * rate = (parent_rate * n * (k + 1) >> p) / (m + 1);
30  * parent_rate is always 24Mhz
37 	/* Normalize value to a 6M multiple */  in sun4i_get_pll1_factors()
41 	/* m is always zero for pll1 */  in sun4i_get_pll1_factors()
42 	req->m = 0;  in sun4i_get_pll1_factors()
75  * sun6i_a31_get_pll1_factors() - calculates n, k and m factors for PLL1
77  * rate = parent_rate * (n + 1) * (k + 1) / (m + 1);
78  * parent_rate should always be 24MHz
118 	 * 3, m is 3. This is the first time we use 6 here, yet we  in sun6i_a31_get_pll1_factors()
121 	 * generate (with n = 0, k = 0, m = 3), so every other frequency  in sun6i_a31_get_pll1_factors()
125 		req->m = 2;  in sun6i_a31_get_pll1_factors()
128 	 * odd, m will be 3  in sun6i_a31_get_pll1_factors()
131 		req->m = 3;  in sun6i_a31_get_pll1_factors()
132 	/* Otherwise, we end up with m = 1 */  in sun6i_a31_get_pll1_factors()
134 		req->m = 1;  in sun6i_a31_get_pll1_factors()
137 	req->n = freq_mhz * (req->m + 1) / ((req->k + 1) * parent_freq_mhz)  in sun6i_a31_get_pll1_factors()
142 	 * m, do it.  in sun6i_a31_get_pll1_factors()
144 	if ((req->n + 1) > 31 && (req->m + 1) > 1) {  in sun6i_a31_get_pll1_factors()
146 		req->m = (req->m + 1) / 2 - 1;  in sun6i_a31_get_pll1_factors()
151  * sun8i_a23_get_pll1_factors() - calculates n, k, m, p factors for PLL1
153  * rate = (parent_rate * (n + 1) * (k + 1) >> p) / (m + 1);
154  * parent_rate is always 24Mhz
161 	/* Normalize value to a 6M multiple */  in sun8i_a23_get_pll1_factors()
165 	/* m is always zero for pll1 */  in sun8i_a23_get_pll1_factors()
166 	req->m = 0;  in sun8i_a23_get_pll1_factors()
198  * parent_rate is always 24Mhz
205 	/* Normalize value to a parent_rate multiple (24M) */  in sun4i_get_pll5_factors()
225  * parent_rate is always 24Mhz
232 	/* Normalize value to a parent_rate multiple (24M) */  in sun6i_a31_get_pll6_factors()
244  * sun5i_a13_get_ahb_factors() - calculates m, p factors for AHB
258 	 * user manual says valid speed is 8k ~ 276M, but tests show it  in sun5i_a13_get_ahb_factors()
259 	 * can work at speeds up to 300M, just after reparenting to pll6  in sun5i_a13_get_ahb_factors()
280  * sun6i_a31_get_ahb_factors() - calculates m, p factors for AHB
285  * parent_rate = pll6 rate / (m + 1)
320 	req->m = calcm - 1;  in sun6i_get_ahb1_factors()
324  * sun6i_ahb1_recalc() - calculates AHB clock rate from m, p factors and
333 		req->rate /= req->m + 1;  in sun6i_ahb1_recalc()
340  * sun4i_get_apb1_factors() - calculates m, p factors for APB1
342  * rate = (parent_rate >> p) / (m + 1);
371 	req->m = calcm;  in sun4i_get_apb1_factors()
379  * sun7i_a20_get_out_factors() - calculates m, p factors for CLK_OUT_A/B
381  * rate = (parent_rate >> p) / (m + 1);
407 	req->m = calcm - 1;  in sun7i_a20_get_out_factors()
542 	.mux = 24,
550 	.mux = 24,
886 	{ .val = 3, .div = 24, },
895 		{ .shift = 0, .pow = 0, .critical = true }, /* M, DDR */
905 		{ .shift = 0, .table = pll6_sata_tbl, .gate = 14 }, /* M, SATA */
1123  * rate = parent_rate / (m + 1);
1127 	u8 m;  in sun6i_display_factors()  local
1132 	m = DIV_ROUND_UP(req->parent_rate, req->rate);  in sun6i_display_factors()
1134 	req->rate = req->parent_rate / m;  in sun6i_display_factors()
1135 	req->m = m - 1;  in sun6i_display_factors()
1145 	.mux = 24,