211 static inline unsigned int tegra_base_for_cpu(int cpu, bool tegra20)  in tegra_base_for_cpu()  argument
213 	if (tegra20) {  in tegra_base_for_cpu()
229 static inline unsigned int tegra_irq_idx_for_cpu(int cpu, bool tegra20)  in tegra_irq_idx_for_cpu()  argument
231 	if (tegra20)  in tegra_irq_idx_for_cpu()
238 						 bool tegra20)  in tegra_rate_for_timer()  argument
244 	if (tegra20)  in tegra_rate_for_timer()
250 static int __init tegra_init_timer(struct device_node *np, bool tegra20,  in tegra_init_timer()  argument
303 		unsigned long rate = tegra_rate_for_timer(to, tegra20);  in tegra_init_timer()
304 		unsigned int base = tegra_base_for_cpu(cpu, tegra20);  in tegra_init_timer()
305 		unsigned int idx = tegra_irq_idx_for_cpu(cpu, tegra20);  in tegra_init_timer()
388 	 * Tegra20 and Tegra30 have Cortex A9 CPU that has a TWD timer,  in tegra20_init_timer()
395 	if (of_machine_is_compatible("nvidia,tegra20") ||  in tegra20_init_timer()
403 TIMER_OF_DECLARE(tegra20_timer, "nvidia,tegra20-timer", tegra20_init_timer);
415 TIMER_OF_DECLARE(tegra20_rtc, "nvidia,tegra20-rtc", tegra20_init_rtc);