Lines Matching +full:inline +full:- +full:crypto +full:- +full:engine

1 /* SPDX-License-Identifier: GPL-2.0-only
2  * SPDX-FileCopyrightText: Copyright (c) 2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
4  * Header file for NVIDIA Security Engine driver.
13 #include <crypto/aead.h>
14 #include <crypto/engine.h>
15 #include <crypto/hash.h>
16 #include <crypto/sha1.h>
17 #include <crypto/sha3.h>
18 #include <crypto/skcipher.h>
155 /* AES Crypto Configuration */
353 /* Security Engine operation modes */
362 	SE_ALG_CMAC,	/* Cipher-based MAC (CMAC) mode */
368 	SE_ALG_SHA1,		/* Secure Hash Algorithm-1 (SHA1) mode */
369 	SE_ALG_SHA224,		/* Secure Hash Algorithm-224  (SHA224) mode */
370 	SE_ALG_SHA256,		/* Secure Hash Algorithm-256  (SHA256) mode */
371 	SE_ALG_SHA384,		/* Secure Hash Algorithm-384  (SHA384) mode */
372 	SE_ALG_SHA512,		/* Secure Hash Algorithm-512  (SHA512) mode */
373 	SE_ALG_SHA3_224,	/* Secure Hash Algorithm3-224 (SHA3-224) mode */
374 	SE_ALG_SHA3_256,	/* Secure Hash Algorithm3-256 (SHA3-256) mode */
375 	SE_ALG_SHA3_384,	/* Secure Hash Algorithm3-384 (SHA3-384) mode */
376 	SE_ALG_SHA3_512,	/* Secure Hash Algorithm3-512 (SHA3-512) mode */
379 	SE_ALG_HMAC_SHA224,	/* Hash based MAC (HMAC) - 224 */
380 	SE_ALG_HMAC_SHA256,	/* Hash based MAC (HMAC) - 256 */
381 	SE_ALG_HMAC_SHA384,	/* Hash based MAC (HMAC) - 384 */
382 	SE_ALG_HMAC_SHA512,	/* Hash based MAC (HMAC) - 512 */
427 	struct crypto_engine *engine;  member
454 static inline int se_algname_to_algid(const char *name)  in se_algname_to_algid()
481 	else if (!strcmp(name, "sha3-224"))  in se_algname_to_algid()
483 	else if (!strcmp(name, "sha3-256"))  in se_algname_to_algid()
485 	else if (!strcmp(name, "sha3-384"))  in se_algname_to_algid()
487 	else if (!strcmp(name, "sha3-512"))  in se_algname_to_algid()
498 		return -EINVAL;  in se_algname_to_algid()
516 static inline int tegra_key_submit_reserved_aes(struct tegra_se *se, const u8 *key,  in tegra_key_submit_reserved_aes()
523 static inline int tegra_key_submit_reserved_xts(struct tegra_se *se, const u8 *key,  in tegra_key_submit_reserved_xts()
530 static inline bool tegra_key_is_reserved(u32 keyid)  in tegra_key_is_reserved()
537 static inline u32 host1x_opcode_setpayload(unsigned int payload)  in host1x_opcode_setpayload()
542 static inline u32 host1x_opcode_incr_w(unsigned int offset)  in host1x_opcode_incr_w()
544 	/* 22-bit offset supported */  in host1x_opcode_incr_w()
548 static inline u32 host1x_opcode_nonincr_w(unsigned int offset)  in host1x_opcode_nonincr_w()
550 	/* 22-bit offset supported */  in host1x_opcode_nonincr_w()
554 static inline u32 host1x_opcode_incr(unsigned int offset, unsigned int count)  in host1x_opcode_incr()
559 static inline u32 host1x_opcode_nonincr(unsigned int offset, unsigned int count)  in host1x_opcode_nonincr()
564 static inline u32 host1x_uclass_incr_syncpt_cond_f(u32 v)  in host1x_uclass_incr_syncpt_cond_f()
569 static inline u32 host1x_uclass_incr_syncpt_indx_f(u32 v)  in host1x_uclass_incr_syncpt_indx_f()
574 static inline u32 host1x_uclass_wait_syncpt_r(void)  in host1x_uclass_wait_syncpt_r()
579 static inline u32 host1x_uclass_incr_syncpt_r(void)  in host1x_uclass_incr_syncpt_r()