Lines Matching full:rank
69 #define X38_C0DRB 0x200 /* Channel 0 DRAM Rank Boundary (16b x 4)
72 * 9:0 Channel 0 DRAM Rank Boundary Address
74 #define X38_C1DRB 0x600 /* Channel 1 DRAM Rank Boundary (16b x 4) */
83 * 28:27 Error Rank Address (ERRRANK)
301 bool stacked, int channel, int rank) in drb_to_nr_pages() argument
305 n = drbs[channel][rank]; in drb_to_nr_pages()
306 if (rank > 0) in drb_to_nr_pages()
307 n -= drbs[channel][rank - 1]; in drb_to_nr_pages()
308 if (stacked && (channel == 1) && drbs[channel][rank] == in drb_to_nr_pages()
366 * The dram rank boundary (DRB) reg values are boundary addresses in x38_probe1()
367 * for each DRAM rank with a granularity of 64MB. DRB regs are in x38_probe1()