1 // SPDX-License-Identifier: GPL-2.0-only
3  * Common parts of the Xilinx Spartan6 and 7 Series FPGA manager drivers.
10 #include "xilinx-core.h"
13 #include <linux/fpga/fpga-mgr.h>
19 	struct xilinx_fpga_core *core = mgr->priv;  in get_done_gpio()
22 	ret = gpiod_get_value(core->done);  in get_done_gpio()
24 		dev_err(&mgr->dev, "Error reading DONE (%d)\n", ret);  in get_done_gpio()
38  * wait_for_init_b - wait for the INIT_B pin to have a given state, or wait
41  * @mgr:        The FPGA manager object
45  * Returns 0 when the INIT_B GPIO reached the given state or -ETIMEDOUT if
52 	struct xilinx_fpga_core *core = mgr->priv;  in wait_for_init_b()
55 	if (core->init_b) {  in wait_for_init_b()
57 			int ret = gpiod_get_value(core->init_b);  in wait_for_init_b()
63 				dev_err(&mgr->dev,  in wait_for_init_b()
71 		dev_err(&mgr->dev, "Timeout waiting for INIT_B to %s\n",  in wait_for_init_b()
73 		return -ETIMEDOUT;  in wait_for_init_b()
85 	struct xilinx_fpga_core *core = mgr->priv;  in xilinx_core_write_init()
88 	if (info->flags & FPGA_MGR_PARTIAL_RECONFIG) {  in xilinx_core_write_init()
89 		dev_err(&mgr->dev, "Partial reconfiguration not supported\n");  in xilinx_core_write_init()
90 		return -EINVAL;  in xilinx_core_write_init()
93 	gpiod_set_value(core->prog_b, 1);  in xilinx_core_write_init()
97 		gpiod_set_value(core->prog_b, 0);  in xilinx_core_write_init()
101 	gpiod_set_value(core->prog_b, 0);  in xilinx_core_write_init()
108 		dev_err(&mgr->dev, "Unexpected DONE pin state...\n");  in xilinx_core_write_init()
109 		return -EIO;  in xilinx_core_write_init()
120 	struct xilinx_fpga_core *core = mgr->priv;  in xilinx_core_write()
122 	return core->write(core, buf, count);  in xilinx_core_write()
128 	struct xilinx_fpga_core *core = mgr->priv;  in xilinx_core_write_complete()
130 		jiffies + usecs_to_jiffies(info->config_complete_timeout_us);  in xilinx_core_write_complete()
148 		ret = core->write(core, padding, sizeof(padding));  in xilinx_core_write_complete()
156 	if (core->init_b) {  in xilinx_core_write_complete()
157 		ret = gpiod_get_value(core->init_b);  in xilinx_core_write_complete()
160 			dev_err(&mgr->dev, "Error reading INIT_B (%d)\n", ret);  in xilinx_core_write_complete()
164 		dev_err(&mgr->dev,  in xilinx_core_write_complete()
168 		dev_err(&mgr->dev, "Timeout after config data transfer\n");  in xilinx_core_write_complete()
171 	return -ETIMEDOUT;  in xilinx_core_write_complete()
181 	if (IS_ERR(desc) && PTR_ERR(desc) == -ENOENT &&  in xilinx_core_devm_gpiod_get()
182 	    of_device_is_compatible(dev->of_node, "xlnx,fpga-slave-serial"))  in xilinx_core_devm_gpiod_get()
199 	if (!core || !core->dev || !core->write)  in xilinx_core_probe()
200 		return -EINVAL;  in xilinx_core_probe()
203 	core->prog_b = xilinx_core_devm_gpiod_get(core->dev, "prog", "prog_b",  in xilinx_core_probe()
205 	if (IS_ERR(core->prog_b))  in xilinx_core_probe()
206 		return dev_err_probe(core->dev, PTR_ERR(core->prog_b),  in xilinx_core_probe()
209 	core->init_b = xilinx_core_devm_gpiod_get(core->dev, "init", "init-b",  in xilinx_core_probe()
211 	if (IS_ERR(core->init_b))  in xilinx_core_probe()
212 		return dev_err_probe(core->dev, PTR_ERR(core->init_b),  in xilinx_core_probe()
215 	core->done = devm_gpiod_get(core->dev, "done", GPIOD_IN);  in xilinx_core_probe()
216 	if (IS_ERR(core->done))  in xilinx_core_probe()
217 		return dev_err_probe(core->dev, PTR_ERR(core->done),  in xilinx_core_probe()
220 	mgr = devm_fpga_mgr_register(core->dev,  in xilinx_core_probe()
221 				     "Xilinx Slave Serial FPGA Manager",  in xilinx_core_probe()
229 MODULE_DESCRIPTION("Xilinx 7 Series FPGA manager core");