Lines Matching +full:fpga +full:- +full:bridge
1 // SPDX-License-Identifier: GPL-2.0-only
6 * FPGA Bridge Driver for the Xilinx LogiCORE Partial Reconfiguration
17 #include <linux/fpga/fpga-bridge.h>
36 writel(val, d->io_base + offset); in xlnx_pr_decoupler_write()
42 return readl(d->io_base + offset); in xlnx_pr_decouple_read()
45 static int xlnx_pr_decoupler_enable_set(struct fpga_bridge *bridge, bool enable) in xlnx_pr_decoupler_enable_set() argument
48 struct xlnx_pr_decoupler_data *priv = bridge->priv; in xlnx_pr_decoupler_enable_set()
50 err = clk_enable(priv->clk); in xlnx_pr_decoupler_enable_set()
59 clk_disable(priv->clk); in xlnx_pr_decoupler_enable_set()
64 static int xlnx_pr_decoupler_enable_show(struct fpga_bridge *bridge) in xlnx_pr_decoupler_enable_show() argument
66 const struct xlnx_pr_decoupler_data *priv = bridge->priv; in xlnx_pr_decoupler_enable_show()
70 err = clk_enable(priv->clk); in xlnx_pr_decoupler_enable_show()
76 clk_disable(priv->clk); in xlnx_pr_decoupler_enable_show()
95 { .compatible = "xlnx,pr-decoupler-1.00", .data = &decoupler_config },
96 { .compatible = "xlnx,pr-decoupler", .data = &decoupler_config },
97 { .compatible = "xlnx,dfx-axi-shutdown-manager-1.00",
99 { .compatible = "xlnx,dfx-axi-shutdown-manager",
111 priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL); in xlnx_pr_decoupler_probe()
113 return -ENOMEM; in xlnx_pr_decoupler_probe()
115 priv->ipconfig = device_get_match_data(&pdev->dev); in xlnx_pr_decoupler_probe()
117 priv->io_base = devm_platform_ioremap_resource(pdev, 0); in xlnx_pr_decoupler_probe()
118 if (IS_ERR(priv->io_base)) in xlnx_pr_decoupler_probe()
119 return PTR_ERR(priv->io_base); in xlnx_pr_decoupler_probe()
121 priv->clk = devm_clk_get(&pdev->dev, "aclk"); in xlnx_pr_decoupler_probe()
122 if (IS_ERR(priv->clk)) in xlnx_pr_decoupler_probe()
123 return dev_err_probe(&pdev->dev, PTR_ERR(priv->clk), in xlnx_pr_decoupler_probe()
126 err = clk_prepare_enable(priv->clk); in xlnx_pr_decoupler_probe()
128 dev_err(&pdev->dev, "unable to enable clock\n"); in xlnx_pr_decoupler_probe()
132 clk_disable(priv->clk); in xlnx_pr_decoupler_probe()
134 br = fpga_bridge_register(&pdev->dev, priv->ipconfig->name, in xlnx_pr_decoupler_probe()
138 dev_err(&pdev->dev, "unable to register %s", in xlnx_pr_decoupler_probe()
139 priv->ipconfig->name); in xlnx_pr_decoupler_probe()
148 clk_unprepare(priv->clk); in xlnx_pr_decoupler_probe()
155 struct fpga_bridge *bridge = platform_get_drvdata(pdev); in xlnx_pr_decoupler_remove() local
156 struct xlnx_pr_decoupler_data *p = bridge->priv; in xlnx_pr_decoupler_remove()
158 fpga_bridge_unregister(bridge); in xlnx_pr_decoupler_remove()
160 clk_unprepare(p->clk); in xlnx_pr_decoupler_remove()