Lines Matching +full:firmware +full:- +full:initialized
26 #include <linux/firmware.h>
58 struct amdgpu_device *adev = psp->adev; in psp_ring_init()
60 ring = &psp->km_ring; in psp_ring_init()
62 ring->ring_type = ring_type; in psp_ring_init()
65 ring->ring_size = 0x1000; in psp_ring_init()
66 ret = amdgpu_bo_create_kernel(adev, ring->ring_size, PAGE_SIZE, in psp_ring_init()
69 &adev->firmware.rbuf, in psp_ring_init()
70 &ring->ring_mem_mc_addr, in psp_ring_init()
71 (void **)&ring->ring_mem); in psp_ring_init()
73 ring->ring_size = 0; in psp_ring_init()
81 * Due to DF Cstate management centralized to PMFW, the firmware
83 * - Load KDB
84 * - Load SYS_DRV
85 * - Load tOS
86 * - Load PMFW
87 * - Setup TMR
88 * - Load other non-psp fw
89 * - Load ASD
90 * - Load XGMI/RAS/HDCP/DTM TA if any
93 * - Arcturus and onwards
97 struct amdgpu_device *adev = psp->adev; in psp_check_pmfw_centralized_cstate_management()
100 psp->pmfw_centralized_cstate_management = false; in psp_check_pmfw_centralized_cstate_management()
116 psp->pmfw_centralized_cstate_management = true; in psp_check_pmfw_centralized_cstate_management()
119 psp->pmfw_centralized_cstate_management = false; in psp_check_pmfw_centralized_cstate_management()
126 struct amdgpu_device *adev = psp->adev; in psp_init_sriov_microcode()
136 adev->virt.autoload_ucode_id = AMDGPU_UCODE_ID_CP_MEC2; in psp_init_sriov_microcode()
140 adev->virt.autoload_ucode_id = AMDGPU_UCODE_ID_CP_MEC2; in psp_init_sriov_microcode()
145 adev->virt.autoload_ucode_id = 0; in psp_init_sriov_microcode()
153 adev->virt.autoload_ucode_id = AMDGPU_UCODE_ID_CP_MES1_DATA; in psp_init_sriov_microcode()
157 return -EINVAL; in psp_init_sriov_microcode()
164 struct amdgpu_device *adev = ip_block->adev; in psp_early_init()
165 struct psp_context *psp = &adev->psp; in psp_early_init()
167 psp->autoload_supported = true; in psp_early_init()
168 psp->boot_time_tmr = true; in psp_early_init()
173 psp->autoload_supported = false; in psp_early_init()
174 psp->boot_time_tmr = false; in psp_early_init()
179 psp->autoload_supported = false; in psp_early_init()
180 psp->boot_time_tmr = false; in psp_early_init()
185 psp->autoload_supported = false; in psp_early_init()
186 psp->boot_time_tmr = false; in psp_early_init()
190 adev->psp.sup_pd_fw_up = !amdgpu_sriov_vf(adev); in psp_early_init()
199 psp->boot_time_tmr = false; in psp_early_init()
204 psp->autoload_supported = false; in psp_early_init()
205 psp->boot_time_tmr = false; in psp_early_init()
208 psp->boot_time_tmr = false; in psp_early_init()
214 psp->autoload_supported = false; in psp_early_init()
225 psp->boot_time_tmr = false; in psp_early_init()
228 if (adev->apu_flags & AMD_APU_IS_CYAN_SKILLFISH2) { in psp_early_init()
231 psp->autoload_supported = false; in psp_early_init()
232 psp->boot_time_tmr = false; in psp_early_init()
238 adev->psp.sup_ifwi_up = !amdgpu_sriov_vf(adev); in psp_early_init()
239 psp->boot_time_tmr = false; in psp_early_init()
243 psp->boot_time_tmr = false; in psp_early_init()
250 return -EINVAL; in psp_early_init()
253 psp->adev = adev; in psp_early_init()
255 adev->psp_timeout = 20000; in psp_early_init()
267 amdgpu_bo_free_kernel(&mem_ctx->shared_bo, &mem_ctx->shared_mc_addr, in psp_ta_free_shared_buf()
268 &mem_ctx->shared_buf); in psp_ta_free_shared_buf()
269 mem_ctx->shared_bo = NULL; in psp_ta_free_shared_buf()
278 pptr = amdgpu_sriov_vf(psp->adev) ? &tmr_buf : NULL; in psp_free_shared_bufs()
279 amdgpu_bo_free_kernel(&psp->tmr_bo, &psp->tmr_mc_addr, pptr); in psp_free_shared_bufs()
280 psp->tmr_bo = NULL; in psp_free_shared_bufs()
283 psp_ta_free_shared_buf(&psp->xgmi_context.context.mem_context); in psp_free_shared_bufs()
286 psp_ta_free_shared_buf(&psp->ras_context.context.mem_context); in psp_free_shared_bufs()
289 psp_ta_free_shared_buf(&psp->hdcp_context.context.mem_context); in psp_free_shared_bufs()
292 psp_ta_free_shared_buf(&psp->dtm_context.context.mem_context); in psp_free_shared_bufs()
295 psp_ta_free_shared_buf(&psp->rap_context.context.mem_context); in psp_free_shared_bufs()
298 psp_ta_free_shared_buf(&psp->securedisplay_context.context.mem_context); in psp_free_shared_bufs()
305 struct psp_memory_training_context *ctx = &psp->mem_train_ctx; in psp_memory_training_fini()
307 ctx->init = PSP_MEM_TRAIN_NOT_SUPPORT; in psp_memory_training_fini()
308 kfree(ctx->sys_cache); in psp_memory_training_fini()
309 ctx->sys_cache = NULL; in psp_memory_training_fini()
315 struct psp_memory_training_context *ctx = &psp->mem_train_ctx; in psp_memory_training_init()
317 if (ctx->init != PSP_MEM_TRAIN_RESERVE_SUCCESS) { in psp_memory_training_init()
318 dev_dbg(psp->adev->dev, "memory training is not supported!\n"); in psp_memory_training_init()
322 ctx->sys_cache = kzalloc(ctx->train_data_size, GFP_KERNEL); in psp_memory_training_init()
323 if (ctx->sys_cache == NULL) { in psp_memory_training_init()
324 dev_err(psp->adev->dev, "alloc mem_train_ctx.sys_cache failed!\n"); in psp_memory_training_init()
325 ret = -ENOMEM; in psp_memory_training_init()
329 dev_dbg(psp->adev->dev, in psp_memory_training_init()
331 ctx->train_data_size, in psp_memory_training_init()
332 ctx->p2c_train_data_offset, in psp_memory_training_init()
333 ctx->c2p_train_data_offset); in psp_memory_training_init()
334 ctx->init = PSP_MEM_TRAIN_INIT_SUCCESS; in psp_memory_training_init()
367 db_header_pos = adev->gmc.mc_vram_size - PSP_RUNTIME_DB_OFFSET; in psp_get_runtime_db_entry()
376 dev_dbg(adev->dev, "PSP runtime database doesn't exist\n"); in psp_get_runtime_db_entry()
386 dev_warn(adev->dev, "Invalid PSP runtime database entry count\n"); in psp_get_runtime_db_entry()
397 dev_warn(adev->dev, "Invalid PSP runtime database boot cfg entry size\n"); in psp_get_runtime_db_entry()
408 dev_warn(adev->dev, "Invalid PSP runtime database scpm entry size\n"); in psp_get_runtime_db_entry()
428 struct amdgpu_device *adev = ip_block->adev; in psp_sw_init()
429 struct psp_context *psp = &adev->psp; in psp_sw_init()
432 struct psp_memory_training_context *mem_training_ctx = &psp->mem_train_ctx; in psp_sw_init()
435 psp->cmd = kzalloc(sizeof(struct psp_gfx_cmd_resp), GFP_KERNEL); in psp_sw_init()
436 if (!psp->cmd) { in psp_sw_init()
437 dev_err(adev->dev, "Failed to allocate memory to command buffer!\n"); in psp_sw_init()
438 ret = -ENOMEM; in psp_sw_init()
441 adev->psp.xgmi_context.supports_extended_data = in psp_sw_init()
442 !adev->gmc.xgmi.connected_to_cpu && in psp_sw_init()
450 adev->scpm_enabled = true; in psp_sw_init()
451 adev->scpm_status = scpm_entry.scpm_status; in psp_sw_init()
453 adev->scpm_enabled = false; in psp_sw_init()
454 adev->scpm_status = SCPM_DISABLE; in psp_sw_init()
463 psp->boot_cfg_bitmask = boot_cfg_entry.boot_cfg_bitmask; in psp_sw_init()
464 if ((psp->boot_cfg_bitmask) & in psp_sw_init()
471 mem_training_ctx->enable_mem_training = true; in psp_sw_init()
478 mem_training_ctx->enable_mem_training = true; in psp_sw_init()
481 if (mem_training_ctx->enable_mem_training) { in psp_sw_init()
484 dev_err(adev->dev, "Failed to initialize memory training!\n"); in psp_sw_init()
490 dev_err(adev->dev, "Failed to process memory training!\n"); in psp_sw_init()
496 (amdgpu_sriov_vf(adev) || adev->debug_use_vram_fw_buf) ? in psp_sw_init()
498 &psp->fw_pri_bo, in psp_sw_init()
499 &psp->fw_pri_mc_addr, in psp_sw_init()
500 &psp->fw_pri_buf); in psp_sw_init()
507 &psp->fence_buf_bo, in psp_sw_init()
508 &psp->fence_buf_mc_addr, in psp_sw_init()
509 &psp->fence_buf); in psp_sw_init()
516 &psp->cmd_buf_bo, &psp->cmd_buf_mc_addr, in psp_sw_init()
517 (void **)&psp->cmd_buf_mem); in psp_sw_init()
524 amdgpu_bo_free_kernel(&psp->fence_buf_bo, in psp_sw_init()
525 &psp->fence_buf_mc_addr, &psp->fence_buf); in psp_sw_init()
527 amdgpu_bo_free_kernel(&psp->fw_pri_bo, in psp_sw_init()
528 &psp->fw_pri_mc_addr, &psp->fw_pri_buf); in psp_sw_init()
534 struct amdgpu_device *adev = ip_block->adev; in psp_sw_fini()
535 struct psp_context *psp = &adev->psp; in psp_sw_fini()
536 struct psp_gfx_cmd_resp *cmd = psp->cmd; in psp_sw_fini()
540 amdgpu_ucode_release(&psp->sos_fw); in psp_sw_fini()
541 amdgpu_ucode_release(&psp->asd_fw); in psp_sw_fini()
542 amdgpu_ucode_release(&psp->ta_fw); in psp_sw_fini()
543 amdgpu_ucode_release(&psp->cap_fw); in psp_sw_fini()
544 amdgpu_ucode_release(&psp->toc_fw); in psp_sw_fini()
551 if (psp->km_ring.ring_mem) in psp_sw_fini()
552 amdgpu_bo_free_kernel(&adev->firmware.rbuf, in psp_sw_fini()
553 &psp->km_ring.ring_mem_mc_addr, in psp_sw_fini()
554 (void **)&psp->km_ring.ring_mem); in psp_sw_fini()
556 amdgpu_bo_free_kernel(&psp->fw_pri_bo, in psp_sw_fini()
557 &psp->fw_pri_mc_addr, &psp->fw_pri_buf); in psp_sw_fini()
558 amdgpu_bo_free_kernel(&psp->fence_buf_bo, in psp_sw_fini()
559 &psp->fence_buf_mc_addr, &psp->fence_buf); in psp_sw_fini()
560 amdgpu_bo_free_kernel(&psp->cmd_buf_bo, &psp->cmd_buf_mc_addr, in psp_sw_fini()
561 (void **)&psp->cmd_buf_mem); in psp_sw_fini()
571 struct amdgpu_device *adev = psp->adev; in psp_wait_for()
573 if (psp->adev->no_hw_access) in psp_wait_for()
576 for (i = 0; i < adev->usec_timeout; i++) { in psp_wait_for()
588 return -ETIME; in psp_wait_for()
596 struct amdgpu_device *adev = psp->adev; in psp_wait_for_spirom_update()
598 if (psp->adev->no_hw_access) in psp_wait_for_spirom_update()
608 return -ETIME; in psp_wait_for_spirom_update()
653 struct psp_gfx_cmd_resp *cmd = psp->cmd_buf_mem; in psp_err_warn()
656 if (amdgpu_ip_version(psp->adev, MP0_HWIP, 0) == IP_VERSION(13, 0, 2) && in psp_err_warn()
657 cmd->cmd_id == GFX_CMD_ID_LOAD_IP_FW && in psp_err_warn()
658 cmd->cmd.cmd_load_ip_fw.fw_type == GFX_FW_TYPE_REG_LIST && in psp_err_warn()
659 cmd->resp.status == TEE_ERROR_CANCEL) in psp_err_warn()
672 int timeout = psp->adev->psp_timeout; in psp_cmd_submit_buf()
676 if (psp->adev->no_hw_access) in psp_cmd_submit_buf()
679 memset(psp->cmd_buf_mem, 0, PSP_CMD_BUFFER_SIZE); in psp_cmd_submit_buf()
681 memcpy(psp->cmd_buf_mem, cmd, sizeof(struct psp_gfx_cmd_resp)); in psp_cmd_submit_buf()
683 index = atomic_inc_return(&psp->fence_value); in psp_cmd_submit_buf()
684 ret = psp_ring_cmd_submit(psp, psp->cmd_buf_mc_addr, fence_mc_addr, index); in psp_cmd_submit_buf()
686 atomic_dec(&psp->fence_value); in psp_cmd_submit_buf()
690 amdgpu_device_invalidate_hdp(psp->adev, NULL); in psp_cmd_submit_buf()
691 while (*((unsigned int *)psp->fence_buf) != index) { in psp_cmd_submit_buf()
692 if (--timeout == 0) in psp_cmd_submit_buf()
703 amdgpu_device_invalidate_hdp(psp->adev, NULL); in psp_cmd_submit_buf()
707 skip_unsupport = (psp->cmd_buf_mem->resp.status == TEE_ERROR_NOT_SUPPORTED || in psp_cmd_submit_buf()
708 psp->cmd_buf_mem->resp.status == PSP_ERR_UNKNOWN_COMMAND) && amdgpu_sriov_vf(psp->adev); in psp_cmd_submit_buf()
710 memcpy(&cmd->resp, &psp->cmd_buf_mem->resp, sizeof(struct psp_gfx_resp)); in psp_cmd_submit_buf()
717 * return -EINVAL. in psp_cmd_submit_buf()
719 if (!skip_unsupport && (psp->cmd_buf_mem->resp.status || !timeout) && !ras_intr) { in psp_cmd_submit_buf()
721 dev_warn(psp->adev->dev, in psp_cmd_submit_buf()
723 amdgpu_ucode_name(ucode->ucode_id), ucode->ucode_id); in psp_cmd_submit_buf()
726 psp->adev->dev, in psp_cmd_submit_buf()
728 psp_gfx_cmd_name(psp->cmd_buf_mem->cmd_id), in psp_cmd_submit_buf()
729 psp->cmd_buf_mem->cmd_id, in psp_cmd_submit_buf()
730 psp->cmd_buf_mem->resp.status); in psp_cmd_submit_buf()
731 /* If any firmware (including CAP) load fails under SRIOV, it should in psp_cmd_submit_buf()
735 if ((ucode && amdgpu_sriov_vf(psp->adev)) || !timeout) { in psp_cmd_submit_buf()
736 ret = -EINVAL; in psp_cmd_submit_buf()
742 ucode->tmr_mc_addr_lo = psp->cmd_buf_mem->resp.fw_addr_lo; in psp_cmd_submit_buf()
743 ucode->tmr_mc_addr_hi = psp->cmd_buf_mem->resp.fw_addr_hi; in psp_cmd_submit_buf()
752 struct psp_gfx_cmd_resp *cmd = psp->cmd; in acquire_psp_cmd_buf()
754 mutex_lock(&psp->mutex); in acquire_psp_cmd_buf()
763 mutex_unlock(&psp->mutex); in release_psp_cmd_buf()
770 struct amdgpu_device *adev = psp->adev; in psp_prep_tmr_cmd_buf()
779 if (amdgpu_sriov_vf(psp->adev)) in psp_prep_tmr_cmd_buf()
780 cmd->cmd_id = GFX_CMD_ID_SETUP_VMR; in psp_prep_tmr_cmd_buf()
782 cmd->cmd_id = GFX_CMD_ID_SETUP_TMR; in psp_prep_tmr_cmd_buf()
783 cmd->cmd.cmd_setup_tmr.buf_phy_addr_lo = lower_32_bits(tmr_mc); in psp_prep_tmr_cmd_buf()
784 cmd->cmd.cmd_setup_tmr.buf_phy_addr_hi = upper_32_bits(tmr_mc); in psp_prep_tmr_cmd_buf()
785 cmd->cmd.cmd_setup_tmr.buf_size = size; in psp_prep_tmr_cmd_buf()
786 cmd->cmd.cmd_setup_tmr.bitfield.virt_phy_addr = 1; in psp_prep_tmr_cmd_buf()
787 cmd->cmd.cmd_setup_tmr.system_phy_addr_lo = lower_32_bits(tmr_pa); in psp_prep_tmr_cmd_buf()
788 cmd->cmd.cmd_setup_tmr.system_phy_addr_hi = upper_32_bits(tmr_pa); in psp_prep_tmr_cmd_buf()
794 cmd->cmd_id = GFX_CMD_ID_LOAD_TOC; in psp_prep_load_toc_cmd_buf()
795 cmd->cmd.cmd_load_toc.toc_phy_addr_lo = lower_32_bits(pri_buf_mc); in psp_prep_load_toc_cmd_buf()
796 cmd->cmd.cmd_load_toc.toc_phy_addr_hi = upper_32_bits(pri_buf_mc); in psp_prep_load_toc_cmd_buf()
797 cmd->cmd.cmd_load_toc.toc_size = size; in psp_prep_load_toc_cmd_buf()
807 /* Copy toc to psp firmware private buffer */ in psp_load_toc()
808 psp_copy_fw(psp, psp->toc.start_addr, psp->toc.size_bytes); in psp_load_toc()
810 psp_prep_load_toc_cmd_buf(cmd, psp->fw_pri_mc_addr, psp->toc.size_bytes); in psp_load_toc()
813 psp->fence_buf_mc_addr); in psp_load_toc()
815 *tmr_size = psp->cmd_buf_mem->resp.tmr_size; in psp_load_toc()
837 tmr_size = PSP_TMR_SIZE(psp->adev); in psp_tmr_init()
842 if (!amdgpu_sriov_vf(psp->adev) && in psp_tmr_init()
843 psp->toc.start_addr && in psp_tmr_init()
844 psp->toc.size_bytes && in psp_tmr_init()
845 psp->fw_pri_buf) { in psp_tmr_init()
848 dev_err(psp->adev->dev, "Failed to load toc\n"); in psp_tmr_init()
853 if (!psp->tmr_bo && !psp->boot_time_tmr) { in psp_tmr_init()
854 pptr = amdgpu_sriov_vf(psp->adev) ? &tmr_buf : NULL; in psp_tmr_init()
855 ret = amdgpu_bo_create_kernel(psp->adev, tmr_size, in psp_tmr_init()
857 AMDGPU_HAS_VRAM(psp->adev) ? in psp_tmr_init()
860 &psp->tmr_bo, &psp->tmr_mc_addr, in psp_tmr_init()
869 switch (amdgpu_ip_version(psp->adev, MP0_HWIP, 0)) { in psp_skip_tmr()
891 if (amdgpu_sriov_vf(psp->adev) && psp_skip_tmr(psp)) in psp_tmr_load()
896 psp_prep_tmr_cmd_buf(psp, cmd, psp->tmr_mc_addr, psp->tmr_bo); in psp_tmr_load()
897 if (psp->tmr_bo) in psp_tmr_load()
898 dev_info(psp->adev->dev, "reserve 0x%lx from 0x%llx for PSP TMR\n", in psp_tmr_load()
899 amdgpu_bo_size(psp->tmr_bo), psp->tmr_mc_addr); in psp_tmr_load()
902 psp->fence_buf_mc_addr); in psp_tmr_load()
912 if (amdgpu_sriov_vf(psp->adev)) in psp_prep_tmr_unload_cmd_buf()
913 cmd->cmd_id = GFX_CMD_ID_DESTROY_VMR; in psp_prep_tmr_unload_cmd_buf()
915 cmd->cmd_id = GFX_CMD_ID_DESTROY_TMR; in psp_prep_tmr_unload_cmd_buf()
926 if (amdgpu_sriov_vf(psp->adev) && psp_skip_tmr(psp)) in psp_tmr_unload()
932 dev_dbg(psp->adev->dev, "free PSP TMR buffer\n"); in psp_tmr_unload()
935 psp->fence_buf_mc_addr); in psp_tmr_unload()
954 return -EINVAL; in psp_get_fw_attestation_records_addr()
956 if (amdgpu_sriov_vf(psp->adev)) in psp_get_fw_attestation_records_addr()
961 cmd->cmd_id = GFX_CMD_ID_GET_FW_ATTESTATION; in psp_get_fw_attestation_records_addr()
964 psp->fence_buf_mc_addr); in psp_get_fw_attestation_records_addr()
967 *output_ptr = ((uint64_t)cmd->resp.uresp.fwar_db_info.fwar_db_addr_lo) + in psp_get_fw_attestation_records_addr()
968 ((uint64_t)cmd->resp.uresp.fwar_db_info.fwar_db_addr_hi << 32); in psp_get_fw_attestation_records_addr()
978 struct psp_context *psp = &adev->psp; in psp_boot_config_get()
987 cmd->cmd_id = GFX_CMD_ID_BOOT_CFG; in psp_boot_config_get()
988 cmd->cmd.boot_cfg.sub_cmd = BOOTCFG_CMD_GET; in psp_boot_config_get()
990 ret = psp_cmd_submit_buf(psp, NULL, cmd, psp->fence_buf_mc_addr); in psp_boot_config_get()
993 (cmd->resp.uresp.boot_cfg.boot_cfg & BOOT_CONFIG_GECC) ? 1 : 0; in psp_boot_config_get()
1004 struct psp_context *psp = &adev->psp; in psp_boot_config_set()
1012 cmd->cmd_id = GFX_CMD_ID_BOOT_CFG; in psp_boot_config_set()
1013 cmd->cmd.boot_cfg.sub_cmd = BOOTCFG_CMD_SET; in psp_boot_config_set()
1014 cmd->cmd.boot_cfg.boot_config = boot_cfg; in psp_boot_config_set()
1015 cmd->cmd.boot_cfg.boot_config_valid = boot_cfg; in psp_boot_config_set()
1017 ret = psp_cmd_submit_buf(psp, NULL, cmd, psp->fence_buf_mc_addr); in psp_boot_config_set()
1027 struct psp_context *psp = &adev->psp; in psp_rl_load()
1030 if (!is_psp_fw_valid(psp->rl)) in psp_rl_load()
1035 memset(psp->fw_pri_buf, 0, PSP_1_MEG); in psp_rl_load()
1036 memcpy(psp->fw_pri_buf, psp->rl.start_addr, psp->rl.size_bytes); in psp_rl_load()
1038 cmd->cmd_id = GFX_CMD_ID_LOAD_IP_FW; in psp_rl_load()
1039 cmd->cmd.cmd_load_ip_fw.fw_phy_addr_lo = lower_32_bits(psp->fw_pri_mc_addr); in psp_rl_load()
1040 cmd->cmd.cmd_load_ip_fw.fw_phy_addr_hi = upper_32_bits(psp->fw_pri_mc_addr); in psp_rl_load()
1041 cmd->cmd.cmd_load_ip_fw.fw_size = psp->rl.size_bytes; in psp_rl_load()
1042 cmd->cmd.cmd_load_ip_fw.fw_type = GFX_FW_TYPE_REG_LIST; in psp_rl_load()
1044 ret = psp_cmd_submit_buf(psp, NULL, cmd, psp->fence_buf_mc_addr); in psp_rl_load()
1056 if (amdgpu_sriov_vf(psp->adev)) in psp_memory_partition()
1061 cmd->cmd_id = GFX_CMD_ID_FB_NPS_MODE; in psp_memory_partition()
1062 cmd->cmd.cmd_memory_part.mode = mode; in psp_memory_partition()
1064 dev_info(psp->adev->dev, in psp_memory_partition()
1066 ret = psp_cmd_submit_buf(psp, NULL, cmd, psp->fence_buf_mc_addr); in psp_memory_partition()
1068 dev_err(psp->adev->dev, in psp_memory_partition()
1081 if (amdgpu_sriov_vf(psp->adev)) in psp_spatial_partition()
1086 cmd->cmd_id = GFX_CMD_ID_SRIOV_SPATIAL_PART; in psp_spatial_partition()
1087 cmd->cmd.cmd_spatial_part.mode = mode; in psp_spatial_partition()
1089 dev_info(psp->adev->dev, "Requesting %d partitions through PSP", mode); in psp_spatial_partition()
1090 ret = psp_cmd_submit_buf(psp, NULL, cmd, psp->fence_buf_mc_addr); in psp_spatial_partition()
1105 if (amdgpu_sriov_vf(psp->adev) || !psp->asd_context.bin_desc.size_bytes) in psp_asd_initialize()
1109 if (!amdgpu_device_has_display_hardware(psp->adev) && in psp_asd_initialize()
1110 amdgpu_ip_version(psp->adev, MP0_HWIP, 0) >= IP_VERSION(13, 0, 10)) in psp_asd_initialize()
1113 psp->asd_context.mem_context.shared_mc_addr = 0; in psp_asd_initialize()
1114 psp->asd_context.mem_context.shared_mem_size = PSP_ASD_SHARED_MEM_SIZE; in psp_asd_initialize()
1115 psp->asd_context.ta_load_type = GFX_CMD_ID_LOAD_ASD; in psp_asd_initialize()
1117 ret = psp_ta_load(psp, &psp->asd_context); in psp_asd_initialize()
1119 psp->asd_context.initialized = true; in psp_asd_initialize()
1127 cmd->cmd_id = GFX_CMD_ID_UNLOAD_TA; in psp_prep_ta_unload_cmd_buf()
1128 cmd->cmd.cmd_unload_ta.session_id = session_id; in psp_prep_ta_unload_cmd_buf()
1136 psp_prep_ta_unload_cmd_buf(cmd, context->session_id); in psp_ta_unload()
1138 ret = psp_cmd_submit_buf(psp, NULL, cmd, psp->fence_buf_mc_addr); in psp_ta_unload()
1140 context->resp_status = cmd->resp.status; in psp_ta_unload()
1151 if (amdgpu_sriov_vf(psp->adev)) in psp_asd_terminate()
1154 if (!psp->asd_context.initialized) in psp_asd_terminate()
1157 ret = psp_ta_unload(psp, &psp->asd_context); in psp_asd_terminate()
1159 psp->asd_context.initialized = false; in psp_asd_terminate()
1167 cmd->cmd_id = GFX_CMD_ID_PROG_REG; in psp_prep_reg_prog_cmd_buf()
1168 cmd->cmd.cmd_setup_reg_prog.reg_value = value; in psp_prep_reg_prog_cmd_buf()
1169 cmd->cmd.cmd_setup_reg_prog.reg_id = id; in psp_prep_reg_prog_cmd_buf()
1179 return -EINVAL; in psp_reg_program()
1184 ret = psp_cmd_submit_buf(psp, NULL, cmd, psp->fence_buf_mc_addr); in psp_reg_program()
1186 dev_err(psp->adev->dev, "PSP failed to program reg id %d\n", reg); in psp_reg_program()
1197 cmd->cmd_id = context->ta_load_type; in psp_prep_ta_load_cmd_buf()
1198 cmd->cmd.cmd_load_ta.app_phy_addr_lo = lower_32_bits(ta_bin_mc); in psp_prep_ta_load_cmd_buf()
1199 cmd->cmd.cmd_load_ta.app_phy_addr_hi = upper_32_bits(ta_bin_mc); in psp_prep_ta_load_cmd_buf()
1200 cmd->cmd.cmd_load_ta.app_len = context->bin_desc.size_bytes; in psp_prep_ta_load_cmd_buf()
1202 cmd->cmd.cmd_load_ta.cmd_buf_phy_addr_lo = in psp_prep_ta_load_cmd_buf()
1203 lower_32_bits(context->mem_context.shared_mc_addr); in psp_prep_ta_load_cmd_buf()
1204 cmd->cmd.cmd_load_ta.cmd_buf_phy_addr_hi = in psp_prep_ta_load_cmd_buf()
1205 upper_32_bits(context->mem_context.shared_mc_addr); in psp_prep_ta_load_cmd_buf()
1206 cmd->cmd.cmd_load_ta.cmd_buf_len = context->mem_context.shared_mem_size; in psp_prep_ta_load_cmd_buf()
1216 return amdgpu_bo_create_kernel(psp->adev, mem_ctx->shared_mem_size, in psp_ta_init_shared_buf()
1219 &mem_ctx->shared_bo, in psp_ta_init_shared_buf()
1220 &mem_ctx->shared_mc_addr, in psp_ta_init_shared_buf()
1221 &mem_ctx->shared_buf); in psp_ta_init_shared_buf()
1228 cmd->cmd_id = GFX_CMD_ID_INVOKE_CMD; in psp_prep_ta_invoke_cmd_buf()
1229 cmd->cmd.cmd_invoke_cmd.session_id = session_id; in psp_prep_ta_invoke_cmd_buf()
1230 cmd->cmd.cmd_invoke_cmd.ta_cmd_id = ta_cmd_id; in psp_prep_ta_invoke_cmd_buf()
1240 psp_prep_ta_invoke_cmd_buf(cmd, ta_cmd_id, context->session_id); in psp_ta_invoke()
1243 psp->fence_buf_mc_addr); in psp_ta_invoke()
1245 context->resp_status = cmd->resp.status; in psp_ta_invoke()
1259 psp_copy_fw(psp, context->bin_desc.start_addr, in psp_ta_load()
1260 context->bin_desc.size_bytes); in psp_ta_load()
1262 psp_prep_ta_load_cmd_buf(cmd, psp->fw_pri_mc_addr, context); in psp_ta_load()
1265 psp->fence_buf_mc_addr); in psp_ta_load()
1267 context->resp_status = cmd->resp.status; in psp_ta_load()
1270 context->session_id = cmd->resp.session_id; in psp_ta_load()
1279 return psp_ta_invoke(psp, ta_cmd_id, &psp->xgmi_context.context); in psp_xgmi_invoke()
1285 struct amdgpu_device *adev = psp->adev; in psp_xgmi_terminate()
1290 adev->gmc.xgmi.connected_to_cpu)) in psp_xgmi_terminate()
1293 if (!psp->xgmi_context.context.initialized) in psp_xgmi_terminate()
1296 ret = psp_ta_unload(psp, &psp->xgmi_context.context); in psp_xgmi_terminate()
1298 psp->xgmi_context.context.initialized = false; in psp_xgmi_terminate()
1308 if (!psp->ta_fw || in psp_xgmi_initialize()
1309 !psp->xgmi_context.context.bin_desc.size_bytes || in psp_xgmi_initialize()
1310 !psp->xgmi_context.context.bin_desc.start_addr) in psp_xgmi_initialize()
1311 return -ENOENT; in psp_xgmi_initialize()
1316 psp->xgmi_context.context.mem_context.shared_mem_size = PSP_XGMI_SHARED_MEM_SIZE; in psp_xgmi_initialize()
1317 psp->xgmi_context.context.ta_load_type = GFX_CMD_ID_LOAD_TA; in psp_xgmi_initialize()
1319 if (!psp->xgmi_context.context.mem_context.shared_buf) { in psp_xgmi_initialize()
1320 ret = psp_ta_init_shared_buf(psp, &psp->xgmi_context.context.mem_context); in psp_xgmi_initialize()
1326 ret = psp_ta_load(psp, &psp->xgmi_context.context); in psp_xgmi_initialize()
1328 psp->xgmi_context.context.initialized = true; in psp_xgmi_initialize()
1334 xgmi_cmd = (struct ta_xgmi_shared_memory *)(psp->xgmi_context.context.mem_context.shared_buf); in psp_xgmi_initialize()
1336 xgmi_cmd->flag_extend_link_record = set_extended_data; in psp_xgmi_initialize()
1337 xgmi_cmd->cmd_id = TA_COMMAND_XGMI__INITIALIZE; in psp_xgmi_initialize()
1339 ret = psp_xgmi_invoke(psp, xgmi_cmd->cmd_id); in psp_xgmi_initialize()
1341 psp->xgmi_context.xgmi_ta_caps = xgmi_cmd->caps_flag; in psp_xgmi_initialize()
1351 xgmi_cmd = (struct ta_xgmi_shared_memory *)psp->xgmi_context.context.mem_context.shared_buf; in psp_xgmi_get_hive_id()
1354 xgmi_cmd->cmd_id = TA_COMMAND_XGMI__GET_HIVE_ID; in psp_xgmi_get_hive_id()
1357 ret = psp_xgmi_invoke(psp, xgmi_cmd->cmd_id); in psp_xgmi_get_hive_id()
1361 *hive_id = xgmi_cmd->xgmi_out_message.get_hive_id.hive_id; in psp_xgmi_get_hive_id()
1371 xgmi_cmd = (struct ta_xgmi_shared_memory *)psp->xgmi_context.context.mem_context.shared_buf; in psp_xgmi_get_node_id()
1374 xgmi_cmd->cmd_id = TA_COMMAND_XGMI__GET_NODE_ID; in psp_xgmi_get_node_id()
1377 ret = psp_xgmi_invoke(psp, xgmi_cmd->cmd_id); in psp_xgmi_get_node_id()
1381 *node_id = xgmi_cmd->xgmi_out_message.get_node_id.node_id; in psp_xgmi_get_node_id()
1388 return (amdgpu_ip_version(psp->adev, MP0_HWIP, 0) == in psp_xgmi_peer_link_info_supported()
1390 psp->xgmi_context.context.bin_desc.fw_version >= 0x2000000b) || in psp_xgmi_peer_link_info_supported()
1391 amdgpu_ip_version(psp->adev, MP0_HWIP, 0) >= in psp_xgmi_peer_link_info_supported()
1399 * TA holds bi-directional information, the driver would have to do
1407 uint64_t src_node_id = psp->adev->gmc.xgmi.node_id; in psp_xgmi_reflect_topology_info()
1412 hive = amdgpu_get_xgmi_hive(psp->adev); in psp_xgmi_reflect_topology_info()
1416 list_for_each_entry(mirror_adev, &hive->device_list, gmc.xgmi.head) { in psp_xgmi_reflect_topology_info()
1420 if (mirror_adev->gmc.xgmi.node_id != dst_node_id) in psp_xgmi_reflect_topology_info()
1423 mirror_top_info = &mirror_adev->psp.xgmi_context.top_info; in psp_xgmi_reflect_topology_info()
1424 for (j = 0; j < mirror_top_info->num_nodes; j++) { in psp_xgmi_reflect_topology_info()
1425 if (mirror_top_info->nodes[j].node_id != src_node_id) in psp_xgmi_reflect_topology_info()
1428 mirror_top_info->nodes[j].num_hops = dst_num_hops; in psp_xgmi_reflect_topology_info()
1430 * prevent 0 num_links value re-reflection since reflection in psp_xgmi_reflect_topology_info()
1435 mirror_top_info->nodes[j].num_links = dst_num_links; in psp_xgmi_reflect_topology_info()
1457 if (!topology || topology->num_nodes > TA_XGMI__MAX_CONNECTED_NODES) in psp_xgmi_get_topology_info()
1458 return -EINVAL; in psp_xgmi_get_topology_info()
1460 xgmi_cmd = (struct ta_xgmi_shared_memory *)psp->xgmi_context.context.mem_context.shared_buf; in psp_xgmi_get_topology_info()
1462 xgmi_cmd->flag_extend_link_record = get_extended_data; in psp_xgmi_get_topology_info()
1465 topology_info_input = &xgmi_cmd->xgmi_in_message.get_topology_info; in psp_xgmi_get_topology_info()
1466 xgmi_cmd->cmd_id = TA_COMMAND_XGMI__GET_TOPOLOGY_INFO; in psp_xgmi_get_topology_info()
1467 topology_info_input->num_nodes = number_devices; in psp_xgmi_get_topology_info()
1469 for (i = 0; i < topology_info_input->num_nodes; i++) { in psp_xgmi_get_topology_info()
1470 topology_info_input->nodes[i].node_id = topology->nodes[i].node_id; in psp_xgmi_get_topology_info()
1471 topology_info_input->nodes[i].num_hops = topology->nodes[i].num_hops; in psp_xgmi_get_topology_info()
1472 topology_info_input->nodes[i].is_sharing_enabled = topology->nodes[i].is_sharing_enabled; in psp_xgmi_get_topology_info()
1473 topology_info_input->nodes[i].sdma_engine = topology->nodes[i].sdma_engine; in psp_xgmi_get_topology_info()
1482 topology_info_output = &xgmi_cmd->xgmi_out_message.get_topology_info; in psp_xgmi_get_topology_info()
1483 topology->num_nodes = xgmi_cmd->xgmi_out_message.get_topology_info.num_nodes; in psp_xgmi_get_topology_info()
1484 for (i = 0; i < topology->num_nodes; i++) { in psp_xgmi_get_topology_info()
1485 /* extended data will either be 0 or equal to non-extended data */ in psp_xgmi_get_topology_info()
1486 if (topology_info_output->nodes[i].num_hops) in psp_xgmi_get_topology_info()
1487 topology->nodes[i].num_hops = topology_info_output->nodes[i].num_hops; in psp_xgmi_get_topology_info()
1489 /* non-extended data gets everything here so no need to update */ in psp_xgmi_get_topology_info()
1491 topology->nodes[i].node_id = topology_info_output->nodes[i].node_id; in psp_xgmi_get_topology_info()
1492 topology->nodes[i].is_sharing_enabled = in psp_xgmi_get_topology_info()
1493 topology_info_output->nodes[i].is_sharing_enabled; in psp_xgmi_get_topology_info()
1494 topology->nodes[i].sdma_engine = in psp_xgmi_get_topology_info()
1495 topology_info_output->nodes[i].sdma_engine; in psp_xgmi_get_topology_info()
1505 (psp->xgmi_context.supports_extended_data && in psp_xgmi_get_topology_info()
1507 amdgpu_ip_version(psp->adev, MP0_HWIP, 0) == in psp_xgmi_get_topology_info()
1509 amdgpu_ip_version(psp->adev, MP0_HWIP, 0) == in psp_xgmi_get_topology_info()
1511 bool ta_port_num_support = amdgpu_sriov_vf(psp->adev) ? 0 : in psp_xgmi_get_topology_info()
1512 psp->xgmi_context.xgmi_ta_caps & EXTEND_PEER_LINK_INFO_CMD_FLAG; in psp_xgmi_get_topology_info()
1520 link_extend_info_output = &xgmi_cmd->xgmi_out_message.get_extend_link_info; in psp_xgmi_get_topology_info()
1522 for (i = 0; i < topology->num_nodes; i++) in psp_xgmi_get_topology_info()
1523 link_extend_info_output->nodes[i].node_id = topology->nodes[i].node_id; in psp_xgmi_get_topology_info()
1525 link_extend_info_output->num_nodes = topology->num_nodes; in psp_xgmi_get_topology_info()
1526 xgmi_cmd->cmd_id = TA_COMMAND_XGMI__GET_EXTEND_PEER_LINKS; in psp_xgmi_get_topology_info()
1528 link_info_output = &xgmi_cmd->xgmi_out_message.get_link_info; in psp_xgmi_get_topology_info()
1530 for (i = 0; i < topology->num_nodes; i++) in psp_xgmi_get_topology_info()
1531 link_info_output->nodes[i].node_id = topology->nodes[i].node_id; in psp_xgmi_get_topology_info()
1533 link_info_output->num_nodes = topology->num_nodes; in psp_xgmi_get_topology_info()
1534 xgmi_cmd->cmd_id = TA_COMMAND_XGMI__GET_PEER_LINKS; in psp_xgmi_get_topology_info()
1537 ret = psp_xgmi_invoke(psp, xgmi_cmd->cmd_id); in psp_xgmi_get_topology_info()
1541 for (i = 0; i < topology->num_nodes; i++) { in psp_xgmi_get_topology_info()
1543 link_extend_info_output->nodes[i].num_links : link_info_output->nodes[i].num_links; in psp_xgmi_get_topology_info()
1546 topology->nodes[i].num_links = topology->nodes[i].num_links + node_num_links; in psp_xgmi_get_topology_info()
1548 topology->nodes[i].num_links = (requires_reflection && topology->nodes[i].num_links) ? in psp_xgmi_get_topology_info()
1549 topology->nodes[i].num_links : node_num_links; in psp_xgmi_get_topology_info()
1552 if (ta_port_num_support && topology->nodes[i].num_links) { in psp_xgmi_get_topology_info()
1553 memcpy(topology->nodes[i].port_num, link_extend_info_output->nodes[i].port_num, in psp_xgmi_get_topology_info()
1557 /* reflect the topology information for bi-directionality */ in psp_xgmi_get_topology_info()
1558 if (requires_reflection && topology->nodes[i].num_hops) in psp_xgmi_get_topology_info()
1559 psp_xgmi_reflect_topology_info(psp, topology->nodes[i]); in psp_xgmi_get_topology_info()
1574 if (!topology || topology->num_nodes > TA_XGMI__MAX_CONNECTED_NODES) in psp_xgmi_set_topology_info()
1575 return -EINVAL; in psp_xgmi_set_topology_info()
1577 xgmi_cmd = (struct ta_xgmi_shared_memory *)psp->xgmi_context.context.mem_context.shared_buf; in psp_xgmi_set_topology_info()
1580 topology_info_input = &xgmi_cmd->xgmi_in_message.get_topology_info; in psp_xgmi_set_topology_info()
1581 xgmi_cmd->cmd_id = TA_COMMAND_XGMI__SET_TOPOLOGY_INFO; in psp_xgmi_set_topology_info()
1582 topology_info_input->num_nodes = number_devices; in psp_xgmi_set_topology_info()
1584 for (i = 0; i < topology_info_input->num_nodes; i++) { in psp_xgmi_set_topology_info()
1585 topology_info_input->nodes[i].node_id = topology->nodes[i].node_id; in psp_xgmi_set_topology_info()
1586 topology_info_input->nodes[i].num_hops = topology->nodes[i].num_hops; in psp_xgmi_set_topology_info()
1587 topology_info_input->nodes[i].is_sharing_enabled = 1; in psp_xgmi_set_topology_info()
1588 topology_info_input->nodes[i].sdma_engine = topology->nodes[i].sdma_engine; in psp_xgmi_set_topology_info()
1599 (struct ta_ras_shared_memory *)psp->ras_context.context.mem_context.shared_buf; in psp_ras_ta_check_status()
1601 switch (ras_cmd->ras_status) { in psp_ras_ta_check_status()
1603 dev_warn(psp->adev->dev, in psp_ras_ta_check_status()
1607 dev_warn(psp->adev->dev, in psp_ras_ta_check_status()
1613 if (ras_cmd->cmd_id == TA_RAS_COMMAND__TRIGGER_ERROR) in psp_ras_ta_check_status()
1614 dev_warn(psp->adev->dev, in psp_ras_ta_check_status()
1618 dev_warn(psp->adev->dev, in psp_ras_ta_check_status()
1619 "RAS WARNING: ras status = 0x%X\n", ras_cmd->ras_status); in psp_ras_ta_check_status()
1632 return -EINVAL; in psp_ras_send_cmd()
1634 mutex_lock(&psp->ras_context.mutex); in psp_ras_send_cmd()
1635 ras_cmd = (struct ta_ras_shared_memory *)psp->ras_context.context.mem_context.shared_buf; in psp_ras_send_cmd()
1641 memcpy(&ras_cmd->ras_in_message, in psp_ras_send_cmd()
1642 in, sizeof(ras_cmd->ras_in_message)); in psp_ras_send_cmd()
1645 memcpy(&ras_cmd->ras_in_message.trigger_error, in psp_ras_send_cmd()
1646 in, sizeof(ras_cmd->ras_in_message.trigger_error)); in psp_ras_send_cmd()
1649 memcpy(&ras_cmd->ras_in_message.address, in psp_ras_send_cmd()
1650 in, sizeof(ras_cmd->ras_in_message.address)); in psp_ras_send_cmd()
1653 dev_err(psp->adev->dev, "Invalid ras cmd id: %u\n", cmd); in psp_ras_send_cmd()
1654 ret = -EINVAL; in psp_ras_send_cmd()
1658 ras_cmd->cmd_id = cmd; in psp_ras_send_cmd()
1659 ret = psp_ras_invoke(psp, ras_cmd->cmd_id); in psp_ras_send_cmd()
1664 memcpy(out, &ras_cmd->ras_status, sizeof(ras_cmd->ras_status)); in psp_ras_send_cmd()
1667 if (ret || ras_cmd->ras_status || psp->cmd_buf_mem->resp.status) in psp_ras_send_cmd()
1668 ret = -EINVAL; in psp_ras_send_cmd()
1671 &ras_cmd->ras_out_message.address, in psp_ras_send_cmd()
1672 sizeof(ras_cmd->ras_out_message.address)); in psp_ras_send_cmd()
1679 mutex_unlock(&psp->ras_context.mutex); in psp_ras_send_cmd()
1689 ras_cmd = (struct ta_ras_shared_memory *)psp->ras_context.context.mem_context.shared_buf; in psp_ras_invoke()
1694 if (amdgpu_sriov_vf(psp->adev)) in psp_ras_invoke()
1697 ret = psp_ta_invoke(psp, ta_cmd_id, &psp->ras_context.context); in psp_ras_invoke()
1702 if (ras_cmd->if_version > RAS_TA_HOST_IF_VER) { in psp_ras_invoke()
1703 dev_warn(psp->adev->dev, "RAS: Unsupported Interface\n"); in psp_ras_invoke()
1704 return -EINVAL; in psp_ras_invoke()
1708 if (ras_cmd->ras_out_message.flags.err_inject_switch_disable_flag) { in psp_ras_invoke()
1709 dev_warn(psp->adev->dev, "ECC switch disabled\n"); in psp_ras_invoke()
1711 ras_cmd->ras_status = TA_RAS_STATUS__ERROR_RAS_NOT_AVAILABLE; in psp_ras_invoke()
1712 } else if (ras_cmd->ras_out_message.flags.reg_access_failure_flag) in psp_ras_invoke()
1713 dev_warn(psp->adev->dev, in psp_ras_invoke()
1728 if (!psp->ras_context.context.initialized || !info) in psp_ras_enable_features()
1729 return -EINVAL; in psp_ras_enable_features()
1735 return -EINVAL; in psp_ras_enable_features()
1747 if (amdgpu_sriov_vf(psp->adev)) in psp_ras_terminate()
1750 if (!psp->ras_context.context.initialized) in psp_ras_terminate()
1753 ret = psp_ta_unload(psp, &psp->ras_context.context); in psp_ras_terminate()
1755 psp->ras_context.context.initialized = false; in psp_ras_terminate()
1757 mutex_destroy(&psp->ras_context.mutex); in psp_ras_terminate()
1766 struct amdgpu_device *adev = psp->adev; in psp_ras_initialize()
1775 if (!adev->psp.ras_context.context.bin_desc.size_bytes || in psp_ras_initialize()
1776 !adev->psp.ras_context.context.bin_desc.start_addr) { in psp_ras_initialize()
1777 dev_info(adev->dev, "RAS: optional ras ta ucode is not available\n"); in psp_ras_initialize()
1787 dev_warn(adev->dev, "PSP get boot config failed\n"); in psp_ras_initialize()
1789 if (!amdgpu_ras_is_supported(psp->adev, AMDGPU_RAS_BLOCK__UMC)) { in psp_ras_initialize()
1791 dev_info(adev->dev, "GECC is disabled\n"); in psp_ras_initialize()
1800 dev_warn(adev->dev, "PSP set boot config failed\n"); in psp_ras_initialize()
1802 …dev_warn(adev->dev, "GECC will be disabled in next boot cycle if set amdgpu_ras_enable and/or amdg… in psp_ras_initialize()
1806 dev_info(adev->dev, "GECC is enabled\n"); in psp_ras_initialize()
1814 dev_warn(adev->dev, "PSP set boot config failed\n"); in psp_ras_initialize()
1816 dev_warn(adev->dev, "GECC will be enabled in next boot cycle\n"); in psp_ras_initialize()
1821 psp->ras_context.context.mem_context.shared_mem_size = PSP_RAS_SHARED_MEM_SIZE; in psp_ras_initialize()
1822 psp->ras_context.context.ta_load_type = GFX_CMD_ID_LOAD_TA; in psp_ras_initialize()
1824 if (!psp->ras_context.context.mem_context.shared_buf) { in psp_ras_initialize()
1825 ret = psp_ta_init_shared_buf(psp, &psp->ras_context.context.mem_context); in psp_ras_initialize()
1830 ras_cmd = (struct ta_ras_shared_memory *)psp->ras_context.context.mem_context.shared_buf; in psp_ras_initialize()
1834 ras_cmd->ras_in_message.init_flags.poison_mode_en = 1; in psp_ras_initialize()
1835 if (!adev->gmc.xgmi.connected_to_cpu && !adev->gmc.is_app_apu) in psp_ras_initialize()
1836 ras_cmd->ras_in_message.init_flags.dgpu_mode = 1; in psp_ras_initialize()
1837 ras_cmd->ras_in_message.init_flags.xcc_mask = in psp_ras_initialize()
1838 adev->gfx.xcc_mask; in psp_ras_initialize()
1839 ras_cmd->ras_in_message.init_flags.channel_dis_num = hweight32(adev->gmc.m_half_use) * 2; in psp_ras_initialize()
1840 if (adev->gmc.gmc_funcs->query_mem_partition_mode) in psp_ras_initialize()
1841 ras_cmd->ras_in_message.init_flags.nps_mode = in psp_ras_initialize()
1842 adev->gmc.gmc_funcs->query_mem_partition_mode(adev); in psp_ras_initialize()
1844 ret = psp_ta_load(psp, &psp->ras_context.context); in psp_ras_initialize()
1846 if (!ret && !ras_cmd->ras_status) { in psp_ras_initialize()
1847 psp->ras_context.context.initialized = true; in psp_ras_initialize()
1848 mutex_init(&psp->ras_context.mutex); in psp_ras_initialize()
1850 if (ras_cmd->ras_status) in psp_ras_initialize()
1851 dev_warn(adev->dev, "RAS Init Status: 0x%X\n", ras_cmd->ras_status); in psp_ras_initialize()
1854 psp->ras_context.context.initialized = false; in psp_ras_initialize()
1863 struct amdgpu_device *adev = psp->adev; in psp_ras_trigger_error()
1868 if (!psp->ras_context.context.initialized || !info) in psp_ras_trigger_error()
1869 return -EINVAL; in psp_ras_trigger_error()
1871 switch (info->block_id) { in psp_ras_trigger_error()
1890 info->sub_block_index |= dev_mask; in psp_ras_trigger_error()
1895 return -EINVAL; in psp_ras_trigger_error()
1904 return -EACCES; in psp_ras_trigger_error()
1906 return -EINVAL; in psp_ras_trigger_error()
1917 if (!psp->ras_context.context.initialized || in psp_ras_query_address()
1919 return -EINVAL; in psp_ras_query_address()
1936 if (amdgpu_sriov_vf(psp->adev)) in psp_hdcp_initialize()
1940 if (!amdgpu_device_has_display_hardware(psp->adev)) in psp_hdcp_initialize()
1943 if (!psp->hdcp_context.context.bin_desc.size_bytes || in psp_hdcp_initialize()
1944 !psp->hdcp_context.context.bin_desc.start_addr) { in psp_hdcp_initialize()
1945 dev_info(psp->adev->dev, "HDCP: optional hdcp ta ucode is not available\n"); in psp_hdcp_initialize()
1949 psp->hdcp_context.context.mem_context.shared_mem_size = PSP_HDCP_SHARED_MEM_SIZE; in psp_hdcp_initialize()
1950 psp->hdcp_context.context.ta_load_type = GFX_CMD_ID_LOAD_TA; in psp_hdcp_initialize()
1952 if (!psp->hdcp_context.context.mem_context.shared_buf) { in psp_hdcp_initialize()
1953 ret = psp_ta_init_shared_buf(psp, &psp->hdcp_context.context.mem_context); in psp_hdcp_initialize()
1958 ret = psp_ta_load(psp, &psp->hdcp_context.context); in psp_hdcp_initialize()
1960 psp->hdcp_context.context.initialized = true; in psp_hdcp_initialize()
1961 mutex_init(&psp->hdcp_context.mutex); in psp_hdcp_initialize()
1972 if (amdgpu_sriov_vf(psp->adev)) in psp_hdcp_invoke()
1975 if (!psp->hdcp_context.context.initialized) in psp_hdcp_invoke()
1978 return psp_ta_invoke(psp, ta_cmd_id, &psp->hdcp_context.context); in psp_hdcp_invoke()
1988 if (amdgpu_sriov_vf(psp->adev)) in psp_hdcp_terminate()
1991 if (!psp->hdcp_context.context.initialized) in psp_hdcp_terminate()
1994 ret = psp_ta_unload(psp, &psp->hdcp_context.context); in psp_hdcp_terminate()
1996 psp->hdcp_context.context.initialized = false; in psp_hdcp_terminate()
2010 if (amdgpu_sriov_vf(psp->adev)) in psp_dtm_initialize()
2014 if (!amdgpu_device_has_display_hardware(psp->adev)) in psp_dtm_initialize()
2017 if (!psp->dtm_context.context.bin_desc.size_bytes || in psp_dtm_initialize()
2018 !psp->dtm_context.context.bin_desc.start_addr) { in psp_dtm_initialize()
2019 dev_info(psp->adev->dev, "DTM: optional dtm ta ucode is not available\n"); in psp_dtm_initialize()
2023 psp->dtm_context.context.mem_context.shared_mem_size = PSP_DTM_SHARED_MEM_SIZE; in psp_dtm_initialize()
2024 psp->dtm_context.context.ta_load_type = GFX_CMD_ID_LOAD_TA; in psp_dtm_initialize()
2026 if (!psp->dtm_context.context.mem_context.shared_buf) { in psp_dtm_initialize()
2027 ret = psp_ta_init_shared_buf(psp, &psp->dtm_context.context.mem_context); in psp_dtm_initialize()
2032 ret = psp_ta_load(psp, &psp->dtm_context.context); in psp_dtm_initialize()
2034 psp->dtm_context.context.initialized = true; in psp_dtm_initialize()
2035 mutex_init(&psp->dtm_context.mutex); in psp_dtm_initialize()
2046 if (amdgpu_sriov_vf(psp->adev)) in psp_dtm_invoke()
2049 if (!psp->dtm_context.context.initialized) in psp_dtm_invoke()
2052 return psp_ta_invoke(psp, ta_cmd_id, &psp->dtm_context.context); in psp_dtm_invoke()
2062 if (amdgpu_sriov_vf(psp->adev)) in psp_dtm_terminate()
2065 if (!psp->dtm_context.context.initialized) in psp_dtm_terminate()
2068 ret = psp_ta_unload(psp, &psp->dtm_context.context); in psp_dtm_terminate()
2070 psp->dtm_context.context.initialized = false; in psp_dtm_terminate()
2085 if (amdgpu_sriov_vf(psp->adev)) in psp_rap_initialize()
2088 if (!psp->rap_context.context.bin_desc.size_bytes || in psp_rap_initialize()
2089 !psp->rap_context.context.bin_desc.start_addr) { in psp_rap_initialize()
2090 dev_info(psp->adev->dev, "RAP: optional rap ta ucode is not available\n"); in psp_rap_initialize()
2094 psp->rap_context.context.mem_context.shared_mem_size = PSP_RAP_SHARED_MEM_SIZE; in psp_rap_initialize()
2095 psp->rap_context.context.ta_load_type = GFX_CMD_ID_LOAD_TA; in psp_rap_initialize()
2097 if (!psp->rap_context.context.mem_context.shared_buf) { in psp_rap_initialize()
2098 ret = psp_ta_init_shared_buf(psp, &psp->rap_context.context.mem_context); in psp_rap_initialize()
2103 ret = psp_ta_load(psp, &psp->rap_context.context); in psp_rap_initialize()
2105 psp->rap_context.context.initialized = true; in psp_rap_initialize()
2106 mutex_init(&psp->rap_context.mutex); in psp_rap_initialize()
2114 psp_ta_free_shared_buf(&psp->rap_context.context.mem_context); in psp_rap_initialize()
2116 dev_warn(psp->adev->dev, "RAP TA initialize fail (%d) status %d.\n", in psp_rap_initialize()
2129 if (!psp->rap_context.context.initialized) in psp_rap_terminate()
2132 ret = psp_ta_unload(psp, &psp->rap_context.context); in psp_rap_terminate()
2134 psp->rap_context.context.initialized = false; in psp_rap_terminate()
2144 if (!psp->rap_context.context.initialized) in psp_rap_invoke()
2149 return -EINVAL; in psp_rap_invoke()
2151 mutex_lock(&psp->rap_context.mutex); in psp_rap_invoke()
2154 psp->rap_context.context.mem_context.shared_buf; in psp_rap_invoke()
2157 rap_cmd->cmd_id = ta_cmd_id; in psp_rap_invoke()
2158 rap_cmd->validation_method_id = METHOD_A; in psp_rap_invoke()
2160 ret = psp_ta_invoke(psp, rap_cmd->cmd_id, &psp->rap_context.context); in psp_rap_invoke()
2165 *status = rap_cmd->rap_status; in psp_rap_invoke()
2168 mutex_unlock(&psp->rap_context.mutex); in psp_rap_invoke()
2183 if (amdgpu_sriov_vf(psp->adev)) in psp_securedisplay_initialize()
2187 if (!amdgpu_device_has_display_hardware(psp->adev)) in psp_securedisplay_initialize()
2190 if (!psp->securedisplay_context.context.bin_desc.size_bytes || in psp_securedisplay_initialize()
2191 !psp->securedisplay_context.context.bin_desc.start_addr) { in psp_securedisplay_initialize()
2192 dev_info(psp->adev->dev, "SECUREDISPLAY: securedisplay ta ucode is not available\n"); in psp_securedisplay_initialize()
2196 psp->securedisplay_context.context.mem_context.shared_mem_size = in psp_securedisplay_initialize()
2198 psp->securedisplay_context.context.ta_load_type = GFX_CMD_ID_LOAD_TA; in psp_securedisplay_initialize()
2200 if (!psp->securedisplay_context.context.initialized) { in psp_securedisplay_initialize()
2202 &psp->securedisplay_context.context.mem_context); in psp_securedisplay_initialize()
2207 ret = psp_ta_load(psp, &psp->securedisplay_context.context); in psp_securedisplay_initialize()
2209 psp->securedisplay_context.context.initialized = true; in psp_securedisplay_initialize()
2210 mutex_init(&psp->securedisplay_context.mutex); in psp_securedisplay_initialize()
2214 mutex_lock(&psp->securedisplay_context.mutex); in psp_securedisplay_initialize()
2221 mutex_unlock(&psp->securedisplay_context.mutex); in psp_securedisplay_initialize()
2226 psp_ta_free_shared_buf(&psp->securedisplay_context.context.mem_context); in psp_securedisplay_initialize()
2227 dev_err(psp->adev->dev, "SECUREDISPLAY TA initialize fail.\n"); in psp_securedisplay_initialize()
2228 return -EINVAL; in psp_securedisplay_initialize()
2231 if (securedisplay_cmd->status != TA_SECUREDISPLAY_STATUS__SUCCESS) { in psp_securedisplay_initialize()
2232 psp_securedisplay_parse_resp_status(psp, securedisplay_cmd->status); in psp_securedisplay_initialize()
2233 dev_err(psp->adev->dev, "SECUREDISPLAY: query securedisplay TA failed. ret 0x%x\n", in psp_securedisplay_initialize()
2234 securedisplay_cmd->securedisplay_out_message.query_ta.query_cmd_ret); in psp_securedisplay_initialize()
2236 psp->securedisplay_context.context.bin_desc.size_bytes = 0; in psp_securedisplay_initialize()
2249 if (amdgpu_sriov_vf(psp->adev)) in psp_securedisplay_terminate()
2252 if (!psp->securedisplay_context.context.initialized) in psp_securedisplay_terminate()
2255 ret = psp_ta_unload(psp, &psp->securedisplay_context.context); in psp_securedisplay_terminate()
2257 psp->securedisplay_context.context.initialized = false; in psp_securedisplay_terminate()
2266 if (!psp->securedisplay_context.context.initialized) in psp_securedisplay_invoke()
2267 return -EINVAL; in psp_securedisplay_invoke()
2272 return -EINVAL; in psp_securedisplay_invoke()
2274 ret = psp_ta_invoke(psp, ta_cmd_id, &psp->securedisplay_context.context); in psp_securedisplay_invoke()
2282 struct psp_context *psp = &adev->psp; in amdgpu_psp_wait_for_bootloader()
2285 if (!amdgpu_sriov_vf(adev) && psp->funcs && psp->funcs->wait_for_bootloader != NULL) in amdgpu_psp_wait_for_bootloader()
2286 ret = psp->funcs->wait_for_bootloader(psp); in amdgpu_psp_wait_for_bootloader()
2293 if (psp->funcs && in amdgpu_psp_get_ras_capability()
2294 psp->funcs->get_ras_capability) { in amdgpu_psp_get_ras_capability()
2295 return psp->funcs->get_ras_capability(psp); in amdgpu_psp_get_ras_capability()
2303 struct psp_context *psp = &adev->psp; in amdgpu_psp_tos_reload_needed()
2305 if (amdgpu_sriov_vf(adev) || (adev->flags & AMD_IS_APU)) in amdgpu_psp_tos_reload_needed()
2308 if (psp->funcs && psp->funcs->is_reload_needed) in amdgpu_psp_tos_reload_needed()
2309 return psp->funcs->is_reload_needed(psp); in amdgpu_psp_tos_reload_needed()
2316 struct amdgpu_device *adev = psp->adev; in psp_hw_start()
2320 if ((is_psp_fw_valid(psp->kdb)) && in psp_hw_start()
2321 (psp->funcs->bootloader_load_kdb != NULL)) { in psp_hw_start()
2324 dev_err(adev->dev, "PSP load kdb failed!\n"); in psp_hw_start()
2329 if ((is_psp_fw_valid(psp->spl)) && in psp_hw_start()
2330 (psp->funcs->bootloader_load_spl != NULL)) { in psp_hw_start()
2333 dev_err(adev->dev, "PSP load spl failed!\n"); in psp_hw_start()
2338 if ((is_psp_fw_valid(psp->sys)) && in psp_hw_start()
2339 (psp->funcs->bootloader_load_sysdrv != NULL)) { in psp_hw_start()
2342 dev_err(adev->dev, "PSP load sys drv failed!\n"); in psp_hw_start()
2347 if ((is_psp_fw_valid(psp->soc_drv)) && in psp_hw_start()
2348 (psp->funcs->bootloader_load_soc_drv != NULL)) { in psp_hw_start()
2351 dev_err(adev->dev, "PSP load soc drv failed!\n"); in psp_hw_start()
2356 if ((is_psp_fw_valid(psp->intf_drv)) && in psp_hw_start()
2357 (psp->funcs->bootloader_load_intf_drv != NULL)) { in psp_hw_start()
2360 dev_err(adev->dev, "PSP load intf drv failed!\n"); in psp_hw_start()
2365 if ((is_psp_fw_valid(psp->dbg_drv)) && in psp_hw_start()
2366 (psp->funcs->bootloader_load_dbg_drv != NULL)) { in psp_hw_start()
2369 dev_err(adev->dev, "PSP load dbg drv failed!\n"); in psp_hw_start()
2374 if ((is_psp_fw_valid(psp->ras_drv)) && in psp_hw_start()
2375 (psp->funcs->bootloader_load_ras_drv != NULL)) { in psp_hw_start()
2378 dev_err(adev->dev, "PSP load ras_drv failed!\n"); in psp_hw_start()
2383 if ((is_psp_fw_valid(psp->ipkeymgr_drv)) && in psp_hw_start()
2384 (psp->funcs->bootloader_load_ipkeymgr_drv != NULL)) { in psp_hw_start()
2387 dev_err(adev->dev, "PSP load ipkeymgr_drv failed!\n"); in psp_hw_start()
2392 if ((is_psp_fw_valid(psp->spdm_drv)) && in psp_hw_start()
2393 (psp->funcs->bootloader_load_spdm_drv != NULL)) { in psp_hw_start()
2396 dev_err(adev->dev, "PSP load spdm_drv failed!\n"); in psp_hw_start()
2401 if ((is_psp_fw_valid(psp->sos)) && in psp_hw_start()
2402 (psp->funcs->bootloader_load_sos != NULL)) { in psp_hw_start()
2405 dev_err(adev->dev, "PSP load sos failed!\n"); in psp_hw_start()
2413 dev_err(adev->dev, "PSP create ring failed!\n"); in psp_hw_start()
2420 if (!psp->boot_time_tmr || psp->autoload_supported) { in psp_hw_start()
2423 dev_err(adev->dev, "PSP tmr init failed!\n"); in psp_hw_start()
2432 * loaded and before other non-psp firmware loaded. in psp_hw_start()
2434 if (psp->pmfw_centralized_cstate_management) { in psp_hw_start()
2440 if (!psp->boot_time_tmr || !psp->autoload_supported) { in psp_hw_start()
2443 dev_err(adev->dev, "PSP load tmr failed!\n"); in psp_hw_start()
2454 switch (ucode->ucode_id) { in psp_get_fw_type()
2665 return -EINVAL; in psp_get_fw_type()
2674 struct amdgpu_device *adev = psp->adev; in psp_print_fw_hdr()
2677 switch (ucode->ucode_id) { in psp_print_fw_hdr()
2687 adev->sdma.instance[ucode->ucode_id - AMDGPU_UCODE_ID_SDMA0].fw->data; in psp_print_fw_hdr()
2691 hdr = (struct common_firmware_header *)adev->gfx.ce_fw->data; in psp_print_fw_hdr()
2695 hdr = (struct common_firmware_header *)adev->gfx.pfp_fw->data; in psp_print_fw_hdr()
2699 hdr = (struct common_firmware_header *)adev->gfx.me_fw->data; in psp_print_fw_hdr()
2703 hdr = (struct common_firmware_header *)adev->gfx.mec_fw->data; in psp_print_fw_hdr()
2707 hdr = (struct common_firmware_header *)adev->gfx.rlc_fw->data; in psp_print_fw_hdr()
2711 hdr = (struct common_firmware_header *)adev->pm.fw->data; in psp_print_fw_hdr()
2724 uint64_t fw_mem_mc_addr = ucode->mc_addr; in psp_prep_load_ip_fw_cmd_buf()
2726 cmd->cmd_id = GFX_CMD_ID_LOAD_IP_FW; in psp_prep_load_ip_fw_cmd_buf()
2727 cmd->cmd.cmd_load_ip_fw.fw_phy_addr_lo = lower_32_bits(fw_mem_mc_addr); in psp_prep_load_ip_fw_cmd_buf()
2728 cmd->cmd.cmd_load_ip_fw.fw_phy_addr_hi = upper_32_bits(fw_mem_mc_addr); in psp_prep_load_ip_fw_cmd_buf()
2729 cmd->cmd.cmd_load_ip_fw.fw_size = ucode->ucode_size; in psp_prep_load_ip_fw_cmd_buf()
2731 ret = psp_get_fw_type(ucode, &cmd->cmd.cmd_load_ip_fw.fw_type); in psp_prep_load_ip_fw_cmd_buf()
2733 dev_err(psp->adev->dev, "Unknown firmware type\n"); in psp_prep_load_ip_fw_cmd_buf()
2747 psp->fence_buf_mc_addr); in psp_execute_ip_fw_load()
2758 struct amdgpu_device *adev = psp->adev; in psp_load_p2s_table()
2760 &adev->firmware.ucode[AMDGPU_UCODE_ID_P2S_TABLE]; in psp_load_p2s_table()
2762 if (adev->in_runpm && ((adev->pm.rpm_mode == AMDGPU_RUNPM_BACO) || in psp_load_p2s_table()
2763 (adev->pm.rpm_mode == AMDGPU_RUNPM_BAMACO))) in psp_load_p2s_table()
2768 uint32_t supp_vers = adev->flags & AMD_IS_APU ? 0x0036013D : in psp_load_p2s_table()
2770 if (psp->sos.fw_version < supp_vers) in psp_load_p2s_table()
2774 if (!ucode->fw || amdgpu_sriov_vf(psp->adev)) in psp_load_p2s_table()
2785 struct amdgpu_device *adev = psp->adev; in psp_load_smu_fw()
2787 &adev->firmware.ucode[AMDGPU_UCODE_ID_SMC]; in psp_load_smu_fw()
2788 struct amdgpu_ras *ras = psp->ras_context.ras; in psp_load_smu_fw()
2794 if (adev->in_runpm && ((adev->pm.rpm_mode == AMDGPU_RUNPM_BACO) || in psp_load_smu_fw()
2795 (adev->pm.rpm_mode == AMDGPU_RUNPM_BAMACO))) in psp_load_smu_fw()
2798 if (!ucode->fw || amdgpu_sriov_vf(psp->adev)) in psp_load_smu_fw()
2801 if ((amdgpu_in_reset(adev) && ras && adev->ras_enabled && in psp_load_smu_fw()
2806 dev_err(adev->dev, "Failed to set MP1 state prepare for reload\n"); in psp_load_smu_fw()
2812 dev_err(adev->dev, "PSP load smu failed!\n"); in psp_load_smu_fw()
2820 if (!ucode->fw || !ucode->ucode_size) in fw_load_skip_check()
2823 if (ucode->ucode_id == AMDGPU_UCODE_ID_P2S_TABLE) in fw_load_skip_check()
2826 if (ucode->ucode_id == AMDGPU_UCODE_ID_SMC && in fw_load_skip_check()
2828 psp->autoload_supported || in fw_load_skip_check()
2829 psp->pmfw_centralized_cstate_management)) in fw_load_skip_check()
2832 if (amdgpu_sriov_vf(psp->adev) && in fw_load_skip_check()
2833 amdgpu_virt_fw_load_skip_check(psp->adev, ucode->ucode_id)) in fw_load_skip_check()
2836 if (psp->autoload_supported && in fw_load_skip_check()
2837 (ucode->ucode_id == AMDGPU_UCODE_ID_CP_MEC1_JT || in fw_load_skip_check()
2838 ucode->ucode_id == AMDGPU_UCODE_ID_CP_MEC2_JT)) in fw_load_skip_check()
2865 struct amdgpu_device *adev = psp->adev; in psp_load_non_psp_fw()
2867 if (psp->autoload_supported && in psp_load_non_psp_fw()
2868 !psp->pmfw_centralized_cstate_management) { in psp_load_non_psp_fw()
2877 for (i = 0; i < adev->firmware.max_ucodes; i++) { in psp_load_non_psp_fw()
2878 ucode = &adev->firmware.ucode[i]; in psp_load_non_psp_fw()
2880 if (ucode->ucode_id == AMDGPU_UCODE_ID_SMC && in psp_load_non_psp_fw()
2891 if (psp->autoload_supported && in psp_load_non_psp_fw()
2898 (ucode->ucode_id == AMDGPU_UCODE_ID_SDMA1 || in psp_load_non_psp_fw()
2899 ucode->ucode_id == AMDGPU_UCODE_ID_SDMA2 || in psp_load_non_psp_fw()
2900 ucode->ucode_id == AMDGPU_UCODE_ID_SDMA3)) in psp_load_non_psp_fw()
2912 /* Start rlc autoload after psp received all the gfx firmware */ in psp_load_non_psp_fw()
2913 if (psp->autoload_supported && ucode->ucode_id == (amdgpu_sriov_vf(adev) ? in psp_load_non_psp_fw()
2914 adev->virt.autoload_ucode_id : AMDGPU_UCODE_ID_RLC_G)) { in psp_load_non_psp_fw()
2917 dev_err(adev->dev, "Failed to start rlc autoload\n"); in psp_load_non_psp_fw()
2929 struct psp_context *psp = &adev->psp; in psp_load_fw()
2935 memset(psp->fence_buf, 0, PSP_FENCE_BUFFER_SIZE); in psp_load_fw()
2939 dev_err(adev->dev, "PSP ring init failed!\n"); in psp_load_fw()
2954 dev_err(adev->dev, "PSP load asd failed!\n"); in psp_load_fw()
2960 dev_err(adev->dev, "PSP load RL failed!\n"); in psp_load_fw()
2965 if (adev->gmc.xgmi.num_physical_nodes > 1) { in psp_load_fw()
2971 dev_err(psp->adev->dev, in psp_load_fw()
2976 if (psp->ta_fw) { in psp_load_fw()
2979 dev_err(psp->adev->dev, in psp_load_fw()
2984 dev_err(psp->adev->dev, in psp_load_fw()
2989 dev_err(psp->adev->dev, in psp_load_fw()
2994 dev_err(psp->adev->dev, in psp_load_fw()
2999 dev_err(psp->adev->dev, in psp_load_fw()
3011 * psp->cmd destory) are delayed to psp_hw_fini in psp_load_fw()
3020 struct amdgpu_device *adev = ip_block->adev; in psp_hw_init()
3022 mutex_lock(&adev->firmware.mutex); in psp_hw_init()
3030 dev_err(adev->dev, "PSP firmware loading failed\n"); in psp_hw_init()
3034 mutex_unlock(&adev->firmware.mutex); in psp_hw_init()
3038 adev->firmware.load_type = AMDGPU_FW_LOAD_DIRECT; in psp_hw_init()
3039 mutex_unlock(&adev->firmware.mutex); in psp_hw_init()
3040 return -EINVAL; in psp_hw_init()
3045 struct amdgpu_device *adev = ip_block->adev; in psp_hw_fini()
3046 struct psp_context *psp = &adev->psp; in psp_hw_fini()
3048 if (psp->ta_fw) { in psp_hw_fini()
3055 if (adev->gmc.xgmi.num_physical_nodes > 1) in psp_hw_fini()
3070 struct amdgpu_device *adev = ip_block->adev; in psp_suspend()
3071 struct psp_context *psp = &adev->psp; in psp_suspend()
3073 if (adev->gmc.xgmi.num_physical_nodes > 1 && in psp_suspend()
3074 psp->xgmi_context.context.initialized) { in psp_suspend()
3077 dev_err(adev->dev, "Failed to terminate xgmi ta\n"); in psp_suspend()
3082 if (psp->ta_fw) { in psp_suspend()
3085 dev_err(adev->dev, "Failed to terminate ras ta\n"); in psp_suspend()
3090 dev_err(adev->dev, "Failed to terminate hdcp ta\n"); in psp_suspend()
3095 dev_err(adev->dev, "Failed to terminate dtm ta\n"); in psp_suspend()
3100 dev_err(adev->dev, "Failed to terminate rap ta\n"); in psp_suspend()
3105 dev_err(adev->dev, "Failed to terminate securedisplay ta\n"); in psp_suspend()
3112 dev_err(adev->dev, "Failed to terminate asd\n"); in psp_suspend()
3118 dev_err(adev->dev, "Failed to terminate tmr\n"); in psp_suspend()
3124 dev_err(adev->dev, "PSP ring stop failed\n"); in psp_suspend()
3133 struct amdgpu_device *adev = ip_block->adev; in psp_resume()
3134 struct psp_context *psp = &adev->psp; in psp_resume()
3136 dev_info(adev->dev, "PSP is resuming...\n"); in psp_resume()
3138 if (psp->mem_train_ctx.enable_mem_training) { in psp_resume()
3141 dev_err(adev->dev, "Failed to process memory training!\n"); in psp_resume()
3146 mutex_lock(&adev->firmware.mutex); in psp_resume()
3162 dev_err(adev->dev, "PSP load asd failed!\n"); in psp_resume()
3168 dev_err(adev->dev, "PSP load RL failed!\n"); in psp_resume()
3172 if (adev->gmc.xgmi.num_physical_nodes > 1) { in psp_resume()
3178 dev_err(psp->adev->dev, in psp_resume()
3182 if (psp->ta_fw) { in psp_resume()
3185 dev_err(psp->adev->dev, in psp_resume()
3190 dev_err(psp->adev->dev, in psp_resume()
3195 dev_err(psp->adev->dev, in psp_resume()
3200 dev_err(psp->adev->dev, in psp_resume()
3205 dev_err(psp->adev->dev, in psp_resume()
3209 mutex_unlock(&adev->firmware.mutex); in psp_resume()
3214 dev_err(adev->dev, "PSP resume failed\n"); in psp_resume()
3215 mutex_unlock(&adev->firmware.mutex); in psp_resume()
3223 if (adev->firmware.load_type != AMDGPU_FW_LOAD_PSP) in psp_gpu_reset()
3226 mutex_lock(&adev->psp.mutex); in psp_gpu_reset()
3227 ret = psp_mode1_reset(&adev->psp); in psp_gpu_reset()
3228 mutex_unlock(&adev->psp.mutex); in psp_gpu_reset()
3238 cmd->cmd_id = GFX_CMD_ID_AUTOLOAD_RLC; in psp_rlc_autoload_start()
3241 psp->fence_buf_mc_addr); in psp_rlc_autoload_start()
3255 struct psp_ring *ring = &psp->km_ring; in psp_ring_cmd_submit()
3256 struct psp_gfx_rb_frame *ring_buffer_start = ring->ring_mem; in psp_ring_cmd_submit()
3258 ring->ring_size / sizeof(struct psp_gfx_rb_frame) - 1; in psp_ring_cmd_submit()
3259 struct amdgpu_device *adev = psp->adev; in psp_ring_cmd_submit()
3260 uint32_t ring_size_dw = ring->ring_size / 4; in psp_ring_cmd_submit()
3275 dev_err(adev->dev, in psp_ring_cmd_submit()
3278 dev_err(adev->dev, in psp_ring_cmd_submit()
3280 return -EINVAL; in psp_ring_cmd_submit()
3287 write_frame->cmd_buf_addr_hi = upper_32_bits(cmd_buf_mc_addr); in psp_ring_cmd_submit()
3288 write_frame->cmd_buf_addr_lo = lower_32_bits(cmd_buf_mc_addr); in psp_ring_cmd_submit()
3289 write_frame->fence_addr_hi = upper_32_bits(fence_mc_addr); in psp_ring_cmd_submit()
3290 write_frame->fence_addr_lo = lower_32_bits(fence_mc_addr); in psp_ring_cmd_submit()
3291 write_frame->fence_value = index; in psp_ring_cmd_submit()
3302 struct amdgpu_device *adev = psp->adev; in psp_init_asd_microcode()
3306 err = amdgpu_ucode_request(adev, &adev->psp.asd_fw, AMDGPU_UCODE_REQUIRED, in psp_init_asd_microcode()
3311 asd_hdr = (const struct psp_firmware_header_v1_0 *)adev->psp.asd_fw->data; in psp_init_asd_microcode()
3312 adev->psp.asd_context.bin_desc.fw_version = le32_to_cpu(asd_hdr->header.ucode_version); in psp_init_asd_microcode()
3313 adev->psp.asd_context.bin_desc.feature_version = le32_to_cpu(asd_hdr->sos.fw_version); in psp_init_asd_microcode()
3314 adev->psp.asd_context.bin_desc.size_bytes = le32_to_cpu(asd_hdr->header.ucode_size_bytes); in psp_init_asd_microcode()
3315 adev->psp.asd_context.bin_desc.start_addr = (uint8_t *)asd_hdr + in psp_init_asd_microcode()
3316 le32_to_cpu(asd_hdr->header.ucode_array_offset_bytes); in psp_init_asd_microcode()
3319 amdgpu_ucode_release(&adev->psp.asd_fw); in psp_init_asd_microcode()
3325 struct amdgpu_device *adev = psp->adev; in psp_init_toc_microcode()
3329 err = amdgpu_ucode_request(adev, &adev->psp.toc_fw, AMDGPU_UCODE_REQUIRED, in psp_init_toc_microcode()
3334 toc_hdr = (const struct psp_firmware_header_v1_0 *)adev->psp.toc_fw->data; in psp_init_toc_microcode()
3335 adev->psp.toc.fw_version = le32_to_cpu(toc_hdr->header.ucode_version); in psp_init_toc_microcode()
3336 adev->psp.toc.feature_version = le32_to_cpu(toc_hdr->sos.fw_version); in psp_init_toc_microcode()
3337 adev->psp.toc.size_bytes = le32_to_cpu(toc_hdr->header.ucode_size_bytes); in psp_init_toc_microcode()
3338 adev->psp.toc.start_addr = (uint8_t *)toc_hdr + in psp_init_toc_microcode()
3339 le32_to_cpu(toc_hdr->header.ucode_array_offset_bytes); in psp_init_toc_microcode()
3342 amdgpu_ucode_release(&adev->psp.toc_fw); in psp_init_toc_microcode()
3353 return -EINVAL; in parse_sos_bin_descriptor()
3356 le32_to_cpu(desc->offset_bytes) + in parse_sos_bin_descriptor()
3357 le32_to_cpu(sos_hdr->header.ucode_array_offset_bytes); in parse_sos_bin_descriptor()
3359 switch (desc->fw_type) { in parse_sos_bin_descriptor()
3361 psp->sos.fw_version = le32_to_cpu(desc->fw_version); in parse_sos_bin_descriptor()
3362 psp->sos.feature_version = le32_to_cpu(desc->fw_version); in parse_sos_bin_descriptor()
3363 psp->sos.size_bytes = le32_to_cpu(desc->size_bytes); in parse_sos_bin_descriptor()
3364 psp->sos.start_addr = ucode_start_addr; in parse_sos_bin_descriptor()
3367 psp->sys.fw_version = le32_to_cpu(desc->fw_version); in parse_sos_bin_descriptor()
3368 psp->sys.feature_version = le32_to_cpu(desc->fw_version); in parse_sos_bin_descriptor()
3369 psp->sys.size_bytes = le32_to_cpu(desc->size_bytes); in parse_sos_bin_descriptor()
3370 psp->sys.start_addr = ucode_start_addr; in parse_sos_bin_descriptor()
3373 psp->kdb.fw_version = le32_to_cpu(desc->fw_version); in parse_sos_bin_descriptor()
3374 psp->kdb.feature_version = le32_to_cpu(desc->fw_version); in parse_sos_bin_descriptor()
3375 psp->kdb.size_bytes = le32_to_cpu(desc->size_bytes); in parse_sos_bin_descriptor()
3376 psp->kdb.start_addr = ucode_start_addr; in parse_sos_bin_descriptor()
3379 psp->toc.fw_version = le32_to_cpu(desc->fw_version); in parse_sos_bin_descriptor()
3380 psp->toc.feature_version = le32_to_cpu(desc->fw_version); in parse_sos_bin_descriptor()
3381 psp->toc.size_bytes = le32_to_cpu(desc->size_bytes); in parse_sos_bin_descriptor()
3382 psp->toc.start_addr = ucode_start_addr; in parse_sos_bin_descriptor()
3385 psp->spl.fw_version = le32_to_cpu(desc->fw_version); in parse_sos_bin_descriptor()
3386 psp->spl.feature_version = le32_to_cpu(desc->fw_version); in parse_sos_bin_descriptor()
3387 psp->spl.size_bytes = le32_to_cpu(desc->size_bytes); in parse_sos_bin_descriptor()
3388 psp->spl.start_addr = ucode_start_addr; in parse_sos_bin_descriptor()
3391 psp->rl.fw_version = le32_to_cpu(desc->fw_version); in parse_sos_bin_descriptor()
3392 psp->rl.feature_version = le32_to_cpu(desc->fw_version); in parse_sos_bin_descriptor()
3393 psp->rl.size_bytes = le32_to_cpu(desc->size_bytes); in parse_sos_bin_descriptor()
3394 psp->rl.start_addr = ucode_start_addr; in parse_sos_bin_descriptor()
3397 psp->soc_drv.fw_version = le32_to_cpu(desc->fw_version); in parse_sos_bin_descriptor()
3398 psp->soc_drv.feature_version = le32_to_cpu(desc->fw_version); in parse_sos_bin_descriptor()
3399 psp->soc_drv.size_bytes = le32_to_cpu(desc->size_bytes); in parse_sos_bin_descriptor()
3400 psp->soc_drv.start_addr = ucode_start_addr; in parse_sos_bin_descriptor()
3403 psp->intf_drv.fw_version = le32_to_cpu(desc->fw_version); in parse_sos_bin_descriptor()
3404 psp->intf_drv.feature_version = le32_to_cpu(desc->fw_version); in parse_sos_bin_descriptor()
3405 psp->intf_drv.size_bytes = le32_to_cpu(desc->size_bytes); in parse_sos_bin_descriptor()
3406 psp->intf_drv.start_addr = ucode_start_addr; in parse_sos_bin_descriptor()
3409 psp->dbg_drv.fw_version = le32_to_cpu(desc->fw_version); in parse_sos_bin_descriptor()
3410 psp->dbg_drv.feature_version = le32_to_cpu(desc->fw_version); in parse_sos_bin_descriptor()
3411 psp->dbg_drv.size_bytes = le32_to_cpu(desc->size_bytes); in parse_sos_bin_descriptor()
3412 psp->dbg_drv.start_addr = ucode_start_addr; in parse_sos_bin_descriptor()
3415 psp->ras_drv.fw_version = le32_to_cpu(desc->fw_version); in parse_sos_bin_descriptor()
3416 psp->ras_drv.feature_version = le32_to_cpu(desc->fw_version); in parse_sos_bin_descriptor()
3417 psp->ras_drv.size_bytes = le32_to_cpu(desc->size_bytes); in parse_sos_bin_descriptor()
3418 psp->ras_drv.start_addr = ucode_start_addr; in parse_sos_bin_descriptor()
3421 psp->ipkeymgr_drv.fw_version = le32_to_cpu(desc->fw_version); in parse_sos_bin_descriptor()
3422 psp->ipkeymgr_drv.feature_version = le32_to_cpu(desc->fw_version); in parse_sos_bin_descriptor()
3423 psp->ipkeymgr_drv.size_bytes = le32_to_cpu(desc->size_bytes); in parse_sos_bin_descriptor()
3424 psp->ipkeymgr_drv.start_addr = ucode_start_addr; in parse_sos_bin_descriptor()
3427 psp->spdm_drv.fw_version = le32_to_cpu(desc->fw_version); in parse_sos_bin_descriptor()
3428 psp->spdm_drv.feature_version = le32_to_cpu(desc->fw_version); in parse_sos_bin_descriptor()
3429 psp->spdm_drv.size_bytes = le32_to_cpu(desc->size_bytes); in parse_sos_bin_descriptor()
3430 psp->spdm_drv.start_addr = ucode_start_addr; in parse_sos_bin_descriptor()
3433 dev_warn(psp->adev->dev, "Unsupported PSP FW type: %d\n", desc->fw_type); in parse_sos_bin_descriptor()
3446 sos_hdr = (const struct psp_firmware_header_v1_0 *)adev->psp.sos_fw->data; in psp_init_sos_base_fw()
3448 le32_to_cpu(sos_hdr->header.ucode_array_offset_bytes); in psp_init_sos_base_fw()
3450 if (adev->gmc.xgmi.connected_to_cpu || in psp_init_sos_base_fw()
3452 adev->psp.sos.fw_version = le32_to_cpu(sos_hdr->header.ucode_version); in psp_init_sos_base_fw()
3453 adev->psp.sos.feature_version = le32_to_cpu(sos_hdr->sos.fw_version); in psp_init_sos_base_fw()
3455 adev->psp.sys.size_bytes = le32_to_cpu(sos_hdr->sos.offset_bytes); in psp_init_sos_base_fw()
3456 adev->psp.sys.start_addr = ucode_array_start_addr; in psp_init_sos_base_fw()
3458 adev->psp.sos.size_bytes = le32_to_cpu(sos_hdr->sos.size_bytes); in psp_init_sos_base_fw()
3459 adev->psp.sos.start_addr = ucode_array_start_addr + in psp_init_sos_base_fw()
3460 le32_to_cpu(sos_hdr->sos.offset_bytes); in psp_init_sos_base_fw()
3463 sos_hdr_v1_3 = (const struct psp_firmware_header_v1_3 *)adev->psp.sos_fw->data; in psp_init_sos_base_fw()
3465 adev->psp.sos.fw_version = le32_to_cpu(sos_hdr_v1_3->sos_aux.fw_version); in psp_init_sos_base_fw()
3466 adev->psp.sos.feature_version = le32_to_cpu(sos_hdr_v1_3->sos_aux.fw_version); in psp_init_sos_base_fw()
3468 adev->psp.sys.size_bytes = le32_to_cpu(sos_hdr_v1_3->sys_drv_aux.size_bytes); in psp_init_sos_base_fw()
3469 adev->psp.sys.start_addr = ucode_array_start_addr + in psp_init_sos_base_fw()
3470 le32_to_cpu(sos_hdr_v1_3->sys_drv_aux.offset_bytes); in psp_init_sos_base_fw()
3472 adev->psp.sos.size_bytes = le32_to_cpu(sos_hdr_v1_3->sos_aux.size_bytes); in psp_init_sos_base_fw()
3473 adev->psp.sos.start_addr = ucode_array_start_addr + in psp_init_sos_base_fw()
3474 le32_to_cpu(sos_hdr_v1_3->sos_aux.offset_bytes); in psp_init_sos_base_fw()
3477 if ((adev->psp.sys.size_bytes == 0) || (adev->psp.sos.size_bytes == 0)) { in psp_init_sos_base_fw()
3478 dev_warn(adev->dev, "PSP SOS FW not available"); in psp_init_sos_base_fw()
3479 return -EINVAL; in psp_init_sos_base_fw()
3487 struct amdgpu_device *adev = psp->adev; in psp_init_sos_microcode()
3499 err = amdgpu_ucode_request(adev, &adev->psp.sos_fw, AMDGPU_UCODE_REQUIRED, in psp_init_sos_microcode()
3504 sos_hdr = (const struct psp_firmware_header_v1_0 *)adev->psp.sos_fw->data; in psp_init_sos_microcode()
3506 le32_to_cpu(sos_hdr->header.ucode_array_offset_bytes); in psp_init_sos_microcode()
3507 amdgpu_ucode_print_psp_hdr(&sos_hdr->header); in psp_init_sos_microcode()
3509 switch (sos_hdr->header.header_version_major) { in psp_init_sos_microcode()
3515 if (sos_hdr->header.header_version_minor == 1) { in psp_init_sos_microcode()
3516 sos_hdr_v1_1 = (const struct psp_firmware_header_v1_1 *)adev->psp.sos_fw->data; in psp_init_sos_microcode()
3517 adev->psp.toc.size_bytes = le32_to_cpu(sos_hdr_v1_1->toc.size_bytes); in psp_init_sos_microcode()
3518 adev->psp.toc.start_addr = (uint8_t *)adev->psp.sys.start_addr + in psp_init_sos_microcode()
3519 le32_to_cpu(sos_hdr_v1_1->toc.offset_bytes); in psp_init_sos_microcode()
3520 adev->psp.kdb.size_bytes = le32_to_cpu(sos_hdr_v1_1->kdb.size_bytes); in psp_init_sos_microcode()
3521 adev->psp.kdb.start_addr = (uint8_t *)adev->psp.sys.start_addr + in psp_init_sos_microcode()
3522 le32_to_cpu(sos_hdr_v1_1->kdb.offset_bytes); in psp_init_sos_microcode()
3524 if (sos_hdr->header.header_version_minor == 2) { in psp_init_sos_microcode()
3525 sos_hdr_v1_2 = (const struct psp_firmware_header_v1_2 *)adev->psp.sos_fw->data; in psp_init_sos_microcode()
3526 adev->psp.kdb.size_bytes = le32_to_cpu(sos_hdr_v1_2->kdb.size_bytes); in psp_init_sos_microcode()
3527 adev->psp.kdb.start_addr = (uint8_t *)adev->psp.sys.start_addr + in psp_init_sos_microcode()
3528 le32_to_cpu(sos_hdr_v1_2->kdb.offset_bytes); in psp_init_sos_microcode()
3530 if (sos_hdr->header.header_version_minor == 3) { in psp_init_sos_microcode()
3531 sos_hdr_v1_3 = (const struct psp_firmware_header_v1_3 *)adev->psp.sos_fw->data; in psp_init_sos_microcode()
3532 adev->psp.toc.size_bytes = le32_to_cpu(sos_hdr_v1_3->v1_1.toc.size_bytes); in psp_init_sos_microcode()
3533 adev->psp.toc.start_addr = ucode_array_start_addr + in psp_init_sos_microcode()
3534 le32_to_cpu(sos_hdr_v1_3->v1_1.toc.offset_bytes); in psp_init_sos_microcode()
3535 adev->psp.kdb.size_bytes = le32_to_cpu(sos_hdr_v1_3->v1_1.kdb.size_bytes); in psp_init_sos_microcode()
3536 adev->psp.kdb.start_addr = ucode_array_start_addr + in psp_init_sos_microcode()
3537 le32_to_cpu(sos_hdr_v1_3->v1_1.kdb.offset_bytes); in psp_init_sos_microcode()
3538 adev->psp.spl.size_bytes = le32_to_cpu(sos_hdr_v1_3->spl.size_bytes); in psp_init_sos_microcode()
3539 adev->psp.spl.start_addr = ucode_array_start_addr + in psp_init_sos_microcode()
3540 le32_to_cpu(sos_hdr_v1_3->spl.offset_bytes); in psp_init_sos_microcode()
3541 adev->psp.rl.size_bytes = le32_to_cpu(sos_hdr_v1_3->rl.size_bytes); in psp_init_sos_microcode()
3542 adev->psp.rl.start_addr = ucode_array_start_addr + in psp_init_sos_microcode()
3543 le32_to_cpu(sos_hdr_v1_3->rl.offset_bytes); in psp_init_sos_microcode()
3547 sos_hdr_v2_0 = (const struct psp_firmware_header_v2_0 *)adev->psp.sos_fw->data; in psp_init_sos_microcode()
3549 fw_bin_count = le32_to_cpu(sos_hdr_v2_0->psp_fw_bin_count); in psp_init_sos_microcode()
3552 dev_err(adev->dev, "packed SOS count exceeds maximum limit\n"); in psp_init_sos_microcode()
3553 err = -EINVAL; in psp_init_sos_microcode()
3557 if (sos_hdr_v2_0->header.header_version_minor == 1) { in psp_init_sos_microcode()
3558 sos_hdr_v2_1 = (const struct psp_firmware_header_v2_1 *)adev->psp.sos_fw->data; in psp_init_sos_microcode()
3560 fw_bin = sos_hdr_v2_1->psp_fw_bin; in psp_init_sos_microcode()
3563 start_index = le32_to_cpu(sos_hdr_v2_1->psp_aux_fw_bin_index); in psp_init_sos_microcode()
3565 fw_bin_count -= le32_to_cpu(sos_hdr_v2_1->psp_aux_fw_bin_index); in psp_init_sos_microcode()
3568 fw_bin = sos_hdr_v2_0->psp_fw_bin; in psp_init_sos_microcode()
3579 dev_err(adev->dev, in psp_init_sos_microcode()
3580 "unsupported psp sos firmware\n"); in psp_init_sos_microcode()
3581 err = -EINVAL; in psp_init_sos_microcode()
3587 amdgpu_ucode_release(&adev->psp.sos_fw); in psp_init_sos_microcode()
3595 struct amdgpu_device *adev = psp->adev; in is_ta_fw_applicable()
3598 switch (desc->fw_type) { in is_ta_fw_applicable()
3606 fw_version = le32_to_cpu(desc->fw_version); in is_ta_fw_applicable()
3608 if (adev->flags & AMD_IS_APU && in is_ta_fw_applicable()
3610 return desc->fw_type == TA_FW_TYPE_PSP_XGMI_AUX; in is_ta_fw_applicable()
3612 return desc->fw_type == TA_FW_TYPE_PSP_XGMI; in is_ta_fw_applicable()
3629 return -EINVAL; in parse_ta_bin_descriptor()
3635 le32_to_cpu(desc->offset_bytes) + in parse_ta_bin_descriptor()
3636 le32_to_cpu(ta_hdr->header.ucode_array_offset_bytes); in parse_ta_bin_descriptor()
3638 switch (desc->fw_type) { in parse_ta_bin_descriptor()
3640 psp->asd_context.bin_desc.fw_version = le32_to_cpu(desc->fw_version); in parse_ta_bin_descriptor()
3641 psp->asd_context.bin_desc.feature_version = le32_to_cpu(desc->fw_version); in parse_ta_bin_descriptor()
3642 psp->asd_context.bin_desc.size_bytes = le32_to_cpu(desc->size_bytes); in parse_ta_bin_descriptor()
3643 psp->asd_context.bin_desc.start_addr = ucode_start_addr; in parse_ta_bin_descriptor()
3647 psp->xgmi_context.context.bin_desc.fw_version = le32_to_cpu(desc->fw_version); in parse_ta_bin_descriptor()
3648 psp->xgmi_context.context.bin_desc.size_bytes = le32_to_cpu(desc->size_bytes); in parse_ta_bin_descriptor()
3649 psp->xgmi_context.context.bin_desc.start_addr = ucode_start_addr; in parse_ta_bin_descriptor()
3652 psp->ras_context.context.bin_desc.fw_version = le32_to_cpu(desc->fw_version); in parse_ta_bin_descriptor()
3653 psp->ras_context.context.bin_desc.size_bytes = le32_to_cpu(desc->size_bytes); in parse_ta_bin_descriptor()
3654 psp->ras_context.context.bin_desc.start_addr = ucode_start_addr; in parse_ta_bin_descriptor()
3657 psp->hdcp_context.context.bin_desc.fw_version = le32_to_cpu(desc->fw_version); in parse_ta_bin_descriptor()
3658 psp->hdcp_context.context.bin_desc.size_bytes = le32_to_cpu(desc->size_bytes); in parse_ta_bin_descriptor()
3659 psp->hdcp_context.context.bin_desc.start_addr = ucode_start_addr; in parse_ta_bin_descriptor()
3662 psp->dtm_context.context.bin_desc.fw_version = le32_to_cpu(desc->fw_version); in parse_ta_bin_descriptor()
3663 psp->dtm_context.context.bin_desc.size_bytes = le32_to_cpu(desc->size_bytes); in parse_ta_bin_descriptor()
3664 psp->dtm_context.context.bin_desc.start_addr = ucode_start_addr; in parse_ta_bin_descriptor()
3667 psp->rap_context.context.bin_desc.fw_version = le32_to_cpu(desc->fw_version); in parse_ta_bin_descriptor()
3668 psp->rap_context.context.bin_desc.size_bytes = le32_to_cpu(desc->size_bytes); in parse_ta_bin_descriptor()
3669 psp->rap_context.context.bin_desc.start_addr = ucode_start_addr; in parse_ta_bin_descriptor()
3672 psp->securedisplay_context.context.bin_desc.fw_version = in parse_ta_bin_descriptor()
3673 le32_to_cpu(desc->fw_version); in parse_ta_bin_descriptor()
3674 psp->securedisplay_context.context.bin_desc.size_bytes = in parse_ta_bin_descriptor()
3675 le32_to_cpu(desc->size_bytes); in parse_ta_bin_descriptor()
3676 psp->securedisplay_context.context.bin_desc.start_addr = in parse_ta_bin_descriptor()
3680 dev_warn(psp->adev->dev, "Unsupported TA type: %d\n", desc->fw_type); in parse_ta_bin_descriptor()
3690 struct amdgpu_device *adev = psp->adev; in parse_ta_v1_microcode()
3692 ta_hdr = (const struct ta_firmware_header_v1_0 *) adev->psp.ta_fw->data; in parse_ta_v1_microcode()
3694 if (le16_to_cpu(ta_hdr->header.header_version_major) != 1) in parse_ta_v1_microcode()
3695 return -EINVAL; in parse_ta_v1_microcode()
3697 adev->psp.xgmi_context.context.bin_desc.fw_version = in parse_ta_v1_microcode()
3698 le32_to_cpu(ta_hdr->xgmi.fw_version); in parse_ta_v1_microcode()
3699 adev->psp.xgmi_context.context.bin_desc.size_bytes = in parse_ta_v1_microcode()
3700 le32_to_cpu(ta_hdr->xgmi.size_bytes); in parse_ta_v1_microcode()
3701 adev->psp.xgmi_context.context.bin_desc.start_addr = in parse_ta_v1_microcode()
3703 le32_to_cpu(ta_hdr->header.ucode_array_offset_bytes); in parse_ta_v1_microcode()
3705 adev->psp.ras_context.context.bin_desc.fw_version = in parse_ta_v1_microcode()
3706 le32_to_cpu(ta_hdr->ras.fw_version); in parse_ta_v1_microcode()
3707 adev->psp.ras_context.context.bin_desc.size_bytes = in parse_ta_v1_microcode()
3708 le32_to_cpu(ta_hdr->ras.size_bytes); in parse_ta_v1_microcode()
3709 adev->psp.ras_context.context.bin_desc.start_addr = in parse_ta_v1_microcode()
3710 (uint8_t *)adev->psp.xgmi_context.context.bin_desc.start_addr + in parse_ta_v1_microcode()
3711 le32_to_cpu(ta_hdr->ras.offset_bytes); in parse_ta_v1_microcode()
3713 adev->psp.hdcp_context.context.bin_desc.fw_version = in parse_ta_v1_microcode()
3714 le32_to_cpu(ta_hdr->hdcp.fw_version); in parse_ta_v1_microcode()
3715 adev->psp.hdcp_context.context.bin_desc.size_bytes = in parse_ta_v1_microcode()
3716 le32_to_cpu(ta_hdr->hdcp.size_bytes); in parse_ta_v1_microcode()
3717 adev->psp.hdcp_context.context.bin_desc.start_addr = in parse_ta_v1_microcode()
3719 le32_to_cpu(ta_hdr->header.ucode_array_offset_bytes); in parse_ta_v1_microcode()
3721 adev->psp.dtm_context.context.bin_desc.fw_version = in parse_ta_v1_microcode()
3722 le32_to_cpu(ta_hdr->dtm.fw_version); in parse_ta_v1_microcode()
3723 adev->psp.dtm_context.context.bin_desc.size_bytes = in parse_ta_v1_microcode()
3724 le32_to_cpu(ta_hdr->dtm.size_bytes); in parse_ta_v1_microcode()
3725 adev->psp.dtm_context.context.bin_desc.start_addr = in parse_ta_v1_microcode()
3726 (uint8_t *)adev->psp.hdcp_context.context.bin_desc.start_addr + in parse_ta_v1_microcode()
3727 le32_to_cpu(ta_hdr->dtm.offset_bytes); in parse_ta_v1_microcode()
3729 adev->psp.securedisplay_context.context.bin_desc.fw_version = in parse_ta_v1_microcode()
3730 le32_to_cpu(ta_hdr->securedisplay.fw_version); in parse_ta_v1_microcode()
3731 adev->psp.securedisplay_context.context.bin_desc.size_bytes = in parse_ta_v1_microcode()
3732 le32_to_cpu(ta_hdr->securedisplay.size_bytes); in parse_ta_v1_microcode()
3733 adev->psp.securedisplay_context.context.bin_desc.start_addr = in parse_ta_v1_microcode()
3734 (uint8_t *)adev->psp.hdcp_context.context.bin_desc.start_addr + in parse_ta_v1_microcode()
3735 le32_to_cpu(ta_hdr->securedisplay.offset_bytes); in parse_ta_v1_microcode()
3737 adev->psp.ta_fw_version = le32_to_cpu(ta_hdr->header.ucode_version); in parse_ta_v1_microcode()
3745 struct amdgpu_device *adev = psp->adev; in parse_ta_v2_microcode()
3749 ta_hdr = (const struct ta_firmware_header_v2_0 *)adev->psp.ta_fw->data; in parse_ta_v2_microcode()
3751 if (le16_to_cpu(ta_hdr->header.header_version_major) != 2) in parse_ta_v2_microcode()
3752 return -EINVAL; in parse_ta_v2_microcode()
3754 if (le32_to_cpu(ta_hdr->ta_fw_bin_count) >= UCODE_MAX_PSP_PACKAGING) { in parse_ta_v2_microcode()
3755 dev_err(adev->dev, "packed TA count exceeds maximum limit\n"); in parse_ta_v2_microcode()
3756 return -EINVAL; in parse_ta_v2_microcode()
3759 for (ta_index = 0; ta_index < le32_to_cpu(ta_hdr->ta_fw_bin_count); ta_index++) { in parse_ta_v2_microcode()
3761 &ta_hdr->ta_fw_bin[ta_index], in parse_ta_v2_microcode()
3773 struct amdgpu_device *adev = psp->adev; in psp_init_ta_microcode()
3776 err = amdgpu_ucode_request(adev, &adev->psp.ta_fw, AMDGPU_UCODE_REQUIRED, in psp_init_ta_microcode()
3781 hdr = (const struct common_firmware_header *)adev->psp.ta_fw->data; in psp_init_ta_microcode()
3782 switch (le16_to_cpu(hdr->header_version_major)) { in psp_init_ta_microcode()
3790 dev_err(adev->dev, "unsupported TA header version\n"); in psp_init_ta_microcode()
3791 err = -EINVAL; in psp_init_ta_microcode()
3795 amdgpu_ucode_release(&adev->psp.ta_fw); in psp_init_ta_microcode()
3802 struct amdgpu_device *adev = psp->adev; in psp_init_cap_microcode()
3808 dev_err(adev->dev, "cap microcode should only be loaded under SRIOV\n"); in psp_init_cap_microcode()
3809 return -EINVAL; in psp_init_cap_microcode()
3812 err = amdgpu_ucode_request(adev, &adev->psp.cap_fw, AMDGPU_UCODE_OPTIONAL, in psp_init_cap_microcode()
3815 if (err == -ENODEV) { in psp_init_cap_microcode()
3816 dev_warn(adev->dev, "cap microcode does not exist, skip\n"); in psp_init_cap_microcode()
3819 dev_err(adev->dev, "fail to initialize cap microcode\n"); in psp_init_cap_microcode()
3824 info = &adev->firmware.ucode[AMDGPU_UCODE_ID_CAP]; in psp_init_cap_microcode()
3825 info->ucode_id = AMDGPU_UCODE_ID_CAP; in psp_init_cap_microcode()
3826 info->fw = adev->psp.cap_fw; in psp_init_cap_microcode()
3828 adev->psp.cap_fw->data; in psp_init_cap_microcode()
3829 adev->firmware.fw_size += ALIGN( in psp_init_cap_microcode()
3830 le32_to_cpu(cap_hdr_v1_0->header.ucode_size_bytes), PAGE_SIZE); in psp_init_cap_microcode()
3831 adev->psp.cap_fw_version = le32_to_cpu(cap_hdr_v1_0->header.ucode_version); in psp_init_cap_microcode()
3832 adev->psp.cap_feature_version = le32_to_cpu(cap_hdr_v1_0->sos.fw_version); in psp_init_cap_microcode()
3833 adev->psp.cap_ucode_size = le32_to_cpu(cap_hdr_v1_0->header.ucode_size_bytes); in psp_init_cap_microcode()
3838 amdgpu_ucode_release(&adev->psp.cap_fw); in psp_init_cap_microcode()
3848 if (amdgpu_sriov_vf(psp->adev)) in psp_config_sq_perfmon()
3852 dev_err(psp->adev->dev, "invalid xcp_id %d\n", xcp_id); in psp_config_sq_perfmon()
3853 return -EINVAL; in psp_config_sq_perfmon()
3856 if (amdgpu_ip_version(psp->adev, MP0_HWIP, 0) != IP_VERSION(13, 0, 6)) { in psp_config_sq_perfmon()
3857 dev_err(psp->adev->dev, "Unsupported MP0 version 0x%x for CONFIG_SQ_PERFMON command\n", in psp_config_sq_perfmon()
3858 amdgpu_ip_version(psp->adev, MP0_HWIP, 0)); in psp_config_sq_perfmon()
3859 return -EINVAL; in psp_config_sq_perfmon()
3863 cmd->cmd_id = GFX_CMD_ID_CONFIG_SQ_PERFMON; in psp_config_sq_perfmon()
3864 cmd->cmd.config_sq_perfmon.gfx_xcp_mask = BIT_MASK(xcp_id); in psp_config_sq_perfmon()
3865 cmd->cmd.config_sq_perfmon.core_override = core_override_enable; in psp_config_sq_perfmon()
3866 cmd->cmd.config_sq_perfmon.reg_override = reg_override_enable; in psp_config_sq_perfmon()
3867 cmd->cmd.config_sq_perfmon.perfmon_override = perfmon_override_enable; in psp_config_sq_perfmon()
3869 ret = psp_cmd_submit_buf(psp, NULL, cmd, psp->fence_buf_mc_addr); in psp_config_sq_perfmon()
3871 dev_warn(psp->adev->dev, "PSP failed to config sq: xcp%d core%d reg%d perfmon%d\n", in psp_config_sq_perfmon()
3901 if (!ip_block || !ip_block->status.late_initialized) { in psp_usbc_pd_fw_sysfs_read()
3902 dev_info(adev->dev, "PSP block is not ready yet\n."); in psp_usbc_pd_fw_sysfs_read()
3903 return -EBUSY; in psp_usbc_pd_fw_sysfs_read()
3906 mutex_lock(&adev->psp.mutex); in psp_usbc_pd_fw_sysfs_read()
3907 ret = psp_read_usbc_pd_fw(&adev->psp, &fw_ver); in psp_usbc_pd_fw_sysfs_read()
3908 mutex_unlock(&adev->psp.mutex); in psp_usbc_pd_fw_sysfs_read()
3911 dev_err(adev->dev, "Failed to read USBC PD FW, err = %d\n", ret); in psp_usbc_pd_fw_sysfs_read()
3926 const struct firmware *usbc_pd_fw; in psp_usbc_pd_fw_sysfs_write()
3933 if (!ip_block || !ip_block->status.late_initialized) { in psp_usbc_pd_fw_sysfs_write()
3934 dev_err(adev->dev, "PSP block is not ready yet."); in psp_usbc_pd_fw_sysfs_write()
3935 return -EBUSY; in psp_usbc_pd_fw_sysfs_write()
3939 return -ENODEV; in psp_usbc_pd_fw_sysfs_write()
3947 ret = amdgpu_bo_create_kernel(adev, usbc_pd_fw->size, 0x100000, in psp_usbc_pd_fw_sysfs_write()
3955 memcpy_toio(fw_pri_cpu_addr, usbc_pd_fw->data, usbc_pd_fw->size); in psp_usbc_pd_fw_sysfs_write()
3957 mutex_lock(&adev->psp.mutex); in psp_usbc_pd_fw_sysfs_write()
3958 ret = psp_load_usbc_pd_fw(&adev->psp, fw_pri_mc_addr); in psp_usbc_pd_fw_sysfs_write()
3959 mutex_unlock(&adev->psp.mutex); in psp_usbc_pd_fw_sysfs_write()
3967 dev_err(adev->dev, "Failed to load USBC PD FW, err = %d", ret); in psp_usbc_pd_fw_sysfs_write()
3979 if (!drm_dev_enter(adev_to_drm(psp->adev), &idx)) in psp_copy_fw()
3982 memset(psp->fw_pri_buf, 0, PSP_1_MEG); in psp_copy_fw()
3983 memcpy(psp->fw_pri_buf, start_addr, bin_size); in psp_copy_fw()
3990 * Reading from this file will retrieve the USB-C PD firmware version. Writing to
4010 adev->psp.vbflash_done = false; in amdgpu_psp_vbflash_write()
4013 if (adev->psp.vbflash_image_size > AMD_VBIOS_FILE_MAX_SIZE_B) { in amdgpu_psp_vbflash_write()
4014 dev_err(adev->dev, "File size cannot exceed %u\n", AMD_VBIOS_FILE_MAX_SIZE_B); in amdgpu_psp_vbflash_write()
4015 kvfree(adev->psp.vbflash_tmp_buf); in amdgpu_psp_vbflash_write()
4016 adev->psp.vbflash_tmp_buf = NULL; in amdgpu_psp_vbflash_write()
4017 adev->psp.vbflash_image_size = 0; in amdgpu_psp_vbflash_write()
4018 return -ENOMEM; in amdgpu_psp_vbflash_write()
4022 if (!adev->psp.vbflash_tmp_buf) { in amdgpu_psp_vbflash_write()
4023 adev->psp.vbflash_tmp_buf = kvmalloc(AMD_VBIOS_FILE_MAX_SIZE_B, GFP_KERNEL); in amdgpu_psp_vbflash_write()
4024 if (!adev->psp.vbflash_tmp_buf) in amdgpu_psp_vbflash_write()
4025 return -ENOMEM; in amdgpu_psp_vbflash_write()
4028 mutex_lock(&adev->psp.mutex); in amdgpu_psp_vbflash_write()
4029 memcpy(adev->psp.vbflash_tmp_buf + pos, buffer, count); in amdgpu_psp_vbflash_write()
4030 adev->psp.vbflash_image_size += count; in amdgpu_psp_vbflash_write()
4031 mutex_unlock(&adev->psp.mutex); in amdgpu_psp_vbflash_write()
4033 dev_dbg(adev->dev, "IFWI staged for update\n"); in amdgpu_psp_vbflash_write()
4050 if (adev->psp.vbflash_image_size == 0) in amdgpu_psp_vbflash_read()
4051 return -EINVAL; in amdgpu_psp_vbflash_read()
4053 dev_dbg(adev->dev, "PSP IFWI flash process initiated\n"); in amdgpu_psp_vbflash_read()
4055 ret = amdgpu_bo_create_kernel(adev, adev->psp.vbflash_image_size, in amdgpu_psp_vbflash_read()
4064 memcpy_toio(fw_pri_cpu_addr, adev->psp.vbflash_tmp_buf, adev->psp.vbflash_image_size); in amdgpu_psp_vbflash_read()
4066 mutex_lock(&adev->psp.mutex); in amdgpu_psp_vbflash_read()
4067 ret = psp_update_spirom(&adev->psp, fw_pri_mc_addr); in amdgpu_psp_vbflash_read()
4068 mutex_unlock(&adev->psp.mutex); in amdgpu_psp_vbflash_read()
4073 kvfree(adev->psp.vbflash_tmp_buf); in amdgpu_psp_vbflash_read()
4074 adev->psp.vbflash_tmp_buf = NULL; in amdgpu_psp_vbflash_read()
4075 adev->psp.vbflash_image_size = 0; in amdgpu_psp_vbflash_read()
4078 dev_err(adev->dev, "Failed to load IFWI, err = %d\n", ret); in amdgpu_psp_vbflash_read()
4082 dev_dbg(adev->dev, "PSP IFWI flash process done\n"); in amdgpu_psp_vbflash_read()
4112 vbflash_status = psp_vbflash_status(&adev->psp); in amdgpu_psp_vbflash_status()
4113 if (!adev->psp.vbflash_done) in amdgpu_psp_vbflash_status()
4115 else if (adev->psp.vbflash_done && !(vbflash_status & 0x80000000)) in amdgpu_psp_vbflash_status()
4140 return adev->psp.sup_pd_fw_up ? 0660 : 0; in amdgpu_flash_attr_is_visible()
4142 return adev->psp.sup_ifwi_up ? 0440 : 0; in amdgpu_flash_attr_is_visible()
4153 return adev->psp.sup_ifwi_up ? 0660 : 0; in amdgpu_bin_flash_attr_is_visible()