246 struct amdgpu_virt {  struct
256 	const struct amdgpu_virt_ops	*ops;  argument
258 	struct amdgpu_virt_fw_reserve	fw_reserve;  argument
263 	struct amdgpu_virt_ras_err_handler_data *virt_eh_data;  argument
264 	bool ras_init_done;
265 	uint32_t reg_access;
268 	struct delayed_work vf2pf_work;
269 	uint32_t vf2pf_update_interval_ms;
270 	int vf2pf_update_retry_cnt;
273 	bool     is_mm_bw_enabled;
274 	uint32_t decode_max_dimension_pixels;
275 	uint32_t decode_max_frame_pixels;
276 	uint32_t encode_max_dimension_pixels;
277 	uint32_t encode_max_frame_pixels;
280 	uint32_t autoload_ucode_id;
283 	spinlock_t rlcg_reg_lock;
285 	union amd_sriov_ras_caps ras_en_caps;
286 	union amd_sriov_ras_caps ras_telemetry_en_caps;
288 	struct ratelimit_state ras_telemetry_rs;
289 	struct amd_sriov_ras_telemetry_error_count count_cache;