25  * DOC: atomic plane helpers
27  * The functions here are used by the atomic plane helper functions to
28  * implement legacy plane updates (i.e., drm_plane->update_plane() and
29  * drm_plane->disable_plane()).  This allows plane updates to use the
30  * atomic state infrastructure and perform plane updates as separate
58 				    struct intel_plane *plane)  in intel_plane_state_reset()  argument
62 	__drm_atomic_helper_plane_state_reset(&plane_state->uapi, &plane->base);  in intel_plane_state_reset()
70 	struct intel_plane *plane;  in intel_plane_alloc()  local
72 	plane = kzalloc(sizeof(*plane), GFP_KERNEL);  in intel_plane_alloc()
73 	if (!plane)  in intel_plane_alloc()
78 		kfree(plane);  in intel_plane_alloc()
82 	intel_plane_state_reset(plane_state, plane);  in intel_plane_alloc()
84 	plane->base.state = &plane_state->uapi;  in intel_plane_alloc()
86 	return plane;  in intel_plane_alloc()
89 void intel_plane_free(struct intel_plane *plane)  in intel_plane_free()  argument
91 	intel_plane_destroy_state(&plane->base, plane->base.state);  in intel_plane_free()
92 	kfree(plane);  in intel_plane_free()
96  * intel_plane_duplicate_state - duplicate plane state
97  * @plane: drm plane
99  * Allocates and returns a copy of the plane state (both common and
100  * Intel-specific) for the specified plane.
102  * Returns: The newly allocated plane state, or NULL on failure.
105 intel_plane_duplicate_state(struct drm_plane *plane)  in intel_plane_duplicate_state()  argument
109 	intel_state = to_intel_plane_state(plane->state);  in intel_plane_duplicate_state()
115 	__drm_atomic_helper_plane_duplicate_state(plane, &intel_state->uapi);  in intel_plane_duplicate_state()
129  * intel_plane_destroy_state - destroy plane state
130  * @plane: drm plane
133  * Destroys the plane state (both common and Intel-specific) for the
134  * specified plane.
137 intel_plane_destroy_state(struct drm_plane *plane,  in intel_plane_destroy_state()  argument
142 	drm_WARN_ON(plane->dev, plane_state->ggtt_vma);  in intel_plane_destroy_state()
143 	drm_WARN_ON(plane->dev, plane_state->dpt_vma);  in intel_plane_destroy_state()
151 bool intel_plane_needs_physical(struct intel_plane *plane)  in intel_plane_needs_physical()  argument
153 	struct drm_i915_private *i915 = to_i915(plane->base.dev);  in intel_plane_needs_physical()
155 	return plane->id == PLANE_CURSOR &&  in intel_plane_needs_physical()
182 	 * Note we don't check for plane visibility here as  in intel_plane_pixel_rate()
216 	struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);  in intel_plane_relative_data_rate()  local
221 	if (plane->id == PLANE_CURSOR)  in intel_plane_relative_data_rate()
229 	 * the 90/270 degree plane rotation cases (to match the  in intel_plane_relative_data_rate()
235 	/* UV plane does 1/2 pixel sub-sampling */  in intel_plane_relative_data_rate()
242 		skl_plane_relative_data_rate(crtc_state, plane, width, height,  in intel_plane_relative_data_rate()
253 			       struct intel_plane *plane,  in intel_plane_calc_min_cdclk()  argument
256 	struct drm_i915_private *dev_priv = to_i915(plane->base.dev);  in intel_plane_calc_min_cdclk()
258 		intel_atomic_get_new_plane_state(state, plane);  in intel_plane_calc_min_cdclk()
264 	if (!plane_state->uapi.visible || !plane->min_cdclk)  in intel_plane_calc_min_cdclk()
270 	new_crtc_state->min_cdclk[plane->id] =  in intel_plane_calc_min_cdclk()
271 		plane->min_cdclk(new_crtc_state, plane_state);  in intel_plane_calc_min_cdclk()
275 	 * the min cdclk for the plane doesn't increase.  in intel_plane_calc_min_cdclk()
277 	 * Ie. we only ever increase the cdclk due to plane  in intel_plane_calc_min_cdclk()
281 	if (new_crtc_state->min_cdclk[plane->id] <=  in intel_plane_calc_min_cdclk()
282 	    old_crtc_state->min_cdclk[plane->id])  in intel_plane_calc_min_cdclk()
293 	 * Ie. we only ever increase the cdclk due to plane  in intel_plane_calc_min_cdclk()
297 	if (new_crtc_state->min_cdclk[plane->id] <=  in intel_plane_calc_min_cdclk()
302 		    "[PLANE:%d:%s] min cdclk (%d kHz) > [CRTC:%d:%s] min cdclk (%d kHz)\n",  in intel_plane_calc_min_cdclk()
303 		    plane->base.base.id, plane->base.name,  in intel_plane_calc_min_cdclk()
304 		    new_crtc_state->min_cdclk[plane->id],  in intel_plane_calc_min_cdclk()
330 	 * indicates the plane is logically enabled on the uapi level.  in intel_plane_copy_uapi_to_hw_state()
365 	struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);  in intel_plane_set_invisible()  local
367 	crtc_state->active_planes &= ~BIT(plane->id);  in intel_plane_set_invisible()
368 	crtc_state->scaled_planes &= ~BIT(plane->id);  in intel_plane_set_invisible()
369 	crtc_state->nv12_planes &= ~BIT(plane->id);  in intel_plane_set_invisible()
370 	crtc_state->c8_planes &= ~BIT(plane->id);  in intel_plane_set_invisible()
371 	crtc_state->async_flip_planes &= ~BIT(plane->id);  in intel_plane_set_invisible()
372 	crtc_state->data_rate[plane->id] = 0;  in intel_plane_set_invisible()
373 	crtc_state->data_rate_y[plane->id] = 0;  in intel_plane_set_invisible()
374 	crtc_state->rel_data_rate[plane->id] = 0;  in intel_plane_set_invisible()
375 	crtc_state->rel_data_rate_y[plane->id] = 0;  in intel_plane_set_invisible()
376 	crtc_state->min_cdclk[plane->id] = 0;  in intel_plane_set_invisible()
391 static bool intel_plane_do_async_flip(struct intel_plane *plane,  in intel_plane_do_async_flip()  argument
395 	struct drm_i915_private *i915 = to_i915(plane->base.dev);  in intel_plane_do_async_flip()
397 	if (!plane->async_flip)  in intel_plane_do_async_flip()
423 	struct intel_plane *plane = to_intel_plane(new_plane_state->uapi.plane);  in i9xx_must_disable_cxsr()  local
430 	if (plane->id == PLANE_CURSOR)  in i9xx_must_disable_cxsr()
437 	/* Must disable CxSR around plane enable/disable */  in i9xx_must_disable_cxsr()
445 	 * Most plane control register updates are blocked while in CxSR.  in i9xx_must_disable_cxsr()
447 	 * Tiling mode is one exception where the primary plane can  in i9xx_must_disable_cxsr()
452 	if (plane->id == PLANE_PRIMARY) {  in i9xx_must_disable_cxsr()
464 	struct intel_plane *plane = to_intel_plane(new_plane_state->uapi.plane);  in ilk_must_disable_cxsr()  local
469 	if (plane->id == PLANE_CURSOR)  in ilk_must_disable_cxsr()
479 	 *  plane will be internally buffered and delayed while Big FIFO  in ilk_must_disable_cxsr()
491 	 * plane, not only sprite plane.  in ilk_must_disable_cxsr()
521 	struct intel_plane *plane = to_intel_plane(new_plane_state->uapi.plane);  in intel_plane_atomic_calc_changes()  local
529 	if (DISPLAY_VER(dev_priv) >= 9 && plane->id != PLANE_CURSOR) {  in intel_plane_atomic_calc_changes()
548 	 * per-plane wm computation to the .check_plane() hook, and  in intel_plane_atomic_calc_changes()
563 		       "[CRTC:%d:%s] with [PLANE:%d:%s] visible %i -> %i, off %i, on %i, ms %i\n",  in intel_plane_atomic_calc_changes()
565 		       plane->base.base.id, plane->base.name,  in intel_plane_atomic_calc_changes()
570 		new_crtc_state->fb_bits |= plane->frontbuffer_bit;  in intel_plane_atomic_calc_changes()
580 	if (intel_plane_do_async_flip(plane, old_crtc_state, new_crtc_state)) {  in intel_plane_atomic_calc_changes()
582 		new_crtc_state->async_flip_planes |= BIT(plane->id);  in intel_plane_atomic_calc_changes()
583 	} else if (plane->need_async_flip_toggle_wa &&  in intel_plane_atomic_calc_changes()
593 		new_crtc_state->async_flip_planes |= BIT(plane->id);  in intel_plane_atomic_calc_changes()
604 	struct intel_plane *plane = to_intel_plane(new_plane_state->uapi.plane);  in intel_plane_atomic_check_with_state()  local
609 	new_crtc_state->enabled_planes &= ~BIT(plane->id);  in intel_plane_atomic_check_with_state()
614 	ret = plane->check_plane(new_crtc_state, new_plane_state);  in intel_plane_atomic_check_with_state()
619 		new_crtc_state->enabled_planes |= BIT(plane->id);  in intel_plane_atomic_check_with_state()
623 		new_crtc_state->active_planes |= BIT(plane->id);  in intel_plane_atomic_check_with_state()
627 		new_crtc_state->scaled_planes |= BIT(plane->id);  in intel_plane_atomic_check_with_state()
631 		new_crtc_state->nv12_planes |= BIT(plane->id);  in intel_plane_atomic_check_with_state()
635 		new_crtc_state->c8_planes |= BIT(plane->id);  in intel_plane_atomic_check_with_state()
638 		new_crtc_state->update_planes |= BIT(plane->id);  in intel_plane_atomic_check_with_state()
642 		new_crtc_state->data_rate_y[plane->id] =  in intel_plane_atomic_check_with_state()
644 		new_crtc_state->data_rate[plane->id] =  in intel_plane_atomic_check_with_state()
647 		new_crtc_state->rel_data_rate_y[plane->id] =  in intel_plane_atomic_check_with_state()
650 		new_crtc_state->rel_data_rate[plane->id] =  in intel_plane_atomic_check_with_state()
654 		new_crtc_state->data_rate[plane->id] =  in intel_plane_atomic_check_with_state()
657 		new_crtc_state->rel_data_rate[plane->id] =  in intel_plane_atomic_check_with_state()
670 	struct intel_plane *plane;  in intel_crtc_get_plane()  local
672 	for_each_intel_plane_on_crtc(&i915->drm, crtc, plane) {  in intel_crtc_get_plane()
673 		if (plane->id == plane_id)  in intel_crtc_get_plane()
674 			return plane;  in intel_crtc_get_plane()
681 			     struct intel_plane *plane)  in intel_plane_atomic_check()  argument
685 		intel_atomic_get_new_plane_state(state, plane);  in intel_plane_atomic_check()
687 		intel_atomic_get_old_plane_state(state, plane);  in intel_plane_atomic_check()
689 	struct intel_crtc *crtc = intel_crtc_for_pipe(display, plane->pipe);  in intel_plane_atomic_check()
699 			intel_crtc_get_plane(primary_crtc, plane->id);  in intel_plane_atomic_check()
731 	struct intel_plane *plane;  in skl_next_plane_to_commit()  local
737 	for_each_new_intel_plane_in_state(state, plane, plane_state, i) {  in skl_next_plane_to_commit()
738 		enum plane_id plane_id = plane->id;  in skl_next_plane_to_commit()
740 		if (crtc->pipe != plane->pipe ||  in skl_next_plane_to_commit()
754 		return plane;  in skl_next_plane_to_commit()
764 			      struct intel_plane *plane,  in intel_plane_update_noarm()  argument
770 	trace_intel_plane_update_noarm(plane, crtc);  in intel_plane_update_noarm()
772 	if (plane->update_noarm)  in intel_plane_update_noarm()
773 		plane->update_noarm(dsb, plane, crtc_state, plane_state);  in intel_plane_update_noarm()
777 			    struct intel_plane *plane,  in intel_plane_async_flip()  argument
784 	trace_intel_plane_async_flip(plane, crtc, async_flip);  in intel_plane_async_flip()
785 	plane->async_flip(dsb, plane, crtc_state, plane_state, async_flip);  in intel_plane_async_flip()
789 			    struct intel_plane *plane,  in intel_plane_update_arm()  argument
795 	if (crtc_state->do_async_flip && plane->async_flip) {  in intel_plane_update_arm()
796 		intel_plane_async_flip(dsb, plane, crtc_state, plane_state, true);  in intel_plane_update_arm()
800 	trace_intel_plane_update_arm(plane, crtc);  in intel_plane_update_arm()
801 	plane->update_arm(dsb, plane, crtc_state, plane_state);  in intel_plane_update_arm()
805 			     struct intel_plane *plane,  in intel_plane_disable_arm()  argument
810 	trace_intel_plane_disable_arm(plane, crtc);  in intel_plane_disable_arm()
811 	plane->disable_arm(dsb, plane, crtc_state);  in intel_plane_disable_arm()
822 	struct intel_plane *plane;  in intel_crtc_planes_update_noarm()  local
832 	for_each_new_intel_plane_in_state(state, plane, new_plane_state, i) {  in intel_crtc_planes_update_noarm()
833 		if (crtc->pipe != plane->pipe ||  in intel_crtc_planes_update_noarm()
834 		    !(update_mask & BIT(plane->id)))  in intel_crtc_planes_update_noarm()
840 			intel_plane_update_noarm(dsb, plane,  in intel_crtc_planes_update_noarm()
856 	struct intel_plane *plane;  in skl_crtc_planes_update_arm()  local
863 	while ((plane = skl_next_plane_to_commit(state, crtc, ddb, ddb_y, &update_mask))) {  in skl_crtc_planes_update_arm()
865 			intel_atomic_get_new_plane_state(state, plane);  in skl_crtc_planes_update_arm()
873 			intel_plane_update_arm(dsb, plane, new_crtc_state, new_plane_state);  in skl_crtc_planes_update_arm()
875 			intel_plane_disable_arm(dsb, plane, new_crtc_state);  in skl_crtc_planes_update_arm()
887 	struct intel_plane *plane;  in i9xx_crtc_planes_update_arm()  local
890 	for_each_new_intel_plane_in_state(state, plane, new_plane_state, i) {  in i9xx_crtc_planes_update_arm()
891 		if (crtc->pipe != plane->pipe ||  in i9xx_crtc_planes_update_arm()
892 		    !(update_mask & BIT(plane->id)))  in i9xx_crtc_planes_update_arm()
900 			intel_plane_update_arm(dsb, plane, new_crtc_state, new_plane_state);  in i9xx_crtc_planes_update_arm()
902 			intel_plane_disable_arm(dsb, plane, new_crtc_state);  in i9xx_crtc_planes_update_arm()
923 	struct drm_i915_private *i915 = to_i915(plane_state->uapi.plane->dev);  in intel_atomic_plane_check_clipping()
942 		drm_dbg_kms(&i915->drm, "Invalid scaling of plane\n");  in intel_atomic_plane_check_clipping()
958 		drm_dbg_kms(&i915->drm, "Plane must cover entire CRTC\n");  in intel_atomic_plane_check_clipping()
964 	/* final plane coordinates will be relative to the plane's pipe */  in intel_atomic_plane_check_clipping()
972 	struct drm_i915_private *i915 = to_i915(plane_state->uapi.plane->dev);  in intel_plane_check_src_coordinates()
1078  * intel_prepare_plane_fb - Prepare fb for usage on plane
1079  * @_plane: drm plane to prepare for
1080  * @_new_plane_state: the plane state being prepared
1082  * Prepares a framebuffer for usage on a display plane.  Generally this
1094 	struct intel_plane *plane = to_intel_plane(_plane);  in intel_prepare_plane_fb()  local
1099 	struct drm_i915_private *dev_priv = to_i915(plane->base.dev);  in intel_prepare_plane_fb()
1101 		intel_atomic_get_old_plane_state(state, plane);  in intel_prepare_plane_fb()
1137 	ret = drm_gem_plane_helper_prepare_fb(&plane->base, &new_plane_state->uapi);  in intel_prepare_plane_fb()
1168  * intel_cleanup_plane_fb - Cleans up an fb after plane use
1169  * @plane: drm plane to clean up for
1172  * Cleans up a framebuffer that has just been removed from a plane.
1175 intel_cleanup_plane_fb(struct drm_plane *plane,  in intel_cleanup_plane_fb()  argument
1182 	struct drm_i915_private *dev_priv = to_i915(plane->dev);  in intel_cleanup_plane_fb()
1198 void intel_plane_helper_add(struct intel_plane *plane)  in intel_plane_helper_add()  argument
1200 	drm_plane_helper_add(&plane->base, &intel_plane_helper_funcs);  in intel_plane_helper_add()