90 bool intel_crt_port_enabled(struct intel_display *display,  in intel_crt_port_enabled()  argument
93 	struct drm_i915_private *dev_priv = to_i915(display->drm);  in intel_crt_port_enabled()
96 	val = intel_de_read(display, adpa_reg);  in intel_crt_port_enabled()
110 	struct intel_display *display = to_intel_display(encoder);  in intel_crt_get_hw_state()  local
121 	ret = intel_crt_port_enabled(display, crt->adpa_reg, pipe);  in intel_crt_get_hw_state()
130 	struct intel_display *display = to_intel_display(encoder);  in intel_crt_get_flags()  local
134 	tmp = intel_de_read(display, crt->adpa_reg);  in intel_crt_get_flags()
179 	struct intel_display *display = to_intel_display(encoder);  in intel_crt_set_dpms()  local
186 	if (DISPLAY_VER(display) >= 5)  in intel_crt_set_dpms()
205 		intel_de_write(display, BCLRPAT(display, crtc->pipe), 0);  in intel_crt_set_dpms()
222 	intel_de_write(display, crt->adpa_reg, adpa);  in intel_crt_set_dpms()
253 	struct intel_display *display = to_intel_display(encoder);  in hsw_disable_crt()  local
256 	drm_WARN_ON(display->drm, !old_crtc_state->has_pch_encoder);  in hsw_disable_crt()
266 	struct intel_display *display = to_intel_display(encoder);  in hsw_post_disable_crt()  local
286 	drm_WARN_ON(display->drm, !old_crtc_state->has_pch_encoder);  in hsw_post_disable_crt()
296 	struct intel_display *display = to_intel_display(encoder);  in hsw_pre_pll_enable_crt()  local
299 	drm_WARN_ON(display->drm, !crtc_state->has_pch_encoder);  in hsw_pre_pll_enable_crt()
309 	struct intel_display *display = to_intel_display(encoder);  in hsw_pre_enable_crt()  local
314 	drm_WARN_ON(display->drm, !crtc_state->has_pch_encoder);  in hsw_pre_enable_crt()
328 	struct intel_display *display = to_intel_display(encoder);  in hsw_enable_crt()  local
333 	drm_WARN_ON(display->drm, !crtc_state->has_pch_encoder);  in hsw_enable_crt()
363 	struct intel_display *display = to_intel_display(connector->dev);  in intel_crt_mode_valid()  local
365 	int max_dotclk = display->cdclk.max_dotclk_freq;  in intel_crt_mode_valid()
384 	else if (IS_DISPLAY_VER(display, 3, 4))  in intel_crt_mode_valid()
445 	struct intel_display *display = to_intel_display(encoder);  in hsw_crt_compute_config()  local
468 			drm_dbg_kms(display->drm,  in hsw_crt_compute_config()
488 	struct intel_display *display = to_intel_display(connector->dev);  in ilk_crt_detect_hotplug()  local
501 		save_adpa = adpa = intel_de_read(display, crt->adpa_reg);  in ilk_crt_detect_hotplug()
502 		drm_dbg_kms(display->drm,  in ilk_crt_detect_hotplug()
509 		intel_de_write(display, crt->adpa_reg, adpa);  in ilk_crt_detect_hotplug()
511 		if (intel_de_wait_for_clear(display,  in ilk_crt_detect_hotplug()
515 			drm_dbg_kms(display->drm,  in ilk_crt_detect_hotplug()
519 			intel_de_write(display, crt->adpa_reg, save_adpa);  in ilk_crt_detect_hotplug()
520 			intel_de_posting_read(display, crt->adpa_reg);  in ilk_crt_detect_hotplug()
525 	adpa = intel_de_read(display, crt->adpa_reg);  in ilk_crt_detect_hotplug()
530 	drm_dbg_kms(display->drm, "ironlake hotplug adpa=0x%x, result %d\n",  in ilk_crt_detect_hotplug()
538 	struct intel_display *display = to_intel_display(connector->dev);  in valleyview_crt_detect_hotplug()  local
560 	save_adpa = adpa = intel_de_read(display, crt->adpa_reg);  in valleyview_crt_detect_hotplug()
561 	drm_dbg_kms(display->drm,  in valleyview_crt_detect_hotplug()
566 	intel_de_write(display, crt->adpa_reg, adpa);  in valleyview_crt_detect_hotplug()
568 	if (intel_de_wait_for_clear(display, crt->adpa_reg,  in valleyview_crt_detect_hotplug()
570 		drm_dbg_kms(display->drm,  in valleyview_crt_detect_hotplug()
572 		intel_de_write(display, crt->adpa_reg, save_adpa);  in valleyview_crt_detect_hotplug()
576 	adpa = intel_de_read(display, crt->adpa_reg);  in valleyview_crt_detect_hotplug()
582 	drm_dbg_kms(display->drm,  in valleyview_crt_detect_hotplug()
593 	struct intel_display *display = to_intel_display(connector->dev);  in intel_crt_detect_hotplug()  local
621 		if (intel_de_wait_for_clear(display, PORT_HOTPLUG_EN(display),  in intel_crt_detect_hotplug()
623 			drm_dbg_kms(display->drm,  in intel_crt_detect_hotplug()
627 	stat = intel_de_read(display, PORT_HOTPLUG_STAT(display));  in intel_crt_detect_hotplug()
632 	intel_de_write(display, PORT_HOTPLUG_STAT(display),  in intel_crt_detect_hotplug()
678 	struct intel_display *display = to_intel_display(connector->dev);  in intel_crt_detect_ddc()  local
691 			drm_dbg_kms(display->drm,  in intel_crt_detect_ddc()
694 			drm_dbg_kms(display->drm,  in intel_crt_detect_ddc()
699 		drm_dbg_kms(display->drm,  in intel_crt_detect_ddc()
711 	struct intel_display *display = to_intel_display(&crt->base);  in intel_crt_load_detect()  local
722 	drm_dbg_kms(display->drm, "starting load-detect on CRT\n");  in intel_crt_load_detect()
724 	save_bclrpat = intel_de_read(display,  in intel_crt_load_detect()
725 				     BCLRPAT(display, cpu_transcoder));  in intel_crt_load_detect()
726 	save_vtotal = intel_de_read(display,  in intel_crt_load_detect()
727 				    TRANS_VTOTAL(display, cpu_transcoder));  in intel_crt_load_detect()
728 	vblank = intel_de_read(display,  in intel_crt_load_detect()
729 			       TRANS_VBLANK(display, cpu_transcoder));  in intel_crt_load_detect()
738 	intel_de_write(display, BCLRPAT(display, cpu_transcoder), 0x500050);  in intel_crt_load_detect()
740 	if (DISPLAY_VER(display) != 2) {  in intel_crt_load_detect()
741 		u32 transconf = intel_de_read(display,  in intel_crt_load_detect()
742 					      TRANSCONF(display, cpu_transcoder));  in intel_crt_load_detect()
744 		intel_de_write(display, TRANSCONF(display, cpu_transcoder),  in intel_crt_load_detect()
746 		intel_de_posting_read(display,  in intel_crt_load_detect()
747 				      TRANSCONF(display, cpu_transcoder));  in intel_crt_load_detect()
750 		intel_crtc_wait_for_next_vblank(intel_crtc_for_pipe(display, pipe));  in intel_crt_load_detect()
751 		st00 = intel_de_read8(display, _VGA_MSR_WRITE);  in intel_crt_load_detect()
756 		intel_de_write(display, TRANSCONF(display, cpu_transcoder),  in intel_crt_load_detect()
767 			u32 vsync = intel_de_read(display,  in intel_crt_load_detect()
768 						  TRANS_VSYNC(display, cpu_transcoder));  in intel_crt_load_detect()
772 			intel_de_write(display,  in intel_crt_load_detect()
773 				       TRANS_VBLANK(display, cpu_transcoder),  in intel_crt_load_detect()
787 		while (intel_de_read(display, PIPEDSL(display, pipe)) >= vactive)  in intel_crt_load_detect()
789 		while ((dsl = intel_de_read(display, PIPEDSL(display, pipe))) <= vsample)  in intel_crt_load_detect()
799 			st00 = intel_de_read8(display, _VGA_MSR_WRITE);  in intel_crt_load_detect()
802 		} while ((intel_de_read(display, PIPEDSL(display, pipe)) == dsl));  in intel_crt_load_detect()
806 			intel_de_write(display,  in intel_crt_load_detect()
807 				       TRANS_VBLANK(display, cpu_transcoder),  in intel_crt_load_detect()
821 	intel_de_write(display, BCLRPAT(display, cpu_transcoder),  in intel_crt_load_detect()
858 	struct intel_display *display = to_intel_display(connector->dev);  in intel_crt_detect()  local
866 	drm_dbg_kms(display->drm, "[CONNECTOR:%d:%s] force=%d\n",  in intel_crt_detect()
870 	if (!intel_display_device_enabled(display))  in intel_crt_detect()
873 	if (!intel_display_driver_check_access(display))  in intel_crt_detect()
876 	if (display->params.load_detect_test) {  in intel_crt_detect()
887 	if (I915_HAS_HOTPLUG(display)) {  in intel_crt_detect()
893 			drm_dbg_kms(display->drm,  in intel_crt_detect()
898 			drm_dbg_kms(display->drm,  in intel_crt_detect()
911 	if (I915_HAS_HOTPLUG(display)) {  in intel_crt_detect()
931 		else if (DISPLAY_VER(display) < 4)  in intel_crt_detect()
934 		else if (display->params.load_detect_test)  in intel_crt_detect()
949 	struct intel_display *display = to_intel_display(connector->dev);  in intel_crt_get_modes()  local
957 	if (!intel_display_driver_check_access(display))  in intel_crt_get_modes()
967 	ddc = intel_gmbus_get_adapter(display, GMBUS_PIN_DPB);  in intel_crt_get_modes()
978 	struct intel_display *display = to_intel_display(encoder->dev);  in intel_crt_reset()  local
981 	if (DISPLAY_VER(display) >= 5) {  in intel_crt_reset()
984 		adpa = intel_de_read(display, crt->adpa_reg);  in intel_crt_reset()
987 		intel_de_write(display, crt->adpa_reg, adpa);  in intel_crt_reset()
988 		intel_de_posting_read(display, crt->adpa_reg);  in intel_crt_reset()
990 		drm_dbg_kms(display->drm, "crt adpa set to 0x%x\n", adpa);  in intel_crt_reset()
1020 void intel_crt_init(struct intel_display *display)  in intel_crt_init()  argument
1022 	struct drm_i915_private *dev_priv = to_i915(display->drm);  in intel_crt_init()
1036 	adpa = intel_de_read(display, adpa_reg);  in intel_crt_init()
1046 		intel_de_write(display, adpa_reg,  in intel_crt_init()
1050 		if ((intel_de_read(display, adpa_reg) & ADPA_DAC_ENABLE) == 0)  in intel_crt_init()
1052 		intel_de_write(display, adpa_reg, adpa);  in intel_crt_init()
1065 	ddc_pin = display->vbt.crt_ddc_pin;  in intel_crt_init()
1067 	drm_connector_init_with_ddc(display->drm, &connector->base,  in intel_crt_init()
1070 				    intel_gmbus_get_adapter(display, ddc_pin));  in intel_crt_init()
1072 	drm_encoder_init(display->drm, &crt->base.base, &intel_crt_enc_funcs,  in intel_crt_init()
1084 	if (DISPLAY_VER(display) != 2)  in intel_crt_init()
1091 	if (I915_HAS_HOTPLUG(display) &&  in intel_crt_init()
1101 	if (HAS_DDI(display)) {  in intel_crt_init()
1145 		display->fdi.rx_config = intel_de_read(display,  in intel_crt_init()