Lines Matching full:dsi
238 static void mtk_dsi_mask(struct mtk_dsi *dsi, u32 offset, u32 mask, u32 data) in mtk_dsi_mask() argument
240 u32 temp = readl(dsi->regs + offset); in mtk_dsi_mask()
242 writel((temp & ~mask) | (data & mask), dsi->regs + offset); in mtk_dsi_mask()
245 static void mtk_dsi_phy_timconfig(struct mtk_dsi *dsi) in mtk_dsi_phy_timconfig() argument
248 u32 data_rate_mhz = DIV_ROUND_UP(dsi->data_rate, HZ_PER_MHZ); in mtk_dsi_phy_timconfig()
249 struct mtk_phy_timing *timing = &dsi->phy_timing; in mtk_dsi_phy_timconfig()
286 writel(timcon0, dsi->regs + DSI_PHY_TIMECON0); in mtk_dsi_phy_timconfig()
287 writel(timcon1, dsi->regs + DSI_PHY_TIMECON1); in mtk_dsi_phy_timconfig()
288 writel(timcon2, dsi->regs + DSI_PHY_TIMECON2); in mtk_dsi_phy_timconfig()
289 writel(timcon3, dsi->regs + DSI_PHY_TIMECON3); in mtk_dsi_phy_timconfig()
292 static void mtk_dsi_enable(struct mtk_dsi *dsi) in mtk_dsi_enable() argument
294 mtk_dsi_mask(dsi, DSI_CON_CTRL, DSI_EN, DSI_EN); in mtk_dsi_enable()
297 static void mtk_dsi_disable(struct mtk_dsi *dsi) in mtk_dsi_disable() argument
299 mtk_dsi_mask(dsi, DSI_CON_CTRL, DSI_EN, 0); in mtk_dsi_disable()
302 static void mtk_dsi_reset_engine(struct mtk_dsi *dsi) in mtk_dsi_reset_engine() argument
304 mtk_dsi_mask(dsi, DSI_CON_CTRL, DSI_RESET, DSI_RESET); in mtk_dsi_reset_engine()
305 mtk_dsi_mask(dsi, DSI_CON_CTRL, DSI_RESET, 0); in mtk_dsi_reset_engine()
308 static void mtk_dsi_reset_dphy(struct mtk_dsi *dsi) in mtk_dsi_reset_dphy() argument
310 mtk_dsi_mask(dsi, DSI_CON_CTRL, DPHY_RESET, DPHY_RESET); in mtk_dsi_reset_dphy()
311 mtk_dsi_mask(dsi, DSI_CON_CTRL, DPHY_RESET, 0); in mtk_dsi_reset_dphy()
314 static void mtk_dsi_clk_ulp_mode_enter(struct mtk_dsi *dsi) in mtk_dsi_clk_ulp_mode_enter() argument
316 mtk_dsi_mask(dsi, DSI_PHY_LCCON, LC_HS_TX_EN, 0); in mtk_dsi_clk_ulp_mode_enter()
317 mtk_dsi_mask(dsi, DSI_PHY_LCCON, LC_ULPM_EN, 0); in mtk_dsi_clk_ulp_mode_enter()
320 static void mtk_dsi_clk_ulp_mode_leave(struct mtk_dsi *dsi) in mtk_dsi_clk_ulp_mode_leave() argument
322 mtk_dsi_mask(dsi, DSI_PHY_LCCON, LC_ULPM_EN, 0); in mtk_dsi_clk_ulp_mode_leave()
323 mtk_dsi_mask(dsi, DSI_PHY_LCCON, LC_WAKEUP_EN, LC_WAKEUP_EN); in mtk_dsi_clk_ulp_mode_leave()
324 mtk_dsi_mask(dsi, DSI_PHY_LCCON, LC_WAKEUP_EN, 0); in mtk_dsi_clk_ulp_mode_leave()
327 static void mtk_dsi_lane0_ulp_mode_enter(struct mtk_dsi *dsi) in mtk_dsi_lane0_ulp_mode_enter() argument
329 mtk_dsi_mask(dsi, DSI_PHY_LD0CON, LD0_HS_TX_EN, 0); in mtk_dsi_lane0_ulp_mode_enter()
330 mtk_dsi_mask(dsi, DSI_PHY_LD0CON, LD0_ULPM_EN, 0); in mtk_dsi_lane0_ulp_mode_enter()
333 static void mtk_dsi_lane0_ulp_mode_leave(struct mtk_dsi *dsi) in mtk_dsi_lane0_ulp_mode_leave() argument
335 mtk_dsi_mask(dsi, DSI_PHY_LD0CON, LD0_ULPM_EN, 0); in mtk_dsi_lane0_ulp_mode_leave()
336 mtk_dsi_mask(dsi, DSI_PHY_LD0CON, LD0_WAKEUP_EN, LD0_WAKEUP_EN); in mtk_dsi_lane0_ulp_mode_leave()
337 mtk_dsi_mask(dsi, DSI_PHY_LD0CON, LD0_WAKEUP_EN, 0); in mtk_dsi_lane0_ulp_mode_leave()
340 static bool mtk_dsi_clk_hs_state(struct mtk_dsi *dsi) in mtk_dsi_clk_hs_state() argument
342 return readl(dsi->regs + DSI_PHY_LCCON) & LC_HS_TX_EN; in mtk_dsi_clk_hs_state()
345 static void mtk_dsi_clk_hs_mode(struct mtk_dsi *dsi, bool enter) in mtk_dsi_clk_hs_mode() argument
347 if (enter && !mtk_dsi_clk_hs_state(dsi)) in mtk_dsi_clk_hs_mode()
348 mtk_dsi_mask(dsi, DSI_PHY_LCCON, LC_HS_TX_EN, LC_HS_TX_EN); in mtk_dsi_clk_hs_mode()
349 else if (!enter && mtk_dsi_clk_hs_state(dsi)) in mtk_dsi_clk_hs_mode()
350 mtk_dsi_mask(dsi, DSI_PHY_LCCON, LC_HS_TX_EN, 0); in mtk_dsi_clk_hs_mode()
353 static void mtk_dsi_set_mode(struct mtk_dsi *dsi) in mtk_dsi_set_mode() argument
357 if (dsi->mode_flags & MIPI_DSI_MODE_VIDEO) { in mtk_dsi_set_mode()
358 if (dsi->mode_flags & MIPI_DSI_MODE_VIDEO_BURST) in mtk_dsi_set_mode()
360 else if (dsi->mode_flags & MIPI_DSI_MODE_VIDEO_SYNC_PULSE) in mtk_dsi_set_mode()
366 writel(vid_mode, dsi->regs + DSI_MODE_CTRL); in mtk_dsi_set_mode()
369 static void mtk_dsi_set_vm_cmd(struct mtk_dsi *dsi) in mtk_dsi_set_vm_cmd() argument
371 mtk_dsi_mask(dsi, dsi->driver_data->reg_vm_cmd_off, VM_CMD_EN, VM_CMD_EN); in mtk_dsi_set_vm_cmd()
372 mtk_dsi_mask(dsi, dsi->driver_data->reg_vm_cmd_off, TS_VFP_EN, TS_VFP_EN); in mtk_dsi_set_vm_cmd()
375 static void mtk_dsi_rxtx_control(struct mtk_dsi *dsi) in mtk_dsi_rxtx_control() argument
380 /* Number of DSI lanes (max 4 lanes), each bit enables one DSI lane. */ in mtk_dsi_rxtx_control()
381 for (i = 0; i < dsi->lanes; i++) in mtk_dsi_rxtx_control()
386 if (dsi->mode_flags & MIPI_DSI_CLOCK_NON_CONTINUOUS) in mtk_dsi_rxtx_control()
389 if (dsi->mode_flags & MIPI_DSI_MODE_NO_EOT_PACKET) in mtk_dsi_rxtx_control()
392 writel(regval, dsi->regs + DSI_TXRX_CTRL); in mtk_dsi_rxtx_control()
395 static void mtk_dsi_ps_control(struct mtk_dsi *dsi, bool config_vact) in mtk_dsi_ps_control() argument
399 if (dsi->format == MIPI_DSI_FMT_RGB565) in mtk_dsi_ps_control()
405 ps_wc = FIELD_PREP(DSI_PS_WC, dsi->vm.hactive * dsi_buf_bpp); in mtk_dsi_ps_control()
409 switch (dsi->format) { in mtk_dsi_ps_control()
427 vact_nl = FIELD_PREP(VACT_NL, dsi->vm.vactive); in mtk_dsi_ps_control()
428 writel(vact_nl, dsi->regs + DSI_VACT_NL); in mtk_dsi_ps_control()
429 writel(ps_wc, dsi->regs + DSI_HSTX_CKL_WC); in mtk_dsi_ps_control()
431 writel(ps_val, dsi->regs + DSI_PSCTRL); in mtk_dsi_ps_control()
434 static void mtk_dsi_config_vdo_timing_per_frame_lp(struct mtk_dsi *dsi) in mtk_dsi_config_vdo_timing_per_frame_lp() argument
446 struct videomode *vm = &dsi->vm; in mtk_dsi_config_vdo_timing_per_frame_lp()
448 if (dsi->format == MIPI_DSI_FMT_RGB565) in mtk_dsi_config_vdo_timing_per_frame_lp()
453 da_hs_trail = dsi->phy_timing.da_hs_trail; in mtk_dsi_config_vdo_timing_per_frame_lp()
456 if (dsi->mode_flags & MIPI_DSI_MODE_VIDEO_SYNC_PULSE) { in mtk_dsi_config_vdo_timing_per_frame_lp()
471 if (dsi->mode_flags & MIPI_DSI_MODE_VIDEO_BURST) { in mtk_dsi_config_vdo_timing_per_frame_lp()
481 horizontal_frontporch_byte) % dsi->lanes; in mtk_dsi_config_vdo_timing_per_frame_lp()
483 horizontal_backporch_byte += dsi->lanes - v_active_roundup; in mtk_dsi_config_vdo_timing_per_frame_lp()
484 hstx_cklp_wc_min = (DIV_ROUND_UP(cklp_wc_min_adjust, dsi->lanes) + da_hs_trail + 1) in mtk_dsi_config_vdo_timing_per_frame_lp()
485 * dsi->lanes / 6 - 1; in mtk_dsi_config_vdo_timing_per_frame_lp()
487 ps_wc), dsi->lanes) + da_hs_trail + 1) * dsi->lanes / 6 - 1; in mtk_dsi_config_vdo_timing_per_frame_lp()
490 writel(hstx_cklp_wc, dsi->regs + DSI_HSTX_CKL_WC); in mtk_dsi_config_vdo_timing_per_frame_lp()
492 hs_vb_ps_wc = ps_wc - (dsi->phy_timing.lpx + dsi->phy_timing.da_hs_exit + in mtk_dsi_config_vdo_timing_per_frame_lp()
493 dsi->phy_timing.da_hs_prepare + dsi->phy_timing.da_hs_zero + 2) * dsi->lanes; in mtk_dsi_config_vdo_timing_per_frame_lp()
497 writel(horizontal_sync_active_byte, dsi->regs + DSI_HSA_WC); in mtk_dsi_config_vdo_timing_per_frame_lp()
498 writel(horizontal_backporch_byte, dsi->regs + DSI_HBP_WC); in mtk_dsi_config_vdo_timing_per_frame_lp()
499 writel(horizontal_frontporch_byte, dsi->regs + DSI_HFP_WC); in mtk_dsi_config_vdo_timing_per_frame_lp()
502 static void mtk_dsi_config_vdo_timing_per_line_lp(struct mtk_dsi *dsi) in mtk_dsi_config_vdo_timing_per_line_lp() argument
511 struct mtk_phy_timing *timing = &dsi->phy_timing; in mtk_dsi_config_vdo_timing_per_line_lp()
512 struct videomode *vm = &dsi->vm; in mtk_dsi_config_vdo_timing_per_line_lp()
514 if (dsi->format == MIPI_DSI_FMT_RGB565) in mtk_dsi_config_vdo_timing_per_line_lp()
521 if (dsi->mode_flags & MIPI_DSI_MODE_VIDEO_SYNC_PULSE) in mtk_dsi_config_vdo_timing_per_line_lp()
530 delta = dsi->mode_flags & MIPI_DSI_MODE_VIDEO_BURST ? 18 : 12; in mtk_dsi_config_vdo_timing_per_line_lp()
531 delta += dsi->mode_flags & MIPI_DSI_MODE_NO_EOT_PACKET ? 0 : 2; in mtk_dsi_config_vdo_timing_per_line_lp()
535 data_phy_cycles_byte = data_phy_cycles * dsi->lanes + delta; in mtk_dsi_config_vdo_timing_per_line_lp()
549 if ((dsi->mode_flags & MIPI_DSI_HS_PKT_END_ALIGNED) && in mtk_dsi_config_vdo_timing_per_line_lp()
550 (dsi->lanes == 4)) { in mtk_dsi_config_vdo_timing_per_line_lp()
552 roundup(horizontal_sync_active_byte, dsi->lanes) - 2; in mtk_dsi_config_vdo_timing_per_line_lp()
554 roundup(horizontal_frontporch_byte, dsi->lanes) - 2; in mtk_dsi_config_vdo_timing_per_line_lp()
556 roundup(horizontal_backporch_byte, dsi->lanes) - 2; in mtk_dsi_config_vdo_timing_per_line_lp()
558 (vm->hactive * dsi_tmp_buf_bpp + 2) % dsi->lanes; in mtk_dsi_config_vdo_timing_per_line_lp()
561 writel(horizontal_sync_active_byte, dsi->regs + DSI_HSA_WC); in mtk_dsi_config_vdo_timing_per_line_lp()
562 writel(horizontal_backporch_byte, dsi->regs + DSI_HBP_WC); in mtk_dsi_config_vdo_timing_per_line_lp()
563 writel(horizontal_frontporch_byte, dsi->regs + DSI_HFP_WC); in mtk_dsi_config_vdo_timing_per_line_lp()
566 static void mtk_dsi_config_vdo_timing(struct mtk_dsi *dsi) in mtk_dsi_config_vdo_timing() argument
568 struct videomode *vm = &dsi->vm; in mtk_dsi_config_vdo_timing()
570 writel(vm->vsync_len, dsi->regs + DSI_VSA_NL); in mtk_dsi_config_vdo_timing()
571 writel(vm->vback_porch, dsi->regs + DSI_VBP_NL); in mtk_dsi_config_vdo_timing()
572 writel(vm->vfront_porch, dsi->regs + DSI_VFP_NL); in mtk_dsi_config_vdo_timing()
573 writel(vm->vactive, dsi->regs + DSI_VACT_NL); in mtk_dsi_config_vdo_timing()
575 if (dsi->driver_data->has_size_ctl) in mtk_dsi_config_vdo_timing()
578 dsi->regs + DSI_SIZE_CON); in mtk_dsi_config_vdo_timing()
580 if (dsi->driver_data->support_per_frame_lp) in mtk_dsi_config_vdo_timing()
581 mtk_dsi_config_vdo_timing_per_frame_lp(dsi); in mtk_dsi_config_vdo_timing()
583 mtk_dsi_config_vdo_timing_per_line_lp(dsi); in mtk_dsi_config_vdo_timing()
585 mtk_dsi_ps_control(dsi, false); in mtk_dsi_config_vdo_timing()
588 static void mtk_dsi_start(struct mtk_dsi *dsi) in mtk_dsi_start() argument
590 writel(0, dsi->regs + DSI_START); in mtk_dsi_start()
591 writel(1, dsi->regs + DSI_START); in mtk_dsi_start()
594 static void mtk_dsi_stop(struct mtk_dsi *dsi) in mtk_dsi_stop() argument
596 writel(0, dsi->regs + DSI_START); in mtk_dsi_stop()
599 static void mtk_dsi_set_cmd_mode(struct mtk_dsi *dsi) in mtk_dsi_set_cmd_mode() argument
601 writel(CMD_MODE, dsi->regs + DSI_MODE_CTRL); in mtk_dsi_set_cmd_mode()
604 static void mtk_dsi_set_interrupt_enable(struct mtk_dsi *dsi) in mtk_dsi_set_interrupt_enable() argument
608 writel(inten, dsi->regs + DSI_INTEN); in mtk_dsi_set_interrupt_enable()
611 static void mtk_dsi_irq_data_set(struct mtk_dsi *dsi, u32 irq_bit) in mtk_dsi_irq_data_set() argument
613 dsi->irq_data |= irq_bit; in mtk_dsi_irq_data_set()
616 static void mtk_dsi_irq_data_clear(struct mtk_dsi *dsi, u32 irq_bit) in mtk_dsi_irq_data_clear() argument
618 dsi->irq_data &= ~irq_bit; in mtk_dsi_irq_data_clear()
621 static s32 mtk_dsi_wait_for_irq_done(struct mtk_dsi *dsi, u32 irq_flag, in mtk_dsi_wait_for_irq_done() argument
627 ret = wait_event_interruptible_timeout(dsi->irq_wait_queue, in mtk_dsi_wait_for_irq_done()
628 dsi->irq_data & irq_flag, in mtk_dsi_wait_for_irq_done()
631 DRM_WARN("Wait DSI IRQ(0x%08x) Timeout\n", irq_flag); in mtk_dsi_wait_for_irq_done()
633 mtk_dsi_enable(dsi); in mtk_dsi_wait_for_irq_done()
634 mtk_dsi_reset_engine(dsi); in mtk_dsi_wait_for_irq_done()
642 struct mtk_dsi *dsi = dev_id; in mtk_dsi_irq() local
646 status = readl(dsi->regs + DSI_INTSTA) & flag; in mtk_dsi_irq()
650 mtk_dsi_mask(dsi, DSI_RACK, RACK, RACK); in mtk_dsi_irq()
651 tmp = readl(dsi->regs + DSI_INTSTA); in mtk_dsi_irq()
654 mtk_dsi_mask(dsi, DSI_INTSTA, status, 0); in mtk_dsi_irq()
655 mtk_dsi_irq_data_set(dsi, status); in mtk_dsi_irq()
656 wake_up_interruptible(&dsi->irq_wait_queue); in mtk_dsi_irq()
662 static s32 mtk_dsi_switch_to_cmd_mode(struct mtk_dsi *dsi, u8 irq_flag, u32 t) in mtk_dsi_switch_to_cmd_mode() argument
664 mtk_dsi_irq_data_clear(dsi, irq_flag); in mtk_dsi_switch_to_cmd_mode()
665 mtk_dsi_set_cmd_mode(dsi); in mtk_dsi_switch_to_cmd_mode()
667 if (!mtk_dsi_wait_for_irq_done(dsi, irq_flag, t)) { in mtk_dsi_switch_to_cmd_mode()
675 static int mtk_dsi_poweron(struct mtk_dsi *dsi) in mtk_dsi_poweron() argument
677 struct device *dev = dsi->host.dev; in mtk_dsi_poweron()
681 if (++dsi->refcount != 1) in mtk_dsi_poweron()
684 ret = mipi_dsi_pixel_format_to_bpp(dsi->format); in mtk_dsi_poweron()
686 dev_err(dev, "Unknown MIPI DSI format %d\n", dsi->format); in mtk_dsi_poweron()
691 dsi->data_rate = DIV_ROUND_UP_ULL(dsi->vm.pixelclock * bit_per_pixel, in mtk_dsi_poweron()
692 dsi->lanes); in mtk_dsi_poweron()
694 ret = clk_set_rate(dsi->hs_clk, dsi->data_rate); in mtk_dsi_poweron()
700 phy_power_on(dsi->phy); in mtk_dsi_poweron()
702 ret = clk_prepare_enable(dsi->engine_clk); in mtk_dsi_poweron()
708 ret = clk_prepare_enable(dsi->digital_clk); in mtk_dsi_poweron()
714 mtk_dsi_enable(dsi); in mtk_dsi_poweron()
716 if (dsi->driver_data->has_shadow_ctl) in mtk_dsi_poweron()
718 dsi->regs + dsi->driver_data->reg_shadow_dbg_off); in mtk_dsi_poweron()
720 mtk_dsi_reset_engine(dsi); in mtk_dsi_poweron()
721 mtk_dsi_phy_timconfig(dsi); in mtk_dsi_poweron()
723 mtk_dsi_ps_control(dsi, true); in mtk_dsi_poweron()
724 mtk_dsi_set_vm_cmd(dsi); in mtk_dsi_poweron()
725 mtk_dsi_config_vdo_timing(dsi); in mtk_dsi_poweron()
726 mtk_dsi_set_interrupt_enable(dsi); in mtk_dsi_poweron()
730 clk_disable_unprepare(dsi->engine_clk); in mtk_dsi_poweron()
732 phy_power_off(dsi->phy); in mtk_dsi_poweron()
734 dsi->refcount--; in mtk_dsi_poweron()
738 static void mtk_dsi_poweroff(struct mtk_dsi *dsi) in mtk_dsi_poweroff() argument
740 if (WARN_ON(dsi->refcount == 0)) in mtk_dsi_poweroff()
743 if (--dsi->refcount != 0) in mtk_dsi_poweroff()
751 * after dsi is fully set. in mtk_dsi_poweroff()
753 mtk_dsi_stop(dsi); in mtk_dsi_poweroff()
755 mtk_dsi_switch_to_cmd_mode(dsi, VM_DONE_INT_FLAG, 500); in mtk_dsi_poweroff()
756 mtk_dsi_reset_engine(dsi); in mtk_dsi_poweroff()
757 mtk_dsi_lane0_ulp_mode_enter(dsi); in mtk_dsi_poweroff()
758 mtk_dsi_clk_ulp_mode_enter(dsi); in mtk_dsi_poweroff()
760 writel(0, dsi->regs + DSI_TXRX_CTRL); in mtk_dsi_poweroff()
762 mtk_dsi_disable(dsi); in mtk_dsi_poweroff()
764 clk_disable_unprepare(dsi->engine_clk); in mtk_dsi_poweroff()
765 clk_disable_unprepare(dsi->digital_clk); in mtk_dsi_poweroff()
767 phy_power_off(dsi->phy); in mtk_dsi_poweroff()
769 dsi->lanes_ready = false; in mtk_dsi_poweroff()
772 static void mtk_dsi_lane_ready(struct mtk_dsi *dsi) in mtk_dsi_lane_ready() argument
774 if (!dsi->lanes_ready) { in mtk_dsi_lane_ready()
775 dsi->lanes_ready = true; in mtk_dsi_lane_ready()
776 mtk_dsi_rxtx_control(dsi); in mtk_dsi_lane_ready()
778 mtk_dsi_reset_dphy(dsi); in mtk_dsi_lane_ready()
779 mtk_dsi_clk_ulp_mode_leave(dsi); in mtk_dsi_lane_ready()
780 mtk_dsi_lane0_ulp_mode_leave(dsi); in mtk_dsi_lane_ready()
781 mtk_dsi_clk_hs_mode(dsi, 0); in mtk_dsi_lane_ready()
787 static void mtk_output_dsi_enable(struct mtk_dsi *dsi) in mtk_output_dsi_enable() argument
789 if (dsi->enabled) in mtk_output_dsi_enable()
792 mtk_dsi_lane_ready(dsi); in mtk_output_dsi_enable()
793 mtk_dsi_set_mode(dsi); in mtk_output_dsi_enable()
794 mtk_dsi_clk_hs_mode(dsi, 1); in mtk_output_dsi_enable()
796 mtk_dsi_start(dsi); in mtk_output_dsi_enable()
798 dsi->enabled = true; in mtk_output_dsi_enable()
801 static void mtk_output_dsi_disable(struct mtk_dsi *dsi) in mtk_output_dsi_disable() argument
803 if (!dsi->enabled) in mtk_output_dsi_disable()
806 dsi->enabled = false; in mtk_output_dsi_disable()
812 struct mtk_dsi *dsi = bridge_to_dsi(bridge); in mtk_dsi_bridge_attach() local
814 /* Attach the panel or bridge to the dsi bridge */ in mtk_dsi_bridge_attach()
815 return drm_bridge_attach(bridge->encoder, dsi->next_bridge, in mtk_dsi_bridge_attach()
816 &dsi->bridge, flags); in mtk_dsi_bridge_attach()
823 struct mtk_dsi *dsi = bridge_to_dsi(bridge); in mtk_dsi_bridge_mode_set() local
825 drm_display_mode_to_videomode(adjusted, &dsi->vm); in mtk_dsi_bridge_mode_set()
831 struct mtk_dsi *dsi = bridge_to_dsi(bridge); in mtk_dsi_bridge_atomic_disable() local
833 mtk_output_dsi_disable(dsi); in mtk_dsi_bridge_atomic_disable()
839 struct mtk_dsi *dsi = bridge_to_dsi(bridge); in mtk_dsi_bridge_atomic_enable() local
841 if (dsi->refcount == 0) in mtk_dsi_bridge_atomic_enable()
844 mtk_output_dsi_enable(dsi); in mtk_dsi_bridge_atomic_enable()
850 struct mtk_dsi *dsi = bridge_to_dsi(bridge); in mtk_dsi_bridge_atomic_pre_enable() local
853 ret = mtk_dsi_poweron(dsi); in mtk_dsi_bridge_atomic_pre_enable()
855 DRM_ERROR("failed to power on dsi\n"); in mtk_dsi_bridge_atomic_pre_enable()
861 struct mtk_dsi *dsi = bridge_to_dsi(bridge); in mtk_dsi_bridge_atomic_post_disable() local
863 mtk_dsi_poweroff(dsi); in mtk_dsi_bridge_atomic_post_disable()
871 struct mtk_dsi *dsi = bridge_to_dsi(bridge); in mtk_dsi_bridge_mode_valid() local
874 bpp = mipi_dsi_pixel_format_to_bpp(dsi->format); in mtk_dsi_bridge_mode_valid()
878 if (mode->clock * bpp / dsi->lanes > 1500000) in mtk_dsi_bridge_mode_valid()
899 struct mtk_dsi *dsi = dev_get_drvdata(dev); in mtk_dsi_ddp_start() local
901 mtk_dsi_poweron(dsi); in mtk_dsi_ddp_start()
906 struct mtk_dsi *dsi = dev_get_drvdata(dev); in mtk_dsi_ddp_stop() local
908 mtk_dsi_poweroff(dsi); in mtk_dsi_ddp_stop()
911 static int mtk_dsi_encoder_init(struct drm_device *drm, struct mtk_dsi *dsi) in mtk_dsi_encoder_init() argument
915 ret = drm_simple_encoder_init(drm, &dsi->encoder, in mtk_dsi_encoder_init()
922 ret = mtk_find_possible_crtcs(drm, dsi->host.dev); in mtk_dsi_encoder_init()
925 dsi->encoder.possible_crtcs = ret; in mtk_dsi_encoder_init()
927 ret = drm_bridge_attach(&dsi->encoder, &dsi->bridge, NULL, in mtk_dsi_encoder_init()
932 dsi->connector = drm_bridge_connector_init(drm, &dsi->encoder); in mtk_dsi_encoder_init()
933 if (IS_ERR(dsi->connector)) { in mtk_dsi_encoder_init()
935 ret = PTR_ERR(dsi->connector); in mtk_dsi_encoder_init()
938 drm_connector_attach_encoder(dsi->connector, &dsi->encoder); in mtk_dsi_encoder_init()
943 drm_encoder_cleanup(&dsi->encoder); in mtk_dsi_encoder_init()
949 struct mtk_dsi *dsi = dev_get_drvdata(dev); in mtk_dsi_encoder_index() local
950 unsigned int encoder_index = drm_encoder_index(&dsi->encoder); in mtk_dsi_encoder_index()
960 struct mtk_dsi *dsi = dev_get_drvdata(dev); in mtk_dsi_bind() local
962 ret = mtk_dsi_encoder_init(drm, dsi); in mtk_dsi_bind()
972 struct mtk_dsi *dsi = dev_get_drvdata(dev); in mtk_dsi_unbind() local
974 drm_encoder_cleanup(&dsi->encoder); in mtk_dsi_unbind()
985 struct mtk_dsi *dsi = host_to_dsi(host); in mtk_dsi_host_attach() local
989 dsi->lanes = device->lanes; in mtk_dsi_host_attach()
990 dsi->format = device->format; in mtk_dsi_host_attach()
991 dsi->mode_flags = device->mode_flags; in mtk_dsi_host_attach()
992 dsi->next_bridge = devm_drm_of_get_bridge(dev, dev->of_node, 1, 0); in mtk_dsi_host_attach()
993 if (IS_ERR(dsi->next_bridge)) { in mtk_dsi_host_attach()
994 ret = PTR_ERR(dsi->next_bridge); in mtk_dsi_host_attach()
999 dsi->next_bridge = devm_drm_of_get_bridge(dev, dev->of_node, 0, 0); in mtk_dsi_host_attach()
1000 if (IS_ERR(dsi->next_bridge)) in mtk_dsi_host_attach()
1001 return PTR_ERR(dsi->next_bridge); in mtk_dsi_host_attach()
1004 drm_bridge_add(&dsi->bridge); in mtk_dsi_host_attach()
1009 drm_bridge_remove(&dsi->bridge); in mtk_dsi_host_attach()
1019 struct mtk_dsi *dsi = host_to_dsi(host); in mtk_dsi_host_detach() local
1022 drm_bridge_remove(&dsi->bridge); in mtk_dsi_host_detach()
1026 static void mtk_dsi_wait_for_idle(struct mtk_dsi *dsi) in mtk_dsi_wait_for_idle() argument
1031 ret = readl_poll_timeout(dsi->regs + DSI_INTSTA, val, !(val & DSI_BUSY), in mtk_dsi_wait_for_idle()
1034 DRM_WARN("polling dsi wait not busy timeout!\n"); in mtk_dsi_wait_for_idle()
1036 mtk_dsi_enable(dsi); in mtk_dsi_wait_for_idle()
1037 mtk_dsi_reset_engine(dsi); in mtk_dsi_wait_for_idle()
1064 static void mtk_dsi_cmdq(struct mtk_dsi *dsi, const struct mipi_dsi_msg *msg) in mtk_dsi_cmdq() argument
1069 u32 reg_cmdq_off = dsi->driver_data->reg_cmdq_off; in mtk_dsi_cmdq()
1089 mtk_dsi_mask(dsi, (reg_cmdq_off + cmdq_off + i) & (~0x3U), in mtk_dsi_cmdq()
1093 mtk_dsi_mask(dsi, reg_cmdq_off, cmdq_mask, reg_val); in mtk_dsi_cmdq()
1094 mtk_dsi_mask(dsi, DSI_CMDQ_SIZE, CMDQ_SIZE, cmdq_size); in mtk_dsi_cmdq()
1095 if (dsi->driver_data->cmdq_long_packet_ctl) { in mtk_dsi_cmdq()
1097 mtk_dsi_mask(dsi, DSI_CMDQ_SIZE, CMDQ_SIZE_SEL, CMDQ_SIZE_SEL); in mtk_dsi_cmdq()
1101 static ssize_t mtk_dsi_host_send_cmd(struct mtk_dsi *dsi, in mtk_dsi_host_send_cmd() argument
1104 mtk_dsi_wait_for_idle(dsi); in mtk_dsi_host_send_cmd()
1105 mtk_dsi_irq_data_clear(dsi, flag); in mtk_dsi_host_send_cmd()
1106 mtk_dsi_cmdq(dsi, msg); in mtk_dsi_host_send_cmd()
1107 mtk_dsi_start(dsi); in mtk_dsi_host_send_cmd()
1109 if (!mtk_dsi_wait_for_irq_done(dsi, flag, 2000)) in mtk_dsi_host_send_cmd()
1118 struct mtk_dsi *dsi = host_to_dsi(host); in mtk_dsi_host_transfer() local
1126 dsi_mode = readl(dsi->regs + DSI_MODE_CTRL); in mtk_dsi_host_transfer()
1128 mtk_dsi_stop(dsi); in mtk_dsi_host_transfer()
1129 ret = mtk_dsi_switch_to_cmd_mode(dsi, VM_DONE_INT_FLAG, 500); in mtk_dsi_host_transfer()
1137 mtk_dsi_lane_ready(dsi); in mtk_dsi_host_transfer()
1139 ret = mtk_dsi_host_send_cmd(dsi, msg, irq_flag); in mtk_dsi_host_transfer()
1149 DRM_ERROR("dsi receive buffer size may be NULL\n"); in mtk_dsi_host_transfer()
1155 *(read_data + i) = readb(dsi->regs + DSI_RX_DATA0 + i); in mtk_dsi_host_transfer()
1173 DRM_INFO("dsi get %zd byte data from the panel address(0x%x)\n", in mtk_dsi_host_transfer()
1178 mtk_dsi_set_mode(dsi); in mtk_dsi_host_transfer()
1179 mtk_dsi_start(dsi); in mtk_dsi_host_transfer()
1193 struct mtk_dsi *dsi; in mtk_dsi_probe() local
1199 dsi = devm_kzalloc(dev, sizeof(*dsi), GFP_KERNEL); in mtk_dsi_probe()
1200 if (!dsi) in mtk_dsi_probe()
1203 dsi->driver_data = of_device_get_match_data(dev); in mtk_dsi_probe()
1205 dsi->engine_clk = devm_clk_get(dev, "engine"); in mtk_dsi_probe()
1206 if (IS_ERR(dsi->engine_clk)) in mtk_dsi_probe()
1207 return dev_err_probe(dev, PTR_ERR(dsi->engine_clk), in mtk_dsi_probe()
1211 dsi->digital_clk = devm_clk_get(dev, "digital"); in mtk_dsi_probe()
1212 if (IS_ERR(dsi->digital_clk)) in mtk_dsi_probe()
1213 return dev_err_probe(dev, PTR_ERR(dsi->digital_clk), in mtk_dsi_probe()
1216 dsi->hs_clk = devm_clk_get(dev, "hs"); in mtk_dsi_probe()
1217 if (IS_ERR(dsi->hs_clk)) in mtk_dsi_probe()
1218 return dev_err_probe(dev, PTR_ERR(dsi->hs_clk), "Failed to get hs clock\n"); in mtk_dsi_probe()
1221 dsi->regs = devm_ioremap_resource(dev, regs); in mtk_dsi_probe()
1222 if (IS_ERR(dsi->regs)) in mtk_dsi_probe()
1223 return dev_err_probe(dev, PTR_ERR(dsi->regs), "Failed to ioremap memory\n"); in mtk_dsi_probe()
1225 dsi->phy = devm_phy_get(dev, "dphy"); in mtk_dsi_probe()
1226 if (IS_ERR(dsi->phy)) in mtk_dsi_probe()
1227 return dev_err_probe(dev, PTR_ERR(dsi->phy), "Failed to get MIPI-DPHY\n"); in mtk_dsi_probe()
1233 dsi->host.ops = &mtk_dsi_ops; in mtk_dsi_probe()
1234 dsi->host.dev = dev; in mtk_dsi_probe()
1235 ret = mipi_dsi_host_register(&dsi->host); in mtk_dsi_probe()
1237 return dev_err_probe(dev, ret, "Failed to register DSI host\n"); in mtk_dsi_probe()
1240 IRQF_TRIGGER_NONE, dev_name(&pdev->dev), dsi); in mtk_dsi_probe()
1242 mipi_dsi_host_unregister(&dsi->host); in mtk_dsi_probe()
1243 return dev_err_probe(&pdev->dev, ret, "Failed to request DSI irq\n"); in mtk_dsi_probe()
1246 init_waitqueue_head(&dsi->irq_wait_queue); in mtk_dsi_probe()
1248 platform_set_drvdata(pdev, dsi); in mtk_dsi_probe()
1250 dsi->bridge.funcs = &mtk_dsi_bridge_funcs; in mtk_dsi_probe()
1251 dsi->bridge.of_node = dev->of_node; in mtk_dsi_probe()
1252 dsi->bridge.type = DRM_MODE_CONNECTOR_DSI; in mtk_dsi_probe()
1259 struct mtk_dsi *dsi = platform_get_drvdata(pdev); in mtk_dsi_remove() local
1261 mtk_output_dsi_disable(dsi); in mtk_dsi_remove()
1262 mipi_dsi_host_unregister(&dsi->host); in mtk_dsi_remove()
1304 { .compatible = "mediatek,mt2701-dsi", .data = &mt2701_dsi_driver_data },
1305 { .compatible = "mediatek,mt8173-dsi", .data = &mt8173_dsi_driver_data },
1306 { .compatible = "mediatek,mt8183-dsi", .data = &mt8183_dsi_driver_data },
1307 { .compatible = "mediatek,mt8186-dsi", .data = &mt8186_dsi_driver_data },
1308 { .compatible = "mediatek,mt8188-dsi", .data = &mt8188_dsi_driver_data },
1317 .name = "mtk-dsi",