5  * Permission is hereby granted, free of charge, to any person obtaining
37  *  -EINVAL if GET pointer currently outside main push buffer
38  *  -EBUSY if timeout exceeded
45 	val = nvif_rd32(chan->userd, chan->user_get);  in READ_GET()
46         if (chan->user_get_hi)  in READ_GET()
47 		val |= (uint64_t)nvif_rd32(chan->userd, chan->user_get_hi) << 32;  in READ_GET()
61 			return -EBUSY;  in READ_GET()
64 	if (val < chan->push.addr ||  in READ_GET()
65 	    val > chan->push.addr + (chan->dma.max << 2))  in READ_GET()
66 		return -EINVAL;  in READ_GET()
68 	return (val - chan->push.addr) >> 2;  in READ_GET()
75 	struct nvif_user *user = &chan->cli->drm->client.device.user;  in nv50_dma_push()
76 	struct nouveau_bo *pb = chan->push.buffer;  in nv50_dma_push()
77 	int ip = (chan->dma.ib_put * 2) + chan->dma.ib_base;  in nv50_dma_push()
79 	BUG_ON(chan->dma.ib_free < 1);  in nv50_dma_push()
86 	chan->dma.ib_put = (chan->dma.ib_put + 1) & chan->dma.ib_max;  in nv50_dma_push()
92 	nvif_wr32(chan->userd, 0x8c, chan->dma.ib_put);  in nv50_dma_push()
93 	if (user->func && user->func->doorbell)  in nv50_dma_push()
94 		user->func->doorbell(user, chan->token);  in nv50_dma_push()
95 	chan->dma.ib_free--;  in nv50_dma_push()
103 	while (chan->dma.ib_free < count) {  in nv50_dma_push_wait()
104 		uint32_t get = nvif_rd32(chan->userd, 0x88);  in nv50_dma_push_wait()
113 				return -EBUSY;  in nv50_dma_push_wait()
116 		chan->dma.ib_free = get - chan->dma.ib_put;  in nv50_dma_push_wait()
117 		if (chan->dma.ib_free <= 0)  in nv50_dma_push_wait()
118 			chan->dma.ib_free += chan->dma.ib_max;  in nv50_dma_push_wait()
134 	while (chan->dma.free < count) {  in nv50_dma_wait()
137 			if (get == -EINVAL)  in nv50_dma_wait()
143 		if (get <= chan->dma.cur) {  in nv50_dma_wait()
144 			chan->dma.free = chan->dma.max - chan->dma.cur;  in nv50_dma_wait()
145 			if (chan->dma.free >= count)  in nv50_dma_wait()
152 					if (get == -EINVAL)  in nv50_dma_wait()
157 			chan->dma.cur = 0;  in nv50_dma_wait()
158 			chan->dma.put = 0;  in nv50_dma_wait()
161 		chan->dma.free = get - chan->dma.cur - 1;  in nv50_dma_wait()
173 	if (chan->dma.ib_max)  in nouveau_dma_wait()
176 	while (chan->dma.free < size) {  in nouveau_dma_wait()
178 		if (unlikely(get == -EBUSY))  in nouveau_dma_wait()
179 			return -EBUSY;  in nouveau_dma_wait()
190 		if (unlikely(get == -EINVAL) || get < NOUVEAU_DMA_SKIPS)  in nouveau_dma_wait()
193 		if (get <= chan->dma.cur) {  in nouveau_dma_wait()
194 			/* engine is fetching behind us, or is completely  in nouveau_dma_wait()
195 			 * idle (GET == PUT) so we have free space up until  in nouveau_dma_wait()
200 			 * we'll hit the fetching-ahead-of-us path from that  in nouveau_dma_wait()
205 			 * always succeed and break us out of the wait loop.  in nouveau_dma_wait()
207 			chan->dma.free = chan->dma.max - chan->dma.cur;  in nouveau_dma_wait()
208 			if (chan->dma.free >= size)  in nouveau_dma_wait()
215 			OUT_RING(chan, chan->push.addr | 0x20000000);  in nouveau_dma_wait()
217 			/* wait for GET to depart from the skips area.  in nouveau_dma_wait()
219 			 * condition that causes us to think the GPU is  in nouveau_dma_wait()
224 				if (unlikely(get == -EBUSY))  in nouveau_dma_wait()
225 					return -EBUSY;  in nouveau_dma_wait()
226 				if (unlikely(get == -EINVAL))  in nouveau_dma_wait()
234 			chan->dma.cur  =  in nouveau_dma_wait()
235 			chan->dma.put  = NOUVEAU_DMA_SKIPS;  in nouveau_dma_wait()
238 		/* engine fetching ahead of us, we have space up until the  in nouveau_dma_wait()
239 		 * current GET pointer.  the "- 1" is to ensure there's  in nouveau_dma_wait()
244 		chan->dma.free = get - chan->dma.cur - 1;  in nouveau_dma_wait()