Lines Matching defs:rv7xx_power_info
75 struct rv7xx_power_info { struct
77 bool mem_gddr5;
78 bool pcie_gen2;
79 bool dynamic_pcie_gen2;
80 bool acpi_pcie_gen2;
81 bool boot_in_gen2;
82 bool voltage_control; /* vddc */
83 bool mvdd_control;
84 bool sclk_ss;
85 bool mclk_ss;
86 bool dynamic_ss;
87 bool gfx_clock_gating;
88 bool mg_clock_gating;
89 bool mgcgtssm;
90 bool power_gating;
91 bool thermal_protection;
92 bool display_gap;
93 bool dcodt;
94 bool ulps;
96 union r7xx_clock_registers clk_regs;
97 u32 s0_vid_lower_smio_cntl;
99 u32 vddc_mask_low;
100 u32 mvdd_mask_low;
101 u32 mvdd_split_frequency;
102 u32 mvdd_low_smio[MAX_NO_OF_MVDD_VALUES];
103 u16 max_vddc;
104 u16 max_vddc_in_table;
105 u16 min_vddc_in_table;
106 struct vddc_table_entry vddc_table[MAX_NO_VREG_STEPS];
107 u8 valid_vddc_entries;
109 u32 mclk_odt_threshold;
110 u8 odt_value_0[2];
111 u8 odt_value_1[2];
113 u32 boot_sclk;
114 u16 acpi_vddc;
115 u32 ref_div;
116 u32 active_auto_throttle_sources;
117 u32 mclk_stutter_mode_threshold;
118 u32 mclk_strobe_mode_threshold;
119 u32 mclk_edc_enable_threshold;
120 u32 bsp;
121 u32 bsu;
122 u32 pbsp;
123 u32 pbsu;
124 u32 dsp;
125 u32 psp;
126 u32 asi;
127 u32 pasi;
128 u32 vrc;
129 u32 restricted_levels;
130 u32 rlp;
131 u32 rmp;
132 u32 lhp;
133 u32 lmp;
135 u16 state_table_start;
136 u16 soft_regs_start;
137 u16 sram_end;
139 RV770_SMC_STATETABLE smc_statetable;