3  * This driver enables Trace Buffer Extension (TRBE) as a per-cpu coresight
24 #include "coresight-trbe.h"
31  * data which could not be decoded. TRBE doesn't support
64 	/* The base programmed into the TRBE */
75  * TRBE erratum list
79  * to the affected CPUs inside the TRBE driver, we need to know if
81  * work arounds, TRBE driver needs to check multiple times during
84  * We keep a set of the affected errata in trbe_cpudata, per TRBE.
87  * TRBE erratum. We map the given cpucap into a TRBE internal number
119  * struct trbe_cpudata: TRBE instance specific data
120  * @trbe_flag		- TRBE dirty/access flag support
121  * @trbe_hw_align	- Actual TRBE alignment required for TRBPTR_EL1.
123  * @cpu			- CPU this TRBE belongs to.
125  * @drvdata		- TRBE specific drvdata
126  * @errata		- Bit map for the errata on this TRBE.
181 	 * Errata affected TRBE implementation will need TSB CSYNC and  in trbe_needs_drain_after_disable()
182 	 * DSB in order to prevent subsequent writes into certain TRBE  in trbe_needs_drain_after_disable()
191 	 * Errata affected TRBE implementation will need an additional  in trbe_needs_ctxt_sync_after_enable()
193 	 * TRBE prohibited region view on the CPU which could possibly  in trbe_needs_ctxt_sync_after_enable()
194 	 * corrupt the TRBE buffer or the TRBE state.  in trbe_needs_ctxt_sync_after_enable()
220 	 * Enable the TRBE without clearing LIMITPTR which  in set_trbe_enabled()
227 	/* Synchronize the TRBE enable event */  in set_trbe_enabled()
239 	 * Disable the TRBE without clearing LIMITPTR which  in set_trbe_disabled()
271 	 * the TRBE trace collection was stopped without stopping the  in trbe_report_wrap_event()
293 	 * at event_stop(). So disable the TRBE here and leave  in trbe_stop_and_truncate_event()
303  * TRBE Buffer Management
305  * The TRBE buffer spans from the base pointer till the limit pointer. When enabled,
308  * wrapped around again to the base pointer. This is called a TRBE wrap event, which
310  * uses FILL mode, where the TRBE stops the trace collection at wrap event. The IRQ
311  * handler updates the AUX buffer and re-enables the TRBE with updated WRITE and
325  * pointer can be aligned to the implementation defined TRBE trace buffer alignment
338  * the wakeup is behind the tail. Enabled TRBE buffer span needs to be adjusted and
341  * consumed from the user space. The enabled TRBE buffer area is a moving subset of
379 	 * When the TRBE is affected by an erratum that could make it  in trbe_min_trace_buf_size()
392  * TRBE Limit Calculation
394  * The following markers are used to illustrate various TRBE buffer situations.
415 	 *	head	TRBE align	tail  in __trbe_normal_offset()
423 	 * needs to be aligned before TRBE can be configured. Pad the alignment  in __trbe_normal_offset()
452 	 * Lets calculate the buffer area which TRBE could write into. There  in __trbe_normal_offset()
454 	 * PAGE_SIZE per the TRBE requirement. Always avoid clobbering the  in __trbe_normal_offset()
465 	 * TRBE could write into [head..tail] area. Unless the tail is right at  in __trbe_normal_offset()
477 	 * TRBE should just write into [head..base + nr_pages] area even though  in __trbe_normal_offset()
490 	 * TRBE should just write into [head..base + nr_pages] area even though  in __trbe_normal_offset()
517 	 * the head and hence TRBE cannot be configured.  in __trbe_normal_offset()
613 	 * TRBE for trace capture. In this particular mode, the trace  in set_trbe_limit_pointer_enabled()
618 	 * the TRBE.  in set_trbe_limit_pointer_enabled()
624 	 * Trigger mode is not used here while configuring the TRBE for  in set_trbe_limit_pointer_enabled()
645 	 * till now before enabling the TRBE.  in trbe_enable_hw()
667 	 * If the trbe is affected by TRBE_WORKAROUND_OVERWRITE_FILL_MODE,  in trbe_get_fault_act()
688 	 * If the TRBE has wrapped around the write pointer has  in trbe_get_trace_size()
691 	 * When the TRBE is affected by TRBE_WORKAROUND_WRITE_OUT_OF_RANGE,  in trbe_get_trace_size()
708 	 * TRBE may use a different base address than the base  in trbe_get_trace_size()
720 	 * If the TRBE is affected by the following erratum, we must fill  in trbe_get_trace_size()
740 	 * TRBE LIMIT and TRBE WRITE pointers must be page aligned. But with  in arm_trbe_alloc_buffer()
742 	 * into a partially filled TRBE buffer after the page size alignment.  in arm_trbe_alloc_buffer()
803 	 * We are about to disable the TRBE. And this could in turn  in arm_trbe_update_buffer()
814 	 * If the TRBE was disabled due to lack of space in the AUX buffer or a  in arm_trbe_update_buffer()
825 	 * perf handle structure needs to be shared with the TRBE IRQ handler for  in arm_trbe_update_buffer()
828 	 * while a TRBE IRQ also getting processed. This happens due the release  in arm_trbe_update_buffer()
830 	 * the TRBE here will ensure that no IRQ could be generated when the perf  in arm_trbe_update_buffer()
875 	 * TRBE_WORKAROUND_OVERWRITE_FILL_MODE causes the TRBE to overwrite a few cache  in trbe_apply_work_around_before_enable()
889 	 * the TRBE could overwrite the contents at the "normal-BASE", after  in trbe_apply_work_around_before_enable()
936 	 *  - At TRBE enable:  in trbe_apply_work_around_before_enable()
955 	 * TRBE_WORKAROUND_WRITE_OUT_OF_RANGE could cause the TRBE to write to  in trbe_apply_work_around_before_enable()
958 	 *     - The page beyond the ring buffer. This could mean, TRBE could  in trbe_apply_work_around_before_enable()
969 	 *       the TRBE's range (i.e [TRBBASER, TRBLIMITR.LIMI] ).  in trbe_apply_work_around_before_enable()
975 		 * range for the TRBE.  in trbe_apply_work_around_before_enable()
998 	/* Set the base of the TRBE to the buffer base */  in __arm_trbe_enable()
1058 	 * If the IRQ was spurious, simply re-enable the TRBE  in trbe_handle_spurious()
1082 		 * thus leave the TRBE disabled. The etm-perf driver  in trbe_handle_overflow()
1136 	/* Reads to TRBSR_EL1 is fine when TRBE is active */  in arm_trbe_irq_handler()
1145 	/* Prohibit the CPU from tracing before we disable the TRBE */  in arm_trbe_irq_handler()
1262 	/* If the TRBE was not probed on the CPU, we shouldn't be here */  in arm_trbe_register_coresight_cpu()
1267 	desc.name = devm_kasprintf(dev, GFP_KERNEL, "trbe%d", cpu);  in arm_trbe_register_coresight_cpu()
1271 	 * TRBE coresight devices do not need regular connections  in arm_trbe_register_coresight_cpu()
1275 	 * platform_data, which TRBE devices do not have. As they  in arm_trbe_register_coresight_cpu()
1315 		pr_err("TRBE is not implemented on cpu %d\n", cpu);  in arm_trbe_probe_cpu()
1321 		pr_err("TRBE is owned in higher exception level on cpu %d\n", cpu);  in arm_trbe_probe_cpu()
1332 	 * Run the TRBE erratum checks, now that we know  in arm_trbe_probe_cpu()
1338 		pr_err("Disabling TRBE on cpu%d due to erratum\n", cpu);  in arm_trbe_probe_cpu()
1343 	 * If the TRBE is affected by erratum TRBE_WORKAROUND_OVERWRITE_FILL_MODE,  in arm_trbe_probe_cpu()
1346 	 * TRBE over-writing 256bytes at TRBBASER_EL1 on FILL event.  in arm_trbe_probe_cpu()
1422 		 * If this CPU was not probed for TRBE,  in arm_trbe_cpu_startup()
1517 		pr_err("TRBE wouldn't work if kernel gets unmapped at EL0\n");  in arm_trbe_device_probe()
1601 MODULE_DESCRIPTION("Arm Trace Buffer Extension (TRBE) driver");