Lines Matching +full:imx21 +full:- +full:i2c
1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2002 Motorola GSG-China
9 * Implementation of I2C Adapter/Algorithm Driver
10 * for I2C Bus integrated in Freescale i.MX/MXC processors
12 * Derived from Motorola GSG China I2C example driver
28 #include <linux/dma-mapping.h>
34 #include <linux/i2c.h>
46 #include <linux/platform_data/i2c-imx.h>
53 #define DRIVER_NAME "imx-i2c"
66 /* IMX I2C registers:
67 * the I2C register offset is different between SoCs,
74 #define IMX_I2C_IADR 0x00 /* i2c slave address */
75 #define IMX_I2C_IFDR 0x01 /* i2c frequency divider */
76 #define IMX_I2C_I2CR 0x02 /* i2c control */
77 #define IMX_I2C_I2SR 0x03 /* i2c status */
78 #define IMX_I2C_I2DR 0x04 /* i2c transfer data */
83 #define IMX_I2C_IBIC 0x05 /* i2c bus interrupt config */
89 /* Bits of IMX I2C registers */
108 * - write zero to clear(w0c) INT flag on i.MX,
109 * - but write one to clear(w1c) INT flag on Vybrid.
110 * 2) I2CR: I2C module enable operation also differ between SoCs:
111 * - set I2CR_IEN bit enable the module on i.MX,
112 * - but clear I2CR_IEN bit enable the module on Vybrid.
123 * taken from table 26-5, p.26-9, Freescale i.MX
209 * I2C: When the I2C clock speed is configured for 400 kHz,
210 * the SCL low period violates the I2C spec of 1.3 uS min.
319 .name = "imx1-i2c",
322 .name = "imx21-i2c",
331 { .compatible = "fsl,imx1-i2c", .data = &imx1_i2c_hwdata, },
332 { .compatible = "fsl,imx21-i2c", .data = &imx21_i2c_hwdata, },
333 { .compatible = "fsl,imx6q-i2c", .data = &imx6_i2c_hwdata, },
334 { .compatible = "fsl,imx6sl-i2c", .data = &imx6_i2c_hwdata, },
335 { .compatible = "fsl,imx6sll-i2c", .data = &imx6_i2c_hwdata, },
336 { .compatible = "fsl,imx6sx-i2c", .data = &imx6_i2c_hwdata, },
337 { .compatible = "fsl,imx6ul-i2c", .data = &imx6_i2c_hwdata, },
338 { .compatible = "fsl,imx7d-i2c", .data = &imx6_i2c_hwdata, },
339 { .compatible = "fsl,imx7s-i2c", .data = &imx6_i2c_hwdata, },
340 { .compatible = "fsl,imx8mm-i2c", .data = &imx6_i2c_hwdata, },
341 { .compatible = "fsl,imx8mn-i2c", .data = &imx6_i2c_hwdata, },
342 { .compatible = "fsl,imx8mp-i2c", .data = &imx6_i2c_hwdata, },
343 { .compatible = "fsl,imx8mq-i2c", .data = &imx6_i2c_hwdata, },
344 { .compatible = "fsl,vf610-i2c", .data = &vf610_i2c_hwdata, },
345 { .compatible = "nxp,s32g2-i2c", .data = &s32g2_i2c_hwdata, },
358 return i2c_imx->hwdata->devtype == IMX1_I2C; in is_imx1_i2c()
363 return i2c_imx->hwdata->devtype == VF610_I2C; in is_vf610_i2c()
369 writeb(val, i2c_imx->base + (reg << i2c_imx->hwdata->regshift)); in imx_i2c_write_reg()
375 return readb(i2c_imx->base + (reg << i2c_imx->hwdata->regshift)); in imx_i2c_read_reg()
387 temp = ~i2c_imx->hwdata->i2sr_clr_opcode ^ bits; in i2c_imx_clear_irq()
391 /* Set up i2c controller register and i2c status register to default value. */
394 imx_i2c_write_reg(i2c_imx->hwdata->i2cr_ien_opcode ^ I2CR_IEN, in i2c_imx_reset_regs()
404 struct device *dev = i2c_imx->adapter.dev.parent; in i2c_imx_dma_request()
409 return -ENOMEM; in i2c_imx_dma_request()
411 dma->chan_tx = dma_request_chan(dev, "tx"); in i2c_imx_dma_request()
412 if (IS_ERR(dma->chan_tx)) { in i2c_imx_dma_request()
413 ret = PTR_ERR(dma->chan_tx); in i2c_imx_dma_request()
414 if (ret != -ENODEV && ret != -EPROBE_DEFER) in i2c_imx_dma_request()
420 (IMX_I2C_I2DR << i2c_imx->hwdata->regshift); in i2c_imx_dma_request()
424 ret = dmaengine_slave_config(dma->chan_tx, &dma_sconfig); in i2c_imx_dma_request()
430 dma->chan_rx = dma_request_chan(dev, "rx"); in i2c_imx_dma_request()
431 if (IS_ERR(dma->chan_rx)) { in i2c_imx_dma_request()
432 ret = PTR_ERR(dma->chan_rx); in i2c_imx_dma_request()
433 if (ret != -ENODEV && ret != -EPROBE_DEFER) in i2c_imx_dma_request()
439 (IMX_I2C_I2DR << i2c_imx->hwdata->regshift); in i2c_imx_dma_request()
443 ret = dmaengine_slave_config(dma->chan_rx, &dma_sconfig); in i2c_imx_dma_request()
449 i2c_imx->dma = dma; in i2c_imx_dma_request()
450 init_completion(&dma->cmd_complete); in i2c_imx_dma_request()
452 dma_chan_name(dma->chan_tx), dma_chan_name(dma->chan_rx)); in i2c_imx_dma_request()
457 dma_release_channel(dma->chan_rx); in i2c_imx_dma_request()
459 dma_release_channel(dma->chan_tx); in i2c_imx_dma_request()
469 struct imx_i2c_dma *dma = i2c_imx->dma; in i2c_imx_dma_callback()
471 dma_unmap_single(dma->chan_using->device->dev, dma->dma_buf, in i2c_imx_dma_callback()
472 dma->dma_len, dma->dma_data_dir); in i2c_imx_dma_callback()
473 complete(&dma->cmd_complete); in i2c_imx_dma_callback()
479 struct imx_i2c_dma *dma = i2c_imx->dma; in i2c_imx_dma_xfer()
481 struct device *dev = &i2c_imx->adapter.dev; in i2c_imx_dma_xfer()
482 struct device *chan_dev = dma->chan_using->device->dev; in i2c_imx_dma_xfer()
484 dma->dma_buf = dma_map_single(chan_dev, msgs->buf, in i2c_imx_dma_xfer()
485 dma->dma_len, dma->dma_data_dir); in i2c_imx_dma_xfer()
486 if (dma_mapping_error(chan_dev, dma->dma_buf)) { in i2c_imx_dma_xfer()
491 txdesc = dmaengine_prep_slave_single(dma->chan_using, dma->dma_buf, in i2c_imx_dma_xfer()
492 dma->dma_len, dma->dma_transfer_dir, in i2c_imx_dma_xfer()
499 reinit_completion(&dma->cmd_complete); in i2c_imx_dma_xfer()
500 txdesc->callback = i2c_imx_dma_callback; in i2c_imx_dma_xfer()
501 txdesc->callback_param = i2c_imx; in i2c_imx_dma_xfer()
507 dma_async_issue_pending(dma->chan_using); in i2c_imx_dma_xfer()
511 dmaengine_terminate_sync(dma->chan_using); in i2c_imx_dma_xfer()
513 dma_unmap_single(chan_dev, dma->dma_buf, in i2c_imx_dma_xfer()
514 dma->dma_len, dma->dma_data_dir); in i2c_imx_dma_xfer()
516 return -EINVAL; in i2c_imx_dma_xfer()
521 struct imx_i2c_dma *dma = i2c_imx->dma; in i2c_imx_dma_free()
523 dma->dma_buf = 0; in i2c_imx_dma_free()
524 dma->dma_len = 0; in i2c_imx_dma_free()
526 dma_release_channel(dma->chan_tx); in i2c_imx_dma_free()
527 dma->chan_tx = NULL; in i2c_imx_dma_free()
529 dma_release_channel(dma->chan_rx); in i2c_imx_dma_free()
530 dma->chan_rx = NULL; in i2c_imx_dma_free()
532 dma->chan_using = NULL; in i2c_imx_dma_free()
537 bool multi_master = i2c_imx->multi_master; in i2c_imx_bus_busy()
547 return -EAGAIN; in i2c_imx_bus_busy()
551 i2c_imx->stopped = 0; in i2c_imx_bus_busy()
555 i2c_imx->stopped = 1; in i2c_imx_bus_busy()
559 dev_dbg(&i2c_imx->adapter.dev, in i2c_imx_bus_busy()
560 "<%s> I2C bus is busy\n", __func__); in i2c_imx_bus_busy()
561 return -ETIMEDOUT; in i2c_imx_bus_busy()
575 void __iomem *addr = i2c_imx->base + (IMX_I2C_I2SR << i2c_imx->hwdata->regshift); in i2c_imx_trx_complete()
582 * Set the value hard as it is done for the non-atomic use-case. in i2c_imx_trx_complete()
589 i2c_imx->i2csr = regval; in i2c_imx_trx_complete()
592 wait_event_timeout(i2c_imx->queue, i2c_imx->i2csr & I2SR_IIF, HZ / 10); in i2c_imx_trx_complete()
595 if (unlikely(!(i2c_imx->i2csr & I2SR_IIF))) { in i2c_imx_trx_complete()
596 dev_dbg(&i2c_imx->adapter.dev, "<%s> Timeout\n", __func__); in i2c_imx_trx_complete()
597 return -ETIMEDOUT; in i2c_imx_trx_complete()
600 /* In multi-master mode check for arbitration lost */ in i2c_imx_trx_complete()
601 if (i2c_imx->multi_master && (i2c_imx->i2csr & I2SR_IAL)) { in i2c_imx_trx_complete()
602 dev_dbg(&i2c_imx->adapter.dev, "<%s> Arbitration lost\n", __func__); in i2c_imx_trx_complete()
605 i2c_imx->i2csr = 0; in i2c_imx_trx_complete()
606 return -EAGAIN; in i2c_imx_trx_complete()
609 dev_dbg(&i2c_imx->adapter.dev, "<%s> TRX complete\n", __func__); in i2c_imx_trx_complete()
610 i2c_imx->i2csr = 0; in i2c_imx_trx_complete()
617 dev_dbg(&i2c_imx->adapter.dev, "<%s> No ACK\n", __func__); in i2c_imx_acked()
618 return -ENXIO; /* No ACK */ in i2c_imx_acked()
621 dev_dbg(&i2c_imx->adapter.dev, "<%s> ACK received\n", __func__); in i2c_imx_acked()
628 struct imx_i2c_clk_pair *i2c_clk_div = i2c_imx->hwdata->clk_div; in i2c_imx_set_clk()
632 if (i2c_imx->hwdata->has_err007805 && i2c_imx->bitrate > 384000) { in i2c_imx_set_clk()
633 dev_dbg(&i2c_imx->adapter.dev, in i2c_imx_set_clk()
635 i2c_imx->bitrate); in i2c_imx_set_clk()
636 i2c_imx->bitrate = 384000; in i2c_imx_set_clk()
640 if (i2c_imx->cur_clk == i2c_clk_rate) in i2c_imx_set_clk()
645 return -EINVAL; in i2c_imx_set_clk()
647 i2c_imx->cur_clk = i2c_clk_rate; in i2c_imx_set_clk()
649 div = DIV_ROUND_UP(i2c_clk_rate, i2c_imx->bitrate); in i2c_imx_set_clk()
652 else if (div > i2c_clk_div[i2c_imx->hwdata->ndivs - 1].div) in i2c_imx_set_clk()
653 i = i2c_imx->hwdata->ndivs - 1; in i2c_imx_set_clk()
659 i2c_imx->ifdr = i2c_clk_div[i].val; in i2c_imx_set_clk()
663 * It should be about one I2C clock period long. in i2c_imx_set_clk()
664 * This delay is used in I2C bus disable function in i2c_imx_set_clk()
667 i2c_imx->disable_delay = DIV_ROUND_UP(500000U * i2c_clk_div[i].div, in i2c_imx_set_clk()
671 dev_dbg(&i2c_imx->adapter.dev, "I2C_CLK=%d, REQ DIV=%d\n", in i2c_imx_set_clk()
673 dev_dbg(&i2c_imx->adapter.dev, "IFDR[IC]=0x%x, REAL DIV=%d\n", in i2c_imx_set_clk()
690 ret = i2c_imx_set_clk(i2c_imx, ndata->new_rate); in i2c_imx_clk_notifier_call()
700 imx_i2c_write_reg(i2c_imx->ifdr, i2c_imx, IMX_I2C_IFDR); in i2c_imx_start()
701 /* Enable I2C controller */ in i2c_imx_start()
702 imx_i2c_write_reg(i2c_imx->hwdata->i2sr_clr_opcode, i2c_imx, IMX_I2C_I2SR); in i2c_imx_start()
703 imx_i2c_write_reg(i2c_imx->hwdata->i2cr_ien_opcode, i2c_imx, IMX_I2C_I2CR); in i2c_imx_start()
711 /* Start I2C transaction */ in i2c_imx_start()
732 if (!i2c_imx->stopped) { in i2c_imx_stop()
733 /* Stop I2C transaction */ in i2c_imx_stop()
736 i2c_imx->stopped = 1; in i2c_imx_stop()
738 if (i2c_imx->dma) in i2c_imx_stop()
747 udelay(i2c_imx->disable_delay); in i2c_imx_stop()
750 if (!i2c_imx->stopped) in i2c_imx_stop()
753 /* Disable I2C controller */ in i2c_imx_stop()
754 temp = i2c_imx->hwdata->i2cr_ien_opcode ^ I2CR_IEN; in i2c_imx_stop()
760 * Note: IBIC register will be cleared after disabled i2c module.
777 i2c_slave_event(i2c_imx->slave, event, val); in i2c_imx_slave_event()
778 i2c_imx->last_slave_event = event; in i2c_imx_slave_event()
785 while (i2c_imx->last_slave_event != I2C_SLAVE_STOP) { in i2c_imx_slave_finish_op()
786 switch (i2c_imx->last_slave_event) { in i2c_imx_slave_finish_op()
829 dev_dbg(&i2c_imx->adapter.dev, "read requested"); in i2c_imx_slave_handle()
840 dev_dbg(&i2c_imx->adapter.dev, "write requested"); in i2c_imx_slave_handle()
878 * 1, then everything is fine. If it returns -1, then the in i2c_imx_slave_handle()
883 hrtimer_try_to_cancel(&i2c_imx->slave_timer); in i2c_imx_slave_handle()
884 hrtimer_forward_now(&i2c_imx->slave_timer, I2C_IMX_CHECK_DELAY); in i2c_imx_slave_handle()
885 hrtimer_restart(&i2c_imx->slave_timer); in i2c_imx_slave_handle()
896 spin_lock_irqsave(&i2c_imx->slave_lock, flags); in i2c_imx_slave_timeout()
900 spin_unlock_irqrestore(&i2c_imx->slave_lock, flags); in i2c_imx_slave_timeout()
909 imx_i2c_write_reg((i2c_imx->slave->addr << 1), i2c_imx, IMX_I2C_IADR); in i2c_imx_slave_init()
914 temp = i2c_imx->hwdata->i2cr_ien_opcode; in i2c_imx_slave_init()
917 /* Enable interrupt from i2c module */ in i2c_imx_slave_init()
926 struct imx_i2c_struct *i2c_imx = i2c_get_adapdata(client->adapter); in i2c_imx_reg_slave()
929 if (i2c_imx->slave) in i2c_imx_reg_slave()
930 return -EBUSY; in i2c_imx_reg_slave()
932 i2c_imx->slave = client; in i2c_imx_reg_slave()
933 i2c_imx->last_slave_event = I2C_SLAVE_STOP; in i2c_imx_reg_slave()
936 ret = pm_runtime_resume_and_get(i2c_imx->adapter.dev.parent); in i2c_imx_reg_slave()
938 dev_err(&i2c_imx->adapter.dev, "failed to resume i2c controller"); in i2c_imx_reg_slave()
949 struct imx_i2c_struct *i2c_imx = i2c_get_adapdata(client->adapter); in i2c_imx_unreg_slave()
952 if (!i2c_imx->slave) in i2c_imx_unreg_slave()
953 return -EINVAL; in i2c_imx_unreg_slave()
960 i2c_imx->slave = NULL; in i2c_imx_unreg_slave()
963 ret = pm_runtime_put_sync(i2c_imx->adapter.dev.parent); in i2c_imx_unreg_slave()
965 dev_err(&i2c_imx->adapter.dev, "failed to suspend i2c controller"); in i2c_imx_unreg_slave()
972 i2c_imx->isr_result = 0; in i2c_imx_isr_acked()
975 i2c_imx->state = IMX_I2C_STATE_FAILED; in i2c_imx_isr_acked()
976 i2c_imx->isr_result = -ENXIO; in i2c_imx_isr_acked()
977 wake_up(&i2c_imx->queue); in i2c_imx_isr_acked()
980 return i2c_imx->isr_result; in i2c_imx_isr_acked()
991 if (i2c_imx->msg->len == i2c_imx->msg_buf_idx) in i2c_imx_isr_write()
994 imx_i2c_write_reg(i2c_imx->msg->buf[i2c_imx->msg_buf_idx++], i2c_imx, IMX_I2C_I2DR); in i2c_imx_isr_write()
1011 if (i2c_imx->msg->len - 1) in i2c_imx_isr_read()
1024 if ((i2c_imx->msg->len - 1) == i2c_imx->msg_buf_idx) { in i2c_imx_isr_read_continue()
1025 if (i2c_imx->is_lastmsg) { in i2c_imx_isr_read_continue()
1032 i2c_imx->stopped = 1; in i2c_imx_isr_read_continue()
1037 * For i2c master receiver repeat restart operation like: in i2c_imx_isr_read_continue()
1038 * read -> repeat MSTA -> read/write in i2c_imx_isr_read_continue()
1047 } else if (i2c_imx->msg_buf_idx == (i2c_imx->msg->len - 2)) { in i2c_imx_isr_read_continue()
1053 i2c_imx->msg->buf[i2c_imx->msg_buf_idx++] = imx_i2c_read_reg(i2c_imx, IMX_I2C_I2DR); in i2c_imx_isr_read_continue()
1061 i2c_imx->isr_result = -EPROTO; in i2c_imx_isr_read_block_data_len()
1062 i2c_imx->state = IMX_I2C_STATE_FAILED; in i2c_imx_isr_read_block_data_len()
1063 wake_up(&i2c_imx->queue); in i2c_imx_isr_read_block_data_len()
1065 i2c_imx->msg->len += len; in i2c_imx_isr_read_block_data_len()
1071 * This state machine handles I2C reception and transmission in non-DMA in i2c_imx_master_isr()
1076 switch (i2c_imx->state) { in i2c_imx_master_isr()
1078 i2c_imx->i2csr = status; in i2c_imx_master_isr()
1079 wake_up(&i2c_imx->queue); in i2c_imx_master_isr()
1085 i2c_imx->state = IMX_I2C_STATE_READ_CONTINUE; in i2c_imx_master_isr()
1090 if (i2c_imx->msg_buf_idx == i2c_imx->msg->len) { in i2c_imx_master_isr()
1091 i2c_imx->state = IMX_I2C_STATE_DONE; in i2c_imx_master_isr()
1092 wake_up(&i2c_imx->queue); in i2c_imx_master_isr()
1099 i2c_imx->state = IMX_I2C_STATE_READ_BLOCK_DATA_LEN; in i2c_imx_master_isr()
1104 i2c_imx->state = IMX_I2C_STATE_READ_CONTINUE; in i2c_imx_master_isr()
1110 i2c_imx->state = IMX_I2C_STATE_DONE; in i2c_imx_master_isr()
1111 wake_up(&i2c_imx->queue); in i2c_imx_master_isr()
1115 i2c_imx->i2csr = status; in i2c_imx_master_isr()
1116 i2c_imx->state = IMX_I2C_STATE_FAILED; in i2c_imx_master_isr()
1117 i2c_imx->isr_result = -EINVAL; in i2c_imx_master_isr()
1118 wake_up(&i2c_imx->queue); in i2c_imx_master_isr()
1130 spin_lock_irqsave(&i2c_imx->slave_lock, flags); in i2c_imx_isr()
1136 if (i2c_imx->slave) { in i2c_imx_isr()
1142 spin_unlock_irqrestore(&i2c_imx->slave_lock, in i2c_imx_isr()
1148 spin_unlock_irqrestore(&i2c_imx->slave_lock, flags); in i2c_imx_isr()
1151 spin_unlock_irqrestore(&i2c_imx->slave_lock, flags); in i2c_imx_isr()
1163 struct imx_i2c_dma *dma = i2c_imx->dma; in i2c_imx_dma_write()
1164 struct device *dev = &i2c_imx->adapter.dev; in i2c_imx_dma_write()
1166 i2c_imx->state = IMX_I2C_STATE_DMA; in i2c_imx_dma_write()
1168 dma->chan_using = dma->chan_tx; in i2c_imx_dma_write()
1169 dma->dma_transfer_dir = DMA_MEM_TO_DEV; in i2c_imx_dma_write()
1170 dma->dma_data_dir = DMA_TO_DEVICE; in i2c_imx_dma_write()
1171 dma->dma_len = msgs->len - 1; in i2c_imx_dma_write()
1186 &i2c_imx->dma->cmd_complete, in i2c_imx_dma_write()
1189 dmaengine_terminate_sync(dma->chan_using); in i2c_imx_dma_write()
1190 return -ETIMEDOUT; in i2c_imx_dma_write()
1201 return -ETIMEDOUT; in i2c_imx_dma_write()
1211 imx_i2c_write_reg(msgs->buf[msgs->len-1], in i2c_imx_dma_write()
1235 dev_dbg(&i2c_imx->adapter.dev, "<%s> setup bus\n", __func__); in i2c_imx_prepare_read()
1245 if (msgs->len - 1) in i2c_imx_prepare_read()
1263 struct imx_i2c_dma *dma = i2c_imx->dma; in i2c_imx_dma_read()
1264 struct device *dev = &i2c_imx->adapter.dev; in i2c_imx_dma_read()
1266 i2c_imx->state = IMX_I2C_STATE_DMA; in i2c_imx_dma_read()
1272 dev_dbg(&i2c_imx->adapter.dev, "<%s> read data\n", __func__); in i2c_imx_dma_read()
1274 dma->chan_using = dma->chan_rx; in i2c_imx_dma_read()
1275 dma->dma_transfer_dir = DMA_DEV_TO_MEM; in i2c_imx_dma_read()
1276 dma->dma_data_dir = DMA_FROM_DEVICE; in i2c_imx_dma_read()
1278 dma->dma_len = msgs->len - 2; in i2c_imx_dma_read()
1284 &i2c_imx->dma->cmd_complete, in i2c_imx_dma_read()
1287 dmaengine_terminate_sync(dma->chan_using); in i2c_imx_dma_read()
1288 return -ETIMEDOUT; in i2c_imx_dma_read()
1299 return -ETIMEDOUT; in i2c_imx_dma_read()
1308 /* read n-1 byte data */ in i2c_imx_dma_read()
1313 msgs->buf[msgs->len-2] = imx_i2c_read_reg(i2c_imx, IMX_I2C_I2DR); in i2c_imx_dma_read()
1327 i2c_imx->stopped = 1; in i2c_imx_dma_read()
1330 if (!i2c_imx->stopped) in i2c_imx_dma_read()
1334 * For i2c master receiver repeat restart operation like: in i2c_imx_dma_read()
1335 * read -> repeat MSTA -> read/write in i2c_imx_dma_read()
1344 msgs->buf[msgs->len-1] = imx_i2c_read_reg(i2c_imx, IMX_I2C_I2DR); in i2c_imx_dma_read()
1354 dev_dbg(&i2c_imx->adapter.dev, "<%s> write slave address: addr=0x%x\n", in i2c_imx_atomic_write()
1365 dev_dbg(&i2c_imx->adapter.dev, "<%s> write data\n", __func__); in i2c_imx_atomic_write()
1368 for (i = 0; i < msgs->len; i++) { in i2c_imx_atomic_write()
1369 dev_dbg(&i2c_imx->adapter.dev, in i2c_imx_atomic_write()
1371 __func__, i, msgs->buf[i]); in i2c_imx_atomic_write()
1372 imx_i2c_write_reg(msgs->buf[i], i2c_imx, IMX_I2C_I2DR); in i2c_imx_atomic_write()
1385 dev_dbg(&i2c_imx->adapter.dev, "<%s> write slave address: addr=0x%x\n", in i2c_imx_write()
1388 i2c_imx->state = IMX_I2C_STATE_WRITE; in i2c_imx_write()
1389 i2c_imx->msg = msgs; in i2c_imx_write()
1390 i2c_imx->msg_buf_idx = 0; in i2c_imx_write()
1397 wait_event_timeout(i2c_imx->queue, in i2c_imx_write()
1398 i2c_imx->state == IMX_I2C_STATE_DONE || in i2c_imx_write()
1399 i2c_imx->state == IMX_I2C_STATE_FAILED, in i2c_imx_write()
1400 (msgs->len + 1) * HZ / 10); in i2c_imx_write()
1401 if (i2c_imx->state == IMX_I2C_STATE_FAILED) { in i2c_imx_write()
1402 dev_dbg(&i2c_imx->adapter.dev, "<%s> write failed with %d\n", in i2c_imx_write()
1403 __func__, i2c_imx->isr_result); in i2c_imx_write()
1404 return i2c_imx->isr_result; in i2c_imx_write()
1406 if (i2c_imx->state != IMX_I2C_STATE_DONE) { in i2c_imx_write()
1407 dev_err(&i2c_imx->adapter.dev, "<%s> write timedout\n", __func__); in i2c_imx_write()
1408 return -ETIMEDOUT; in i2c_imx_write()
1418 int block_data = msgs->flags & I2C_M_RECV_LEN; in i2c_imx_atomic_read()
1424 dev_dbg(&i2c_imx->adapter.dev, "<%s> read data\n", __func__); in i2c_imx_atomic_read()
1427 for (i = 0; i < msgs->len; i++) { in i2c_imx_atomic_read()
1436 * msgs->len. in i2c_imx_atomic_read()
1441 return -EPROTO; in i2c_imx_atomic_read()
1442 dev_dbg(&i2c_imx->adapter.dev, in i2c_imx_atomic_read()
1445 msgs->len += len; in i2c_imx_atomic_read()
1447 if (i == (msgs->len - 1)) { in i2c_imx_atomic_read()
1453 dev_dbg(&i2c_imx->adapter.dev, in i2c_imx_atomic_read()
1457 i2c_imx->stopped = 1; in i2c_imx_atomic_read()
1460 if (!i2c_imx->stopped) in i2c_imx_atomic_read()
1464 * For i2c master receiver repeat restart operation like: in i2c_imx_atomic_read()
1465 * read -> repeat MSTA -> read/write in i2c_imx_atomic_read()
1474 } else if (i == (msgs->len - 2)) { in i2c_imx_atomic_read()
1475 dev_dbg(&i2c_imx->adapter.dev, in i2c_imx_atomic_read()
1482 msgs->buf[0] = len; in i2c_imx_atomic_read()
1484 msgs->buf[i] = imx_i2c_read_reg(i2c_imx, IMX_I2C_I2DR); in i2c_imx_atomic_read()
1485 dev_dbg(&i2c_imx->adapter.dev, in i2c_imx_atomic_read()
1487 __func__, i, msgs->buf[i]); in i2c_imx_atomic_read()
1495 int block_data = msgs->flags & I2C_M_RECV_LEN; in i2c_imx_read()
1497 dev_dbg(&i2c_imx->adapter.dev, in i2c_imx_read()
1501 i2c_imx->is_lastmsg = is_lastmsg; in i2c_imx_read()
1504 i2c_imx->state = IMX_I2C_STATE_READ_BLOCK_DATA; in i2c_imx_read()
1506 i2c_imx->state = IMX_I2C_STATE_READ; in i2c_imx_read()
1507 i2c_imx->msg = msgs; in i2c_imx_read()
1508 i2c_imx->msg_buf_idx = 0; in i2c_imx_read()
1515 wait_event_timeout(i2c_imx->queue, in i2c_imx_read()
1516 i2c_imx->state == IMX_I2C_STATE_DONE || in i2c_imx_read()
1517 i2c_imx->state == IMX_I2C_STATE_FAILED, in i2c_imx_read()
1518 (msgs->len + 1) * HZ / 10); in i2c_imx_read()
1519 if (i2c_imx->state == IMX_I2C_STATE_FAILED) { in i2c_imx_read()
1520 dev_dbg(&i2c_imx->adapter.dev, "<%s> read failed with %d\n", in i2c_imx_read()
1521 __func__, i2c_imx->isr_result); in i2c_imx_read()
1522 return i2c_imx->isr_result; in i2c_imx_read()
1524 if (i2c_imx->state != IMX_I2C_STATE_DONE) { in i2c_imx_read()
1525 dev_err(&i2c_imx->adapter.dev, "<%s> read timedout\n", __func__); in i2c_imx_read()
1526 return -ETIMEDOUT; in i2c_imx_read()
1528 if (!i2c_imx->stopped) in i2c_imx_read()
1543 /* Start I2C transfer */ in i2c_imx_xfer_common()
1550 if (!atomic && i2c_imx->adapter.bus_recovery_info) { in i2c_imx_xfer_common()
1551 i2c_recover_bus(&i2c_imx->adapter); in i2c_imx_xfer_common()
1561 if (i == num - 1) in i2c_imx_xfer_common()
1565 dev_dbg(&i2c_imx->adapter.dev, in i2c_imx_xfer_common()
1574 dev_dbg(&i2c_imx->adapter.dev, in i2c_imx_xfer_common()
1579 dev_dbg(&i2c_imx->adapter.dev, in i2c_imx_xfer_common()
1586 dev_dbg(&i2c_imx->adapter.dev, in i2c_imx_xfer_common()
1595 use_dma = i2c_imx->dma && msgs[i].len >= DMA_THRESHOLD && in i2c_imx_xfer_common()
1598 int block_data = msgs->flags & I2C_M_RECV_LEN; in i2c_imx_xfer_common()
1619 /* Stop I2C transfer */ in i2c_imx_xfer_common()
1622 dev_dbg(&i2c_imx->adapter.dev, "<%s> exit with: %s: %d\n", __func__, in i2c_imx_xfer_common()
1626 if (i2c_imx->slave) in i2c_imx_xfer_common()
1638 result = pm_runtime_resume_and_get(i2c_imx->adapter.dev.parent); in i2c_imx_xfer()
1644 pm_runtime_mark_last_busy(i2c_imx->adapter.dev.parent); in i2c_imx_xfer()
1645 pm_runtime_put_autosuspend(i2c_imx->adapter.dev.parent); in i2c_imx_xfer()
1656 result = clk_enable(i2c_imx->clk); in i2c_imx_xfer_atomic()
1662 clk_disable(i2c_imx->clk); in i2c_imx_xfer_atomic()
1677 struct i2c_bus_recovery_info *bri = &i2c_imx->rinfo; in i2c_imx_init_recovery_info()
1679 bri->pinctrl = devm_pinctrl_get(&pdev->dev); in i2c_imx_init_recovery_info()
1680 if (IS_ERR(bri->pinctrl)) in i2c_imx_init_recovery_info()
1681 return PTR_ERR(bri->pinctrl); in i2c_imx_init_recovery_info()
1683 i2c_imx->adapter.bus_recovery_info = bri; in i2c_imx_init_recovery_info()
1706 struct imxi2c_platform_data *pdata = dev_get_platdata(&pdev->dev); in i2c_imx_probe()
1720 phy_addr = (dma_addr_t)res->start; in i2c_imx_probe()
1721 i2c_imx = devm_kzalloc(&pdev->dev, sizeof(*i2c_imx), GFP_KERNEL); in i2c_imx_probe()
1723 return -ENOMEM; in i2c_imx_probe()
1725 spin_lock_init(&i2c_imx->slave_lock); in i2c_imx_probe()
1726 hrtimer_init(&i2c_imx->slave_timer, CLOCK_MONOTONIC, HRTIMER_MODE_ABS); in i2c_imx_probe()
1727 i2c_imx->slave_timer.function = i2c_imx_slave_timeout; in i2c_imx_probe()
1729 match = device_get_match_data(&pdev->dev); in i2c_imx_probe()
1731 i2c_imx->hwdata = match; in i2c_imx_probe()
1733 i2c_imx->hwdata = (struct imx_i2c_hwdata *) in i2c_imx_probe()
1734 platform_get_device_id(pdev)->driver_data; in i2c_imx_probe()
1737 strscpy(i2c_imx->adapter.name, pdev->name, sizeof(i2c_imx->adapter.name)); in i2c_imx_probe()
1738 i2c_imx->adapter.owner = THIS_MODULE; in i2c_imx_probe()
1739 i2c_imx->adapter.algo = &i2c_imx_algo; in i2c_imx_probe()
1740 i2c_imx->adapter.dev.parent = &pdev->dev; in i2c_imx_probe()
1741 i2c_imx->adapter.nr = pdev->id; in i2c_imx_probe()
1742 i2c_imx->adapter.dev.of_node = pdev->dev.of_node; in i2c_imx_probe()
1743 i2c_imx->base = base; in i2c_imx_probe()
1744 ACPI_COMPANION_SET(&i2c_imx->adapter.dev, ACPI_COMPANION(&pdev->dev)); in i2c_imx_probe()
1746 /* Get I2C clock */ in i2c_imx_probe()
1747 i2c_imx->clk = devm_clk_get_enabled(&pdev->dev, NULL); in i2c_imx_probe()
1748 if (IS_ERR(i2c_imx->clk)) in i2c_imx_probe()
1749 return dev_err_probe(&pdev->dev, PTR_ERR(i2c_imx->clk), in i2c_imx_probe()
1750 "can't get I2C clock\n"); in i2c_imx_probe()
1753 init_waitqueue_head(&i2c_imx->queue); in i2c_imx_probe()
1756 i2c_set_adapdata(&i2c_imx->adapter, i2c_imx); in i2c_imx_probe()
1761 pm_runtime_set_autosuspend_delay(&pdev->dev, I2C_PM_TIMEOUT); in i2c_imx_probe()
1762 pm_runtime_use_autosuspend(&pdev->dev); in i2c_imx_probe()
1763 pm_runtime_set_active(&pdev->dev); in i2c_imx_probe()
1764 pm_runtime_enable(&pdev->dev); in i2c_imx_probe()
1766 ret = pm_runtime_get_sync(&pdev->dev); in i2c_imx_probe()
1772 pdev->name, i2c_imx); in i2c_imx_probe()
1774 dev_err(&pdev->dev, "can't claim irq %d\n", irq); in i2c_imx_probe()
1779 * We use the single-master property for backward compatibility. in i2c_imx_probe()
1782 i2c_imx->multi_master = !of_property_read_bool(pdev->dev.of_node, "single-master"); in i2c_imx_probe()
1785 i2c_imx->bitrate = I2C_MAX_STANDARD_MODE_FREQ; in i2c_imx_probe()
1786 ret = of_property_read_u32(pdev->dev.of_node, in i2c_imx_probe()
1787 "clock-frequency", &i2c_imx->bitrate); in i2c_imx_probe()
1788 if (ret < 0 && pdata && pdata->bitrate) in i2c_imx_probe()
1789 i2c_imx->bitrate = pdata->bitrate; in i2c_imx_probe()
1790 i2c_imx->clk_change_nb.notifier_call = i2c_imx_clk_notifier_call; in i2c_imx_probe()
1791 clk_notifier_register(i2c_imx->clk, &i2c_imx->clk_change_nb); in i2c_imx_probe()
1792 ret = i2c_imx_set_clk(i2c_imx, clk_get_rate(i2c_imx->clk)); in i2c_imx_probe()
1794 dev_err(&pdev->dev, "can't get I2C clock\n"); in i2c_imx_probe()
1803 if (ret == -EPROBE_DEFER) in i2c_imx_probe()
1807 * DMA mode should be optional for I2C, when encountering DMA errors, in i2c_imx_probe()
1808 * no need to exit I2C probe. Only print warning to show DMA error and in i2c_imx_probe()
1809 * use PIO mode directly to ensure I2C bus available as much as possible. in i2c_imx_probe()
1813 if (ret == -EPROBE_DEFER) in i2c_imx_probe()
1815 else if (ret == -ENODEV) in i2c_imx_probe()
1816 dev_dbg(&pdev->dev, "Only use PIO mode\n"); in i2c_imx_probe()
1818 dev_warn(&pdev->dev, "Failed to setup DMA (%pe), only use PIO mode\n", in i2c_imx_probe()
1822 /* Add I2C adapter */ in i2c_imx_probe()
1823 ret = i2c_add_numbered_adapter(&i2c_imx->adapter); in i2c_imx_probe()
1827 pm_runtime_mark_last_busy(&pdev->dev); in i2c_imx_probe()
1828 pm_runtime_put_autosuspend(&pdev->dev); in i2c_imx_probe()
1830 dev_dbg(&i2c_imx->adapter.dev, "claimed irq %d\n", irq); in i2c_imx_probe()
1831 dev_dbg(&i2c_imx->adapter.dev, "device resources: %pR\n", res); in i2c_imx_probe()
1832 dev_dbg(&i2c_imx->adapter.dev, "adapter name: \"%s\"\n", in i2c_imx_probe()
1833 i2c_imx->adapter.name); in i2c_imx_probe()
1834 dev_info(&i2c_imx->adapter.dev, "IMX I2C adapter registered\n"); in i2c_imx_probe()
1839 clk_notifier_unregister(i2c_imx->clk, &i2c_imx->clk_change_nb); in i2c_imx_probe()
1842 pm_runtime_put_noidle(&pdev->dev); in i2c_imx_probe()
1843 pm_runtime_disable(&pdev->dev); in i2c_imx_probe()
1844 pm_runtime_set_suspended(&pdev->dev); in i2c_imx_probe()
1845 pm_runtime_dont_use_autosuspend(&pdev->dev); in i2c_imx_probe()
1854 ret = pm_runtime_get_sync(&pdev->dev); in i2c_imx_remove()
1856 hrtimer_cancel(&i2c_imx->slave_timer); in i2c_imx_remove()
1859 dev_dbg(&i2c_imx->adapter.dev, "adapter removed\n"); in i2c_imx_remove()
1860 i2c_del_adapter(&i2c_imx->adapter); in i2c_imx_remove()
1862 if (i2c_imx->dma) in i2c_imx_remove()
1873 clk_notifier_unregister(i2c_imx->clk, &i2c_imx->clk_change_nb); in i2c_imx_remove()
1878 pm_runtime_put_noidle(&pdev->dev); in i2c_imx_remove()
1879 pm_runtime_disable(&pdev->dev); in i2c_imx_remove()
1886 clk_disable(i2c_imx->clk); in i2c_imx_runtime_suspend()
1899 ret = clk_enable(i2c_imx->clk); in i2c_imx_runtime_resume()
1901 dev_err(dev, "can't enable I2C clock, ret=%d\n", ret); in i2c_imx_runtime_resume()
1909 * Some I2C devices may need the I2C controller to remain active in i2c_imx_suspend()
1914 * During system resume, the I2C controller will be available only in i2c_imx_suspend()
1915 * after runtime PM is re-enabled (in resume_early()). However, this in i2c_imx_suspend()
1919 * is still enabled. The I2C controller will remain available until in i2c_imx_suspend()
1921 * called. During resume, the I2C controller can be restored by the in i2c_imx_suspend()
1924 * Finally, the resume() callback re-enables autosuspend, ensuring in i2c_imx_suspend()
1925 * the I2C controller remains available until the system enters in i2c_imx_suspend()
1972 MODULE_DESCRIPTION("I2C adapter driver for IMX I2C bus");