Lines Matching full:isr
139 u32 isr; member
161 .isr = 0x18,
170 .isr = 0x0c,
179 .isr = 0x04,
188 .isr = 0x18,
199 .isr = 0x0c,
324 decode_bits(KERN_DEBUG "ISR", isr_bits, ARRAY_SIZE(isr_bits), val); in decode_ISR()
356 dev_dbg(&i2c->adap.dev, "state:%s:%d: ISR=%08x, ICR=%08x, IBMR=%02x\n", fname, lno, in i2c_pxa_show_state()
371 dev_err(dev, "IBMR: %08x IDBR: %08x ICR: %08x ISR: %08x\n", in i2c_pxa_scream_blue_murder()
428 u32 isr; in i2c_pxa_wait_bus_not_busy() local
431 isr = readl(_ISR(i2c)); in i2c_pxa_wait_bus_not_busy()
432 if (!(isr & (ISR_IBB | ISR_UB))) in i2c_pxa_wait_bus_not_busy()
435 if (isr & ISR_SAD) in i2c_pxa_wait_bus_not_busy()
456 dev_dbg(&i2c->adap.dev, "%s: %ld: ISR=%08x, ICR=%08x, IBMR=%02x\n", in i2c_pxa_wait_master()
513 dev_dbg(&i2c->adap.dev, "%s: %ld: ISR=%08x, ICR=%08x, IBMR=%02x\n", in i2c_pxa_wait_slave()
562 dev_dbg(&i2c->adap.dev, "ICR now %08x, ISR %08x\n", readl(_ICR(i2c)), readl(_ISR(i2c))); in i2c_pxa_set_slave()
615 static void i2c_pxa_slave_txempty(struct pxa_i2c *i2c, u32 isr) in i2c_pxa_slave_txempty() argument
617 if (isr & ISR_BED) { in i2c_pxa_slave_txempty()
631 static void i2c_pxa_slave_rxfull(struct pxa_i2c *i2c, u32 isr) in i2c_pxa_slave_rxfull() argument
641 static void i2c_pxa_slave_start(struct pxa_i2c *i2c, u32 isr) in i2c_pxa_slave_start() argument
647 (isr & ISR_RWM) ? 'r' : 't'); in i2c_pxa_slave_start()
650 if (isr & ISR_RWM) { in i2c_pxa_slave_start()
690 dev_dbg(&i2c->adap.dev, "ISR: SSD (Slave Stop)\n"); in i2c_pxa_slave_stop()
696 dev_dbg(&i2c->adap.dev, "ISR: SSD (Slave Stop) acked\n"); in i2c_pxa_slave_stop()
738 static void i2c_pxa_slave_txempty(struct pxa_i2c *i2c, u32 isr) in i2c_pxa_slave_txempty() argument
740 if (isr & ISR_BED) { in i2c_pxa_slave_txempty()
748 static void i2c_pxa_slave_rxfull(struct pxa_i2c *i2c, u32 isr) in i2c_pxa_slave_rxfull() argument
753 static void i2c_pxa_slave_start(struct pxa_i2c *i2c, u32 isr) in i2c_pxa_slave_start() argument
863 static void i2c_pxa_irq_txempty(struct pxa_i2c *i2c, u32 isr) in i2c_pxa_irq_txempty() argument
871 if (isr & ISR_ALD) { in i2c_pxa_irq_txempty()
887 if ((isr & ISR_BED) && in i2c_pxa_irq_txempty()
889 (isr & ISR_ACKNAK)))) { in i2c_pxa_irq_txempty()
897 if (isr & ISR_ACKNAK) { in i2c_pxa_irq_txempty()
904 } else if (isr & ISR_RWM) { in i2c_pxa_irq_txempty()
970 static void i2c_pxa_irq_rxfull(struct pxa_i2c *i2c, u32 isr) in i2c_pxa_irq_rxfull() argument
1002 u32 isr = readl(_ISR(i2c)); in i2c_pxa_handler() local
1004 if (!(isr & VALID_INT_SOURCE)) in i2c_pxa_handler()
1008 dev_dbg(&i2c->adap.dev, "%s: ISR=%08x, ICR=%08x, IBMR=%02x\n", in i2c_pxa_handler()
1009 __func__, isr, readl(_ICR(i2c)), readl(_IBMR(i2c))); in i2c_pxa_handler()
1010 decode_ISR(isr); in i2c_pxa_handler()
1014 i2c->isrlog[i2c->irqlogidx++] = isr; in i2c_pxa_handler()
1021 writel(isr & VALID_INT_SOURCE, _ISR(i2c)); in i2c_pxa_handler()
1023 if (isr & ISR_SAD) in i2c_pxa_handler()
1024 i2c_pxa_slave_start(i2c, isr); in i2c_pxa_handler()
1025 if (isr & ISR_SSD) in i2c_pxa_handler()
1029 if (isr & ISR_ITE) in i2c_pxa_handler()
1030 i2c_pxa_slave_txempty(i2c, isr); in i2c_pxa_handler()
1031 if (isr & ISR_IRF) in i2c_pxa_handler()
1032 i2c_pxa_slave_rxfull(i2c, isr); in i2c_pxa_handler()
1034 if (isr & ISR_ITE) in i2c_pxa_handler()
1035 i2c_pxa_irq_txempty(i2c, isr); in i2c_pxa_handler()
1036 if (isr & ISR_IRF) in i2c_pxa_handler()
1037 i2c_pxa_irq_rxfull(i2c, isr); in i2c_pxa_handler()
1038 } else if ((isr & ISR_ITE) && i2c->highmode_enter) { in i2c_pxa_handler()
1312 u32 isr; in i2c_pxa_unprepare_recovery() local
1318 isr = readl(_ISR(i2c)); in i2c_pxa_unprepare_recovery()
1319 if (isr & (ISR_UB | ISR_IBB)) { in i2c_pxa_unprepare_recovery()
1321 "recovery: resetting controller, ISR=0x%08x\n", isr); in i2c_pxa_unprepare_recovery()
1327 dev_dbg(&i2c->adap.dev, "recovery: IBMR 0x%08x ISR 0x%08x\n", in i2c_pxa_unprepare_recovery()
1472 i2c->reg_isr = i2c->reg_base + pxa_reg_layout[i2c_type].isr; in i2c_pxa_probe()