Lines Matching full:st
440 #define at91_adc_readl(st, reg) \ argument
441 readl_relaxed((st)->base + (st)->soc_info.platform->layout->reg)
442 #define at91_adc_read_chan(st, reg) \ argument
443 readl_relaxed((st)->base + reg)
444 #define at91_adc_writel(st, reg, val) \ argument
445 writel_relaxed(val, (st)->base + (st)->soc_info.platform->layout->reg)
789 struct at91_adc_state *st = iio_priv(indio_dev); in at91_adc_active_scan_mask_to_reg() local
798 return mask & GENMASK(st->soc_info.platform->nr_channels, 0); in at91_adc_active_scan_mask_to_reg()
801 static void at91_adc_cor(struct at91_adc_state *st, in at91_adc_cor() argument
808 cur_cor = at91_adc_readl(st, COR); in at91_adc_cor()
809 cor <<= st->soc_info.platform->layout->COR_diff_offset; in at91_adc_cor()
811 at91_adc_writel(st, COR, cur_cor | cor); in at91_adc_cor()
813 at91_adc_writel(st, COR, cur_cor & ~cor); in at91_adc_cor()
816 static void at91_adc_irq_status(struct at91_adc_state *st, u32 *status, in at91_adc_irq_status() argument
819 *status = at91_adc_readl(st, ISR); in at91_adc_irq_status()
820 if (st->soc_info.platform->layout->EOC_ISR) in at91_adc_irq_status()
821 *eoc = at91_adc_readl(st, EOC_ISR); in at91_adc_irq_status()
826 static void at91_adc_irq_mask(struct at91_adc_state *st, u32 *status, u32 *eoc) in at91_adc_irq_mask() argument
828 *status = at91_adc_readl(st, IMR); in at91_adc_irq_mask()
829 if (st->soc_info.platform->layout->EOC_IMR) in at91_adc_irq_mask()
830 *eoc = at91_adc_readl(st, EOC_IMR); in at91_adc_irq_mask()
835 static void at91_adc_eoc_dis(struct at91_adc_state *st, unsigned int channel) in at91_adc_eoc_dis() argument
842 if (!st->soc_info.platform->layout->EOC_IDR) in at91_adc_eoc_dis()
843 at91_adc_writel(st, IDR, BIT(channel)); in at91_adc_eoc_dis()
846 static void at91_adc_eoc_ena(struct at91_adc_state *st, unsigned int channel) in at91_adc_eoc_ena() argument
848 if (!st->soc_info.platform->layout->EOC_IDR) in at91_adc_eoc_ena()
849 at91_adc_writel(st, IER, BIT(channel)); in at91_adc_eoc_ena()
851 at91_adc_writel(st, EOC_IER, BIT(channel)); in at91_adc_eoc_ena()
854 static int at91_adc_config_emr(struct at91_adc_state *st, in at91_adc_config_emr() argument
859 unsigned int osr_mask = st->soc_info.platform->osr_mask; in at91_adc_config_emr()
863 for (i = 0; i < st->soc_info.platform->oversampling_avail_no; i++) { in at91_adc_config_emr()
864 if (oversampling_ratio == st->soc_info.platform->oversampling_avail[i]) in at91_adc_config_emr()
867 if (i == st->soc_info.platform->oversampling_avail_no) in at91_adc_config_emr()
894 ret = pm_runtime_resume_and_get(st->dev); in at91_adc_config_emr()
898 emr = at91_adc_readl(st, EMR); in at91_adc_config_emr()
905 at91_adc_writel(st, EMR, emr); in at91_adc_config_emr()
907 pm_runtime_mark_last_busy(st->dev); in at91_adc_config_emr()
908 pm_runtime_put_autosuspend(st->dev); in at91_adc_config_emr()
910 st->oversampling_ratio = oversampling_ratio; in at91_adc_config_emr()
915 static int at91_adc_adjust_val_osr(struct at91_adc_state *st, int *val) in at91_adc_adjust_val_osr() argument
919 if (st->oversampling_ratio == 1) in at91_adc_adjust_val_osr()
921 else if (st->oversampling_ratio == 4) in at91_adc_adjust_val_osr()
923 else if (st->oversampling_ratio == 16) in at91_adc_adjust_val_osr()
925 else if (st->oversampling_ratio == 64) in at91_adc_adjust_val_osr()
927 else if (st->oversampling_ratio == 256) in at91_adc_adjust_val_osr()
935 * st->soc_info.platform->chan_realbits, so shift left diff bits. in at91_adc_adjust_val_osr()
937 diff = st->soc_info.platform->chan_realbits - nbits; in at91_adc_adjust_val_osr()
943 static void at91_adc_adjust_val_osr_array(struct at91_adc_state *st, void *buf, in at91_adc_adjust_val_osr_array() argument
959 at91_adc_adjust_val_osr(st, &val); in at91_adc_adjust_val_osr_array()
965 static int at91_adc_configure_touch(struct at91_adc_state *st, bool state) in at91_adc_configure_touch() argument
967 u32 clk_khz = st->current_sample_rate / 1000; in at91_adc_configure_touch()
973 ret = pm_runtime_resume_and_get(st->dev); in at91_adc_configure_touch()
978 at91_adc_writel(st, IDR, in at91_adc_configure_touch()
980 at91_adc_writel(st, TSMR, 0); in at91_adc_configure_touch()
982 pm_runtime_mark_last_busy(st->dev); in at91_adc_configure_touch()
983 pm_runtime_put_autosuspend(st->dev); in at91_adc_configure_touch()
1009 at91_adc_writel(st, TSMR, tsmr); in at91_adc_configure_touch()
1011 acr = at91_adc_readl(st, ACR); in at91_adc_configure_touch()
1014 at91_adc_writel(st, ACR, acr); in at91_adc_configure_touch()
1017 st->touch_st.sample_period_val = in at91_adc_configure_touch()
1021 at91_adc_writel(st, IER, AT91_SAMA5D2_IER_PEN); in at91_adc_configure_touch()
1026 static u16 at91_adc_touch_pos(struct at91_adc_state *st, int reg) in at91_adc_touch_pos() argument
1037 if (reg == st->soc_info.platform->layout->XPOSR) in at91_adc_touch_pos()
1038 val = at91_adc_readl(st, XPOSR); in at91_adc_touch_pos()
1039 else if (reg == st->soc_info.platform->layout->YPOSR) in at91_adc_touch_pos()
1040 val = at91_adc_readl(st, YPOSR); in at91_adc_touch_pos()
1043 dev_dbg(&st->indio_dev->dev, "pos is 0\n"); in at91_adc_touch_pos()
1049 dev_err(&st->indio_dev->dev, "scale is 0\n"); in at91_adc_touch_pos()
1057 static u16 at91_adc_touch_x_pos(struct at91_adc_state *st) in at91_adc_touch_x_pos() argument
1059 st->touch_st.x_pos = at91_adc_touch_pos(st, st->soc_info.platform->layout->XPOSR); in at91_adc_touch_x_pos()
1060 return st->touch_st.x_pos; in at91_adc_touch_x_pos()
1063 static u16 at91_adc_touch_y_pos(struct at91_adc_state *st) in at91_adc_touch_y_pos() argument
1065 return at91_adc_touch_pos(st, st->soc_info.platform->layout->YPOSR); in at91_adc_touch_y_pos()
1068 static u16 at91_adc_touch_pressure(struct at91_adc_state *st) in at91_adc_touch_pressure() argument
1077 val = at91_adc_readl(st, PRESSR); in at91_adc_touch_pressure()
1082 pres = rxp * (st->touch_st.x_pos * factor / 1024) * in at91_adc_touch_pressure()
1096 static int at91_adc_read_position(struct at91_adc_state *st, int chan, u16 *val) in at91_adc_read_position() argument
1099 if (!st->touch_st.touching) in at91_adc_read_position()
1101 if (chan == st->soc_info.platform->touch_chan_x) in at91_adc_read_position()
1102 *val = at91_adc_touch_x_pos(st); in at91_adc_read_position()
1103 else if (chan == st->soc_info.platform->touch_chan_y) in at91_adc_read_position()
1104 *val = at91_adc_touch_y_pos(st); in at91_adc_read_position()
1111 static int at91_adc_read_pressure(struct at91_adc_state *st, int chan, u16 *val) in at91_adc_read_pressure() argument
1114 if (!st->touch_st.touching) in at91_adc_read_pressure()
1116 if (chan == st->soc_info.platform->touch_chan_p) in at91_adc_read_pressure()
1117 *val = at91_adc_touch_pressure(st); in at91_adc_read_pressure()
1124 static void at91_adc_configure_trigger_registers(struct at91_adc_state *st, in at91_adc_configure_trigger_registers() argument
1127 u32 status = at91_adc_readl(st, TRGR); in at91_adc_configure_trigger_registers()
1133 status |= st->selected_trig->trgmod_value; in at91_adc_configure_trigger_registers()
1136 at91_adc_writel(st, TRGR, status); in at91_adc_configure_trigger_registers()
1142 struct at91_adc_state *st = iio_priv(indio); in at91_adc_configure_trigger() local
1146 ret = pm_runtime_resume_and_get(st->dev); in at91_adc_configure_trigger()
1151 at91_adc_configure_trigger_registers(st, state); in at91_adc_configure_trigger()
1154 pm_runtime_mark_last_busy(st->dev); in at91_adc_configure_trigger()
1155 pm_runtime_put_autosuspend(st->dev); in at91_adc_configure_trigger()
1164 struct at91_adc_state *st = iio_priv(indio); in at91_adc_reenable_trigger() local
1167 if (st->dma_st.dma_chan) in at91_adc_reenable_trigger()
1170 enable_irq(st->irq); in at91_adc_reenable_trigger()
1173 at91_adc_readl(st, LCDR); in at91_adc_reenable_trigger()
1182 static int at91_adc_dma_size_done(struct at91_adc_state *st) in at91_adc_dma_size_done() argument
1188 status = dmaengine_tx_status(st->dma_st.dma_chan, in at91_adc_dma_size_done()
1189 st->dma_st.dma_chan->cookie, in at91_adc_dma_size_done()
1195 i = st->dma_st.rx_buf_sz - state.residue; in at91_adc_dma_size_done()
1198 if (i >= st->dma_st.buf_idx) in at91_adc_dma_size_done()
1199 size = i - st->dma_st.buf_idx; in at91_adc_dma_size_done()
1201 size = st->dma_st.rx_buf_sz + i - st->dma_st.buf_idx; in at91_adc_dma_size_done()
1214 struct at91_adc_state *st = iio_priv(indio_dev); in at91_adc_dma_start() local
1220 if (!st->dma_st.dma_chan) in at91_adc_dma_start()
1224 st->dma_st.buf_idx = 0; in at91_adc_dma_start()
1230 st->dma_st.rx_buf_sz = 0; in at91_adc_dma_start()
1240 st->dma_st.rx_buf_sz += chan->scan_type.storagebits / 8; in at91_adc_dma_start()
1242 st->dma_st.rx_buf_sz *= st->dma_st.watermark; in at91_adc_dma_start()
1245 desc = dmaengine_prep_dma_cyclic(st->dma_st.dma_chan, in at91_adc_dma_start()
1246 st->dma_st.rx_dma_buf, in at91_adc_dma_start()
1247 st->dma_st.rx_buf_sz, in at91_adc_dma_start()
1248 st->dma_st.rx_buf_sz / 2, in at91_adc_dma_start()
1263 dmaengine_terminate_async(st->dma_st.dma_chan); in at91_adc_dma_start()
1268 at91_adc_writel(st, IER, AT91_SAMA5D2_IER_GOVRE); in at91_adc_dma_start()
1270 dma_async_issue_pending(st->dma_st.dma_chan); in at91_adc_dma_start()
1273 st->dma_st.dma_ts = iio_get_time_ns(indio_dev); in at91_adc_dma_start()
1281 struct at91_adc_state *st) in at91_adc_buffer_check_use_irq() argument
1284 if (st->dma_st.dma_chan) in at91_adc_buffer_check_use_irq()
1294 struct at91_adc_state *st = iio_priv(indio_dev); in at91_adc_current_chan_is_touch() local
1297 &st->touch_st.channels_bitmask, in at91_adc_current_chan_is_touch()
1298 st->soc_info.platform->max_index + 1); in at91_adc_current_chan_is_touch()
1305 struct at91_adc_state *st = iio_priv(indio_dev); in at91_adc_buffer_prepare() local
1309 return at91_adc_configure_touch(st, true); in at91_adc_buffer_prepare()
1315 ret = pm_runtime_resume_and_get(st->dev); in at91_adc_buffer_prepare()
1338 at91_adc_cor(st, chan); in at91_adc_buffer_prepare()
1340 at91_adc_writel(st, CHER, BIT(chan->channel)); in at91_adc_buffer_prepare()
1343 if (at91_adc_buffer_check_use_irq(indio_dev, st)) in at91_adc_buffer_prepare()
1344 at91_adc_writel(st, IER, AT91_SAMA5D2_IER_DRDY); in at91_adc_buffer_prepare()
1347 pm_runtime_mark_last_busy(st->dev); in at91_adc_buffer_prepare()
1348 pm_runtime_put_autosuspend(st->dev); in at91_adc_buffer_prepare()
1354 struct at91_adc_state *st = iio_priv(indio_dev); in at91_adc_buffer_postdisable() local
1360 return at91_adc_configure_touch(st, false); in at91_adc_buffer_postdisable()
1366 ret = pm_runtime_resume_and_get(st->dev); in at91_adc_buffer_postdisable()
1389 at91_adc_writel(st, CHDR, BIT(chan->channel)); in at91_adc_buffer_postdisable()
1391 if (st->dma_st.dma_chan) in at91_adc_buffer_postdisable()
1392 at91_adc_read_chan(st, chan->address); in at91_adc_buffer_postdisable()
1395 if (at91_adc_buffer_check_use_irq(indio_dev, st)) in at91_adc_buffer_postdisable()
1396 at91_adc_writel(st, IDR, AT91_SAMA5D2_IER_DRDY); in at91_adc_buffer_postdisable()
1399 at91_adc_readl(st, OVER); in at91_adc_buffer_postdisable()
1402 if (st->dma_st.dma_chan) in at91_adc_buffer_postdisable()
1403 dmaengine_terminate_sync(st->dma_st.dma_chan); in at91_adc_buffer_postdisable()
1405 pm_runtime_mark_last_busy(st->dev); in at91_adc_buffer_postdisable()
1406 pm_runtime_put_autosuspend(st->dev); in at91_adc_buffer_postdisable()
1440 struct at91_adc_state *st = iio_priv(indio_dev); in at91_adc_trigger_handler_nodma() local
1453 at91_adc_irq_status(st, &status, &eoc); in at91_adc_trigger_handler_nodma()
1454 at91_adc_irq_mask(st, &imr, &eoc_imr); in at91_adc_trigger_handler_nodma()
1481 val = at91_adc_read_chan(st, chan->address); in at91_adc_trigger_handler_nodma()
1482 at91_adc_adjust_val_osr(st, &val); in at91_adc_trigger_handler_nodma()
1483 st->buffer[i] = val; in at91_adc_trigger_handler_nodma()
1485 st->buffer[i] = 0; in at91_adc_trigger_handler_nodma()
1490 iio_push_to_buffers_with_timestamp(indio_dev, st->buffer, in at91_adc_trigger_handler_nodma()
1496 struct at91_adc_state *st = iio_priv(indio_dev); in at91_adc_trigger_handler_dma() local
1497 int transferred_len = at91_adc_dma_size_done(st); in at91_adc_trigger_handler_dma()
1502 u32 status = at91_adc_readl(st, ISR); in at91_adc_trigger_handler_dma()
1508 sample_size = div_s64(st->dma_st.rx_buf_sz, st->dma_st.watermark); in at91_adc_trigger_handler_dma()
1516 interval = div_s64((ns - st->dma_st.dma_ts), sample_count); in at91_adc_trigger_handler_dma()
1523 at91_adc_adjust_val_osr_array(st, in at91_adc_trigger_handler_dma()
1524 &st->dma_st.rx_buf[st->dma_st.buf_idx], in at91_adc_trigger_handler_dma()
1528 (st->dma_st.rx_buf + st->dma_st.buf_idx), in at91_adc_trigger_handler_dma()
1529 (st->dma_st.dma_ts + interval * sample_index)); in at91_adc_trigger_handler_dma()
1533 st->dma_st.buf_idx += sample_size; in at91_adc_trigger_handler_dma()
1535 if (st->dma_st.buf_idx >= st->dma_st.rx_buf_sz) in at91_adc_trigger_handler_dma()
1536 st->dma_st.buf_idx = 0; in at91_adc_trigger_handler_dma()
1540 st->dma_st.dma_ts = iio_get_time_ns(indio_dev); in at91_adc_trigger_handler_dma()
1547 struct at91_adc_state *st = iio_priv(indio_dev); in at91_adc_trigger_handler() local
1554 at91_adc_writel(st, CR, AT91_SAMA5D2_CR_START); in at91_adc_trigger_handler()
1556 if (st->dma_st.dma_chan) in at91_adc_trigger_handler()
1594 struct at91_adc_state *st = iio_priv(indio_dev); in at91_adc_setup_samp_freq() local
1598 f_per = clk_get_rate(st->per_clk); in at91_adc_setup_samp_freq()
1603 ret = pm_runtime_resume_and_get(st->dev); in at91_adc_setup_samp_freq()
1607 mr = at91_adc_readl(st, MR); in at91_adc_setup_samp_freq()
1612 at91_adc_writel(st, MR, mr); in at91_adc_setup_samp_freq()
1614 pm_runtime_mark_last_busy(st->dev); in at91_adc_setup_samp_freq()
1615 pm_runtime_put_autosuspend(st->dev); in at91_adc_setup_samp_freq()
1619 st->current_sample_rate = freq; in at91_adc_setup_samp_freq()
1622 static inline unsigned at91_adc_get_sample_freq(struct at91_adc_state *st) in at91_adc_get_sample_freq() argument
1624 return st->current_sample_rate; in at91_adc_get_sample_freq()
1629 struct at91_adc_state *st = iio_priv(indio_dev); in at91_adc_touch_data_handler() local
1635 st->soc_info.platform->max_index + 1) { in at91_adc_touch_data_handler()
1640 at91_adc_read_position(st, chan->channel, &val); in at91_adc_touch_data_handler()
1642 at91_adc_read_pressure(st, chan->channel, &val); in at91_adc_touch_data_handler()
1645 st->buffer[i] = val; in at91_adc_touch_data_handler()
1656 schedule_work(&st->touch_st.workq); in at91_adc_touch_data_handler()
1659 static void at91_adc_pen_detect_interrupt(struct at91_adc_state *st) in at91_adc_pen_detect_interrupt() argument
1661 at91_adc_writel(st, IDR, AT91_SAMA5D2_IER_PEN); in at91_adc_pen_detect_interrupt()
1662 at91_adc_writel(st, IER, AT91_SAMA5D2_IER_NOPEN | in at91_adc_pen_detect_interrupt()
1665 at91_adc_writel(st, TRGR, AT91_SAMA5D2_TRGR_TRGMOD_PERIODIC | in at91_adc_pen_detect_interrupt()
1666 AT91_SAMA5D2_TRGR_TRGPER(st->touch_st.sample_period_val)); in at91_adc_pen_detect_interrupt()
1667 st->touch_st.touching = true; in at91_adc_pen_detect_interrupt()
1672 struct at91_adc_state *st = iio_priv(indio_dev); in at91_adc_no_pen_detect_interrupt() local
1674 at91_adc_writel(st, TRGR, AT91_SAMA5D2_TRGR_TRGMOD_NO_TRIGGER); in at91_adc_no_pen_detect_interrupt()
1675 at91_adc_writel(st, IDR, AT91_SAMA5D2_IER_NOPEN | in at91_adc_no_pen_detect_interrupt()
1678 st->touch_st.touching = false; in at91_adc_no_pen_detect_interrupt()
1682 at91_adc_writel(st, IER, AT91_SAMA5D2_IER_PEN); in at91_adc_no_pen_detect_interrupt()
1689 struct at91_adc_state *st = container_of(touch_st, in at91_adc_workq_handler() local
1691 struct iio_dev *indio_dev = st->indio_dev; in at91_adc_workq_handler()
1693 iio_push_to_buffers(indio_dev, st->buffer); in at91_adc_workq_handler()
1699 struct at91_adc_state *st = iio_priv(indio); in at91_adc_interrupt() local
1704 at91_adc_irq_status(st, &status, &eoc); in at91_adc_interrupt()
1705 at91_adc_irq_mask(st, &imr, &eoc_imr); in at91_adc_interrupt()
1711 at91_adc_pen_detect_interrupt(st); in at91_adc_interrupt()
1724 status = at91_adc_readl(st, XPOSR); in at91_adc_interrupt()
1725 status = at91_adc_readl(st, YPOSR); in at91_adc_interrupt()
1726 status = at91_adc_readl(st, PRESSR); in at91_adc_interrupt()
1732 } else if (iio_buffer_enabled(indio) && st->dma_st.dma_chan) { in at91_adc_interrupt()
1738 st->conversion_value = at91_adc_read_chan(st, st->chan->address); in at91_adc_interrupt()
1739 st->conversion_done = true; in at91_adc_interrupt()
1740 wake_up_interruptible(&st->wq_data_available); in at91_adc_interrupt()
1745 /* This needs to be called with direct mode claimed and st->lock locked. */
1749 struct at91_adc_state *st = iio_priv(indio_dev); in at91_adc_read_info_raw() local
1753 ret = pm_runtime_resume_and_get(st->dev); in at91_adc_read_info_raw()
1762 ret = at91_adc_read_position(st, chan->channel, in at91_adc_read_info_raw()
1766 ret = at91_adc_adjust_val_osr(st, val); in at91_adc_read_info_raw()
1771 ret = at91_adc_read_pressure(st, chan->channel, in at91_adc_read_info_raw()
1775 ret = at91_adc_adjust_val_osr(st, val); in at91_adc_read_info_raw()
1782 st->chan = chan; in at91_adc_read_info_raw()
1784 at91_adc_cor(st, chan); in at91_adc_read_info_raw()
1785 at91_adc_writel(st, CHER, BIT(chan->channel)); in at91_adc_read_info_raw()
1792 at91_adc_writel(st, TEMPMR, AT91_SAMA5D2_TEMPMR_TEMPON); in at91_adc_read_info_raw()
1793 at91_adc_eoc_ena(st, chan->channel); in at91_adc_read_info_raw()
1794 at91_adc_writel(st, CR, AT91_SAMA5D2_CR_START); in at91_adc_read_info_raw()
1796 ret = wait_event_interruptible_timeout(st->wq_data_available, in at91_adc_read_info_raw()
1797 st->conversion_done, in at91_adc_read_info_raw()
1803 *val = st->conversion_value; in at91_adc_read_info_raw()
1804 ret = at91_adc_adjust_val_osr(st, val); in at91_adc_read_info_raw()
1808 st->conversion_done = false; in at91_adc_read_info_raw()
1811 at91_adc_eoc_dis(st, st->chan->channel); in at91_adc_read_info_raw()
1813 at91_adc_writel(st, TEMPMR, 0U); in at91_adc_read_info_raw()
1814 at91_adc_writel(st, CHDR, BIT(chan->channel)); in at91_adc_read_info_raw()
1817 at91_adc_readl(st, LCDR); in at91_adc_read_info_raw()
1820 pm_runtime_mark_last_busy(st->dev); in at91_adc_read_info_raw()
1821 pm_runtime_put_autosuspend(st->dev); in at91_adc_read_info_raw()
1828 struct at91_adc_state *st = iio_priv(indio_dev); in at91_adc_read_info_locked() local
1835 mutex_lock(&st->lock); in at91_adc_read_info_locked()
1837 mutex_unlock(&st->lock); in at91_adc_read_info_locked()
1844 static void at91_adc_temp_sensor_configure(struct at91_adc_state *st, in at91_adc_temp_sensor_configure() argument
1861 st->temp_st.saved_sample_rate = st->current_sample_rate; in at91_adc_temp_sensor_configure()
1862 st->temp_st.saved_oversampling = st->oversampling_ratio; in at91_adc_temp_sensor_configure()
1865 sample_rate = st->temp_st.saved_sample_rate; in at91_adc_temp_sensor_configure()
1866 oversampling_ratio = st->temp_st.saved_oversampling; in at91_adc_temp_sensor_configure()
1867 startup_time = st->soc_info.startup_time; in at91_adc_temp_sensor_configure()
1872 at91_adc_setup_samp_freq(st->indio_dev, sample_rate, startup_time, in at91_adc_temp_sensor_configure()
1874 at91_adc_config_emr(st, oversampling_ratio, trackx); in at91_adc_temp_sensor_configure()
1880 struct at91_adc_state *st = iio_priv(indio_dev); in at91_adc_read_temp() local
1881 struct at91_adc_temp_sensor_clb *clb = &st->soc_info.temp_sensor_clb; in at91_adc_read_temp()
1889 mutex_lock(&st->lock); in at91_adc_read_temp()
1891 ret = pm_runtime_resume_and_get(st->dev); in at91_adc_read_temp()
1895 at91_adc_temp_sensor_configure(st, true); in at91_adc_read_temp()
1898 tmp = at91_adc_readl(st, ACR); in at91_adc_read_temp()
1900 at91_adc_writel(st, ACR, tmp); in at91_adc_read_temp()
1907 at91_adc_writel(st, ACR, tmp); in at91_adc_read_temp()
1912 at91_adc_temp_sensor_configure(st, false); in at91_adc_read_temp()
1913 pm_runtime_mark_last_busy(st->dev); in at91_adc_read_temp()
1914 pm_runtime_put_autosuspend(st->dev); in at91_adc_read_temp()
1916 mutex_unlock(&st->lock); in at91_adc_read_temp()
1938 struct at91_adc_state *st = iio_priv(indio_dev); in at91_adc_read_raw() local
1945 *val = st->vref_uv / 1000; in at91_adc_read_raw()
1957 *val = at91_adc_get_sample_freq(st); in at91_adc_read_raw()
1961 *val = st->oversampling_ratio; in at91_adc_read_raw()
1973 struct at91_adc_state *st = iio_priv(indio_dev); in at91_adc_write_raw() local
1979 if (val == st->oversampling_ratio) in at91_adc_write_raw()
1985 mutex_lock(&st->lock); in at91_adc_write_raw()
1987 ret = at91_adc_config_emr(st, val, 0); in at91_adc_write_raw()
1988 mutex_unlock(&st->lock); in at91_adc_write_raw()
1992 if (val < st->soc_info.min_sample_rate || in at91_adc_write_raw()
1993 val > st->soc_info.max_sample_rate) in at91_adc_write_raw()
1999 mutex_lock(&st->lock); in at91_adc_write_raw()
2001 st->soc_info.startup_time, 0); in at91_adc_write_raw()
2002 mutex_unlock(&st->lock); in at91_adc_write_raw()
2015 struct at91_adc_state *st = iio_priv(indio_dev); in at91_adc_read_avail() local
2019 *vals = (int *)st->soc_info.platform->oversampling_avail; in at91_adc_read_avail()
2021 *length = st->soc_info.platform->oversampling_avail_no; in at91_adc_read_avail()
2028 static void at91_adc_dma_init(struct at91_adc_state *st) in at91_adc_dma_init() argument
2030 struct device *dev = &st->indio_dev->dev; in at91_adc_dma_init()
2033 unsigned int sample_size = st->soc_info.platform->nr_channels * 2; in at91_adc_dma_init()
2042 if (st->dma_st.dma_chan) in at91_adc_dma_init()
2045 st->dma_st.dma_chan = dma_request_chan(dev, "rx"); in at91_adc_dma_init()
2046 if (IS_ERR(st->dma_st.dma_chan)) { in at91_adc_dma_init()
2048 st->dma_st.dma_chan = NULL; in at91_adc_dma_init()
2052 st->dma_st.rx_buf = dma_alloc_coherent(st->dma_st.dma_chan->device->dev, in at91_adc_dma_init()
2054 &st->dma_st.rx_dma_buf, in at91_adc_dma_init()
2056 if (!st->dma_st.rx_buf) { in at91_adc_dma_init()
2063 config.src_addr = (phys_addr_t)(st->dma_st.phys_addr in at91_adc_dma_init()
2064 + st->soc_info.platform->layout->LCDR); in at91_adc_dma_init()
2069 if (dmaengine_slave_config(st->dma_st.dma_chan, &config)) { in at91_adc_dma_init()
2075 dma_chan_name(st->dma_st.dma_chan)); in at91_adc_dma_init()
2080 dma_free_coherent(st->dma_st.dma_chan->device->dev, pages * PAGE_SIZE, in at91_adc_dma_init()
2081 st->dma_st.rx_buf, st->dma_st.rx_dma_buf); in at91_adc_dma_init()
2083 dma_release_channel(st->dma_st.dma_chan); in at91_adc_dma_init()
2084 st->dma_st.dma_chan = NULL; in at91_adc_dma_init()
2089 static void at91_adc_dma_disable(struct at91_adc_state *st) in at91_adc_dma_disable() argument
2091 struct device *dev = &st->indio_dev->dev; in at91_adc_dma_disable()
2093 unsigned int sample_size = st->soc_info.platform->nr_channels * 2; in at91_adc_dma_disable()
2098 if (!st->dma_st.dma_chan) in at91_adc_dma_disable()
2102 dmaengine_terminate_sync(st->dma_st.dma_chan); in at91_adc_dma_disable()
2104 dma_free_coherent(st->dma_st.dma_chan->device->dev, pages * PAGE_SIZE, in at91_adc_dma_disable()
2105 st->dma_st.rx_buf, st->dma_st.rx_dma_buf); in at91_adc_dma_disable()
2106 dma_release_channel(st->dma_st.dma_chan); in at91_adc_dma_disable()
2107 st->dma_st.dma_chan = NULL; in at91_adc_dma_disable()
2114 struct at91_adc_state *st = iio_priv(indio_dev); in at91_adc_set_watermark() local
2120 if (!st->selected_trig->hw_trig) { in at91_adc_set_watermark()
2126 st->dma_st.watermark = val; in at91_adc_set_watermark()
2135 at91_adc_dma_disable(st); in at91_adc_set_watermark()
2137 at91_adc_dma_init(st); in at91_adc_set_watermark()
2145 at91_adc_dma_disable(st); in at91_adc_set_watermark()
2153 struct at91_adc_state *st = iio_priv(indio_dev); in at91_adc_update_scan_mode() local
2155 if (bitmap_subset(scan_mask, &st->touch_st.channels_bitmask, in at91_adc_update_scan_mode()
2156 st->soc_info.platform->max_index + 1)) in at91_adc_update_scan_mode()
2162 if (bitmap_intersects(&st->touch_st.channels_bitmask, scan_mask, in at91_adc_update_scan_mode()
2163 st->soc_info.platform->max_index + 1)) in at91_adc_update_scan_mode()
2170 struct at91_adc_state *st = iio_priv(indio_dev); in at91_adc_hw_init() local
2172 at91_adc_writel(st, CR, AT91_SAMA5D2_CR_SWRST); in at91_adc_hw_init()
2173 if (st->soc_info.platform->layout->EOC_IDR) in at91_adc_hw_init()
2174 at91_adc_writel(st, EOC_IDR, 0xffffffff); in at91_adc_hw_init()
2175 at91_adc_writel(st, IDR, 0xffffffff); in at91_adc_hw_init()
2180 at91_adc_writel(st, MR, in at91_adc_hw_init()
2183 at91_adc_setup_samp_freq(indio_dev, st->soc_info.min_sample_rate, in at91_adc_hw_init()
2184 st->soc_info.startup_time, 0); in at91_adc_hw_init()
2187 at91_adc_config_emr(st, st->oversampling_ratio, 0); in at91_adc_hw_init()
2194 struct at91_adc_state *st = iio_priv(indio_dev); in at91_adc_get_fifo_state() local
2196 return sysfs_emit(buf, "%d\n", !!st->dma_st.dma_chan); in at91_adc_get_fifo_state()
2203 struct at91_adc_state *st = iio_priv(indio_dev); in at91_adc_get_watermark() local
2205 return sysfs_emit(buf, "%d\n", st->dma_st.watermark); in at91_adc_get_watermark()
2236 struct at91_adc_state *st = iio_priv(indio); in at91_adc_buffer_and_trigger_init() local
2240 if (st->selected_trig->hw_trig) in at91_adc_buffer_and_trigger_init()
2253 if (!st->selected_trig->hw_trig) in at91_adc_buffer_and_trigger_init()
2256 st->trig = at91_adc_allocate_trigger(indio, st->selected_trig->name); in at91_adc_buffer_and_trigger_init()
2257 if (IS_ERR(st->trig)) { in at91_adc_buffer_and_trigger_init()
2259 return PTR_ERR(st->trig); in at91_adc_buffer_and_trigger_init()
2266 st->dma_st.watermark = 1; in at91_adc_buffer_and_trigger_init()
2271 static int at91_adc_temp_sensor_init(struct at91_adc_state *st, in at91_adc_temp_sensor_init() argument
2274 struct at91_adc_temp_sensor_clb *clb = &st->soc_info.temp_sensor_clb; in at91_adc_temp_sensor_init()
2280 if (!st->soc_info.platform->temp_sensor) in at91_adc_temp_sensor_init()
2322 struct at91_adc_state *st; in at91_adc_probe() local
2327 indio_dev = devm_iio_device_alloc(&pdev->dev, sizeof(*st)); in at91_adc_probe()
2331 st = iio_priv(indio_dev); in at91_adc_probe()
2332 st->indio_dev = indio_dev; in at91_adc_probe()
2334 st->soc_info.platform = device_get_match_data(dev); in at91_adc_probe()
2336 ret = at91_adc_temp_sensor_init(st, &pdev->dev); in at91_adc_probe()
2339 num_channels = st->soc_info.platform->max_channels - 1; in at91_adc_probe()
2341 num_channels = st->soc_info.platform->max_channels; in at91_adc_probe()
2346 indio_dev->channels = *st->soc_info.platform->adc_channels; in at91_adc_probe()
2349 bitmap_set(&st->touch_st.channels_bitmask, in at91_adc_probe()
2350 st->soc_info.platform->touch_chan_x, 1); in at91_adc_probe()
2351 bitmap_set(&st->touch_st.channels_bitmask, in at91_adc_probe()
2352 st->soc_info.platform->touch_chan_y, 1); in at91_adc_probe()
2353 bitmap_set(&st->touch_st.channels_bitmask, in at91_adc_probe()
2354 st->soc_info.platform->touch_chan_p, 1); in at91_adc_probe()
2356 st->oversampling_ratio = 1; in at91_adc_probe()
2359 &st->soc_info.min_sample_rate); in at91_adc_probe()
2367 &st->soc_info.max_sample_rate); in at91_adc_probe()
2375 &st->soc_info.startup_time); in at91_adc_probe()
2389 st->selected_trig = NULL; in at91_adc_probe()
2392 for (i = 0; i < st->soc_info.platform->hw_trig_cnt + 1; i++) in at91_adc_probe()
2394 st->selected_trig = &at91_adc_trigger_list[i]; in at91_adc_probe()
2398 if (!st->selected_trig) { in at91_adc_probe()
2403 init_waitqueue_head(&st->wq_data_available); in at91_adc_probe()
2404 mutex_init(&st->lock); in at91_adc_probe()
2405 INIT_WORK(&st->touch_st.workq, at91_adc_workq_handler); in at91_adc_probe()
2407 st->base = devm_platform_get_and_ioremap_resource(pdev, 0, &res); in at91_adc_probe()
2408 if (IS_ERR(st->base)) in at91_adc_probe()
2409 return PTR_ERR(st->base); in at91_adc_probe()
2412 st->dma_st.phys_addr = res->start; in at91_adc_probe()
2414 st->irq = platform_get_irq(pdev, 0); in at91_adc_probe()
2415 if (st->irq < 0) in at91_adc_probe()
2416 return st->irq; in at91_adc_probe()
2418 st->per_clk = devm_clk_get(&pdev->dev, "adc_clk"); in at91_adc_probe()
2419 if (IS_ERR(st->per_clk)) in at91_adc_probe()
2420 return PTR_ERR(st->per_clk); in at91_adc_probe()
2422 st->reg = devm_regulator_get(&pdev->dev, "vddana"); in at91_adc_probe()
2423 if (IS_ERR(st->reg)) in at91_adc_probe()
2424 return PTR_ERR(st->reg); in at91_adc_probe()
2426 st->vref = devm_regulator_get(&pdev->dev, "vref"); in at91_adc_probe()
2427 if (IS_ERR(st->vref)) in at91_adc_probe()
2428 return PTR_ERR(st->vref); in at91_adc_probe()
2430 ret = devm_request_irq(&pdev->dev, st->irq, at91_adc_interrupt, 0, in at91_adc_probe()
2435 ret = regulator_enable(st->reg); in at91_adc_probe()
2439 ret = regulator_enable(st->vref); in at91_adc_probe()
2443 st->vref_uv = regulator_get_voltage(st->vref); in at91_adc_probe()
2444 if (st->vref_uv <= 0) { in at91_adc_probe()
2449 ret = clk_prepare_enable(st->per_clk); in at91_adc_probe()
2454 st->dev = &pdev->dev; in at91_adc_probe()
2455 pm_runtime_set_autosuspend_delay(st->dev, 500); in at91_adc_probe()
2456 pm_runtime_use_autosuspend(st->dev); in at91_adc_probe()
2457 pm_runtime_set_active(st->dev); in at91_adc_probe()
2458 pm_runtime_enable(st->dev); in at91_adc_probe()
2459 pm_runtime_get_noresume(st->dev); in at91_adc_probe()
2474 if (st->selected_trig->hw_trig) in at91_adc_probe()
2476 st->selected_trig->name); in at91_adc_probe()
2479 readl_relaxed(st->base + st->soc_info.platform->layout->VERSION)); in at91_adc_probe()
2481 pm_runtime_mark_last_busy(st->dev); in at91_adc_probe()
2482 pm_runtime_put_autosuspend(st->dev); in at91_adc_probe()
2487 at91_adc_dma_disable(st); in at91_adc_probe()
2489 pm_runtime_put_noidle(st->dev); in at91_adc_probe()
2490 pm_runtime_disable(st->dev); in at91_adc_probe()
2491 pm_runtime_set_suspended(st->dev); in at91_adc_probe()
2492 pm_runtime_dont_use_autosuspend(st->dev); in at91_adc_probe()
2493 clk_disable_unprepare(st->per_clk); in at91_adc_probe()
2495 regulator_disable(st->vref); in at91_adc_probe()
2497 regulator_disable(st->reg); in at91_adc_probe()
2504 struct at91_adc_state *st = iio_priv(indio_dev); in at91_adc_remove() local
2508 at91_adc_dma_disable(st); in at91_adc_remove()
2510 pm_runtime_disable(st->dev); in at91_adc_remove()
2511 pm_runtime_set_suspended(st->dev); in at91_adc_remove()
2512 clk_disable_unprepare(st->per_clk); in at91_adc_remove()
2514 regulator_disable(st->vref); in at91_adc_remove()
2515 regulator_disable(st->reg); in at91_adc_remove()
2521 struct at91_adc_state *st = iio_priv(indio_dev); in at91_adc_suspend() local
2524 ret = pm_runtime_resume_and_get(st->dev); in at91_adc_suspend()
2537 at91_adc_writel(st, CR, AT91_SAMA5D2_CR_SWRST); in at91_adc_suspend()
2539 pm_runtime_mark_last_busy(st->dev); in at91_adc_suspend()
2540 pm_runtime_put_noidle(st->dev); in at91_adc_suspend()
2541 clk_disable_unprepare(st->per_clk); in at91_adc_suspend()
2542 regulator_disable(st->vref); in at91_adc_suspend()
2543 regulator_disable(st->reg); in at91_adc_suspend()
2551 struct at91_adc_state *st = iio_priv(indio_dev); in at91_adc_resume() local
2558 ret = regulator_enable(st->reg); in at91_adc_resume()
2562 ret = regulator_enable(st->vref); in at91_adc_resume()
2566 ret = clk_prepare_enable(st->per_clk); in at91_adc_resume()
2570 pm_runtime_get_noresume(st->dev); in at91_adc_resume()
2580 at91_adc_configure_trigger_registers(st, true); in at91_adc_resume()
2583 pm_runtime_mark_last_busy(st->dev); in at91_adc_resume()
2584 pm_runtime_put_autosuspend(st->dev); in at91_adc_resume()
2589 pm_runtime_mark_last_busy(st->dev); in at91_adc_resume()
2590 pm_runtime_put_noidle(st->dev); in at91_adc_resume()
2591 clk_disable_unprepare(st->per_clk); in at91_adc_resume()
2593 regulator_disable(st->vref); in at91_adc_resume()
2595 regulator_disable(st->reg); in at91_adc_resume()
2604 struct at91_adc_state *st = iio_priv(indio_dev); in at91_adc_runtime_suspend() local
2606 clk_disable(st->per_clk); in at91_adc_runtime_suspend()
2614 struct at91_adc_state *st = iio_priv(indio_dev); in at91_adc_runtime_resume() local
2616 return clk_enable(st->per_clk); in at91_adc_runtime_resume()