Lines Matching defs:iommu_pmu
683 struct iommu_pmu { struct
684 struct intel_iommu *iommu;
685 u32 num_cntr; /* Number of counters */
686 u32 num_eg; /* Number of event group */
687 u32 cntr_width; /* Counter width */
688 u32 cntr_stride; /* Counter Stride */
689 u32 filter; /* Bitmask of filter support */
690 void __iomem *base; /* the PerfMon base address */
691 void __iomem *cfg_reg; /* counter configuration base address */
692 void __iomem *cntr_reg; /* counter 0 address*/
693 void __iomem *overflow; /* overflow status register */
695 u64 *evcap; /* Indicates all supported events */
696 u32 **cntr_evcap; /* Supported events of each counter. */
698 struct pmu pmu;
700 struct perf_event *event_list[IOMMU_PMU_IDX_MAX];
701 unsigned char irq_name[16];