19 #include <soc/mediatek/smi.h>
23 /* SMI COMMON */
39 /* SMI LARB */
104 	MTK_SMI_GEN2,		/* gen2 smi common */
105 	MTK_SMI_GEN2_SUB_COMM,	/* gen2 smi sub common */
108 /* larbs: Require apb/smi clocks while gals is optional. */
109 static const char * const mtk_smi_larb_clks[] = {"apb", "smi", "gals"};
114  * common: Require these four clocks in has_gals case. Otherwise, only apb/smi are required.
115  * sub common: Require apb/smi/gals0 clocks in has_gals case. Otherwise, only apb/smi are required.
117 static const char * const mtk_smi_common_clks[] = {"apb", "smi", "gals0", "gals1"};
153 	struct mtk_smi			smi;  member
473 	{.compatible = "mediatek,mt2701-smi-larb", .data = &mtk_smi_larb_mt2701},
474 	{.compatible = "mediatek,mt2712-smi-larb", .data = &mtk_smi_larb_mt2712},
475 	{.compatible = "mediatek,mt6779-smi-larb", .data = &mtk_smi_larb_mt6779},
476 	{.compatible = "mediatek,mt6795-smi-larb", .data = &mtk_smi_larb_mt8173},
477 	{.compatible = "mediatek,mt8167-smi-larb", .data = &mtk_smi_larb_mt8167},
478 	{.compatible = "mediatek,mt8173-smi-larb", .data = &mtk_smi_larb_mt8173},
479 	{.compatible = "mediatek,mt8183-smi-larb", .data = &mtk_smi_larb_mt8183},
480 	{.compatible = "mediatek,mt8186-smi-larb", .data = &mtk_smi_larb_mt8186},
481 	{.compatible = "mediatek,mt8188-smi-larb", .data = &mtk_smi_larb_mt8188},
482 	{.compatible = "mediatek,mt8192-smi-larb", .data = &mtk_smi_larb_mt8192},
483 	{.compatible = "mediatek,mt8195-smi-larb", .data = &mtk_smi_larb_mt8195},
498 		dev_err(larb->smi.dev, "sleep ctrl is not ready(0x%x).\n", tmp);  in mtk_smi_larb_sleep_ctrl_enable()
515 	smi_com_node = of_parse_phandle(dev->of_node, "mediatek,smi", 0);  in mtk_smi_device_link_common()
522 		/* smi common is the supplier, Make sure it is ready before */  in mtk_smi_device_link_common()
531 			dev_err(dev, "Unable to link smi-common dev\n");  in mtk_smi_device_link_common()
543 static int mtk_smi_dts_clk_init(struct device *dev, struct mtk_smi *smi,  in mtk_smi_dts_clk_init()  argument
551 		smi->clks[i].id = clks[i];  in mtk_smi_dts_clk_init()
552 	ret = devm_clk_bulk_get(dev, clk_nr_required, smi->clks);  in mtk_smi_dts_clk_init()
557 		smi->clks[i].id = clks[i];  in mtk_smi_dts_clk_init()
559 					 smi->clks + clk_nr_required);  in mtk_smi_dts_clk_init()
560 	smi->clk_num = clk_nr_required + clk_nr_optional;  in mtk_smi_dts_clk_init()
579 	ret = mtk_smi_dts_clk_init(dev, &larb->smi, mtk_smi_larb_clks,  in mtk_smi_larb_probe()
584 	larb->smi.dev = dev;  in mtk_smi_larb_probe()
618 	ret = clk_bulk_prepare_enable(larb->smi.clk_num, larb->smi.clks);  in mtk_smi_larb_resume()
640 	clk_bulk_disable_unprepare(larb->smi.clk_num, larb->smi.clks);  in mtk_smi_larb_suspend()
654 		.name = "mtk-smi-larb",
755 	{.compatible = "mediatek,mt2701-smi-common", .data = &mtk_smi_common_gen1},
756 	{.compatible = "mediatek,mt2712-smi-common", .data = &mtk_smi_common_gen2},
757 	{.compatible = "mediatek,mt6779-smi-common", .data = &mtk_smi_common_mt6779},
758 	{.compatible = "mediatek,mt6795-smi-common", .data = &mtk_smi_common_mt6795},
759 	{.compatible = "mediatek,mt8167-smi-common", .data = &mtk_smi_common_gen2},
760 	{.compatible = "mediatek,mt8173-smi-common", .data = &mtk_smi_common_gen2},
761 	{.compatible = "mediatek,mt8183-smi-common", .data = &mtk_smi_common_mt8183},
762 	{.compatible = "mediatek,mt8186-smi-common", .data = &mtk_smi_common_mt8186},
763 	{.compatible = "mediatek,mt8188-smi-common-vdo", .data = &mtk_smi_common_mt8188_vdo},
764 	{.compatible = "mediatek,mt8188-smi-common-vpp", .data = &mtk_smi_common_mt8188_vpp},
765 	{.compatible = "mediatek,mt8192-smi-common", .data = &mtk_smi_common_mt8192},
766 	{.compatible = "mediatek,mt8195-smi-common-vdo", .data = &mtk_smi_common_mt8195_vdo},
767 	{.compatible = "mediatek,mt8195-smi-common-vpp", .data = &mtk_smi_common_mt8195_vpp},
768 	{.compatible = "mediatek,mt8195-smi-sub-common", .data = &mtk_smi_sub_common_mt8195},
769 	{.compatible = "mediatek,mt8365-smi-common", .data = &mtk_smi_common_mt8365},
797 	 * for mtk smi gen 1, we need to get the ao(always on) base to config  in mtk_smi_common_probe()
798 	 * m4u port, and we need to enable the aync clock for transform the smi  in mtk_smi_common_probe()
799 	 * clock into emi clock domain, but for mtk smi gen2, there's no smi ao  in mtk_smi_common_probe()
816 	/* link its smi-common if this is smi-sub-common */  in mtk_smi_common_probe()
876 		.name = "mtk-smi-common",
899 MODULE_DESCRIPTION("MediaTek SMI driver");