Lines Matching full:pcr
64 static int rtsx_comm_set_ltr_latency(struct rtsx_pcr *pcr, u32 latency) in rtsx_comm_set_ltr_latency() argument
66 rtsx_pci_write_register(pcr, MSGTXDATA0, in rtsx_comm_set_ltr_latency()
68 rtsx_pci_write_register(pcr, MSGTXDATA1, in rtsx_comm_set_ltr_latency()
70 rtsx_pci_write_register(pcr, MSGTXDATA2, in rtsx_comm_set_ltr_latency()
72 rtsx_pci_write_register(pcr, MSGTXDATA3, in rtsx_comm_set_ltr_latency()
74 rtsx_pci_write_register(pcr, LTR_CTL, LTR_TX_EN_MASK | in rtsx_comm_set_ltr_latency()
80 int rtsx_set_ltr_latency(struct rtsx_pcr *pcr, u32 latency) in rtsx_set_ltr_latency() argument
82 return rtsx_comm_set_ltr_latency(pcr, latency); in rtsx_set_ltr_latency()
85 static void rtsx_comm_set_aspm(struct rtsx_pcr *pcr, bool enable) in rtsx_comm_set_aspm() argument
87 if (pcr->aspm_enabled == enable) in rtsx_comm_set_aspm()
90 if (pcr->aspm_mode == ASPM_MODE_CFG) { in rtsx_comm_set_aspm()
91 pcie_capability_clear_and_set_word(pcr->pci, PCI_EXP_LNKCTL, in rtsx_comm_set_aspm()
93 enable ? pcr->aspm_en : 0); in rtsx_comm_set_aspm()
94 } else if (pcr->aspm_mode == ASPM_MODE_REG) { in rtsx_comm_set_aspm()
95 if (pcr->aspm_en & 0x02) in rtsx_comm_set_aspm()
96 rtsx_pci_write_register(pcr, ASPM_FORCE_CTL, FORCE_ASPM_CTL0 | in rtsx_comm_set_aspm()
99 rtsx_pci_write_register(pcr, ASPM_FORCE_CTL, FORCE_ASPM_CTL0 | in rtsx_comm_set_aspm()
103 if (!enable && (pcr->aspm_en & 0x02)) in rtsx_comm_set_aspm()
106 pcr->aspm_enabled = enable; in rtsx_comm_set_aspm()
109 static void rtsx_disable_aspm(struct rtsx_pcr *pcr) in rtsx_disable_aspm() argument
111 if (pcr->ops->set_aspm) in rtsx_disable_aspm()
112 pcr->ops->set_aspm(pcr, false); in rtsx_disable_aspm()
114 rtsx_comm_set_aspm(pcr, false); in rtsx_disable_aspm()
117 int rtsx_set_l1off_sub(struct rtsx_pcr *pcr, u8 val) in rtsx_set_l1off_sub() argument
119 rtsx_pci_write_register(pcr, L1SUB_CONFIG3, 0xFF, val); in rtsx_set_l1off_sub()
124 static void rtsx_set_l1off_sub_cfg_d0(struct rtsx_pcr *pcr, int active) in rtsx_set_l1off_sub_cfg_d0() argument
126 if (pcr->ops->set_l1off_cfg_sub_d0) in rtsx_set_l1off_sub_cfg_d0()
127 pcr->ops->set_l1off_cfg_sub_d0(pcr, active); in rtsx_set_l1off_sub_cfg_d0()
130 static void rtsx_comm_pm_full_on(struct rtsx_pcr *pcr) in rtsx_comm_pm_full_on() argument
132 struct rtsx_cr_option *option = &pcr->option; in rtsx_comm_pm_full_on()
134 rtsx_disable_aspm(pcr); in rtsx_comm_pm_full_on()
140 rtsx_set_ltr_latency(pcr, option->ltr_active_latency); in rtsx_comm_pm_full_on()
142 if (rtsx_check_dev_flag(pcr, LTR_L1SS_PWR_GATE_EN)) in rtsx_comm_pm_full_on()
143 rtsx_set_l1off_sub_cfg_d0(pcr, 1); in rtsx_comm_pm_full_on()
146 static void rtsx_pm_full_on(struct rtsx_pcr *pcr) in rtsx_pm_full_on() argument
148 rtsx_comm_pm_full_on(pcr); in rtsx_pm_full_on()
151 void rtsx_pci_start_run(struct rtsx_pcr *pcr) in rtsx_pci_start_run() argument
154 if (pcr->remove_pci) in rtsx_pci_start_run()
157 if (pcr->state != PDEV_STAT_RUN) { in rtsx_pci_start_run()
158 pcr->state = PDEV_STAT_RUN; in rtsx_pci_start_run()
159 if (pcr->ops->enable_auto_blink) in rtsx_pci_start_run()
160 pcr->ops->enable_auto_blink(pcr); in rtsx_pci_start_run()
161 rtsx_pm_full_on(pcr); in rtsx_pci_start_run()
166 int rtsx_pci_write_register(struct rtsx_pcr *pcr, u16 addr, u8 mask, u8 data) in rtsx_pci_write_register() argument
175 rtsx_pci_writel(pcr, RTSX_HAIMR, val); in rtsx_pci_write_register()
178 val = rtsx_pci_readl(pcr, RTSX_HAIMR); in rtsx_pci_write_register()
190 int rtsx_pci_read_register(struct rtsx_pcr *pcr, u16 addr, u8 *data) in rtsx_pci_read_register() argument
196 rtsx_pci_writel(pcr, RTSX_HAIMR, val); in rtsx_pci_read_register()
199 val = rtsx_pci_readl(pcr, RTSX_HAIMR); in rtsx_pci_read_register()
214 int __rtsx_pci_write_phy_register(struct rtsx_pcr *pcr, u8 addr, u16 val) in __rtsx_pci_write_phy_register() argument
219 rtsx_pci_write_register(pcr, PHYDATA0, 0xFF, (u8)val); in __rtsx_pci_write_phy_register()
220 rtsx_pci_write_register(pcr, PHYDATA1, 0xFF, (u8)(val >> 8)); in __rtsx_pci_write_phy_register()
221 rtsx_pci_write_register(pcr, PHYADDR, 0xFF, addr); in __rtsx_pci_write_phy_register()
222 rtsx_pci_write_register(pcr, PHYRWCTL, 0xFF, 0x81); in __rtsx_pci_write_phy_register()
225 err = rtsx_pci_read_register(pcr, PHYRWCTL, &tmp); in __rtsx_pci_write_phy_register()
241 int rtsx_pci_write_phy_register(struct rtsx_pcr *pcr, u8 addr, u16 val) in rtsx_pci_write_phy_register() argument
243 if (pcr->ops->write_phy) in rtsx_pci_write_phy_register()
244 return pcr->ops->write_phy(pcr, addr, val); in rtsx_pci_write_phy_register()
246 return __rtsx_pci_write_phy_register(pcr, addr, val); in rtsx_pci_write_phy_register()
250 int __rtsx_pci_read_phy_register(struct rtsx_pcr *pcr, u8 addr, u16 *val) in __rtsx_pci_read_phy_register() argument
256 rtsx_pci_write_register(pcr, PHYADDR, 0xFF, addr); in __rtsx_pci_read_phy_register()
257 rtsx_pci_write_register(pcr, PHYRWCTL, 0xFF, 0x80); in __rtsx_pci_read_phy_register()
260 err = rtsx_pci_read_register(pcr, PHYRWCTL, &tmp); in __rtsx_pci_read_phy_register()
273 rtsx_pci_read_register(pcr, PHYDATA0, &val1); in __rtsx_pci_read_phy_register()
274 rtsx_pci_read_register(pcr, PHYDATA1, &val2); in __rtsx_pci_read_phy_register()
283 int rtsx_pci_read_phy_register(struct rtsx_pcr *pcr, u8 addr, u16 *val) in rtsx_pci_read_phy_register() argument
285 if (pcr->ops->read_phy) in rtsx_pci_read_phy_register()
286 return pcr->ops->read_phy(pcr, addr, val); in rtsx_pci_read_phy_register()
288 return __rtsx_pci_read_phy_register(pcr, addr, val); in rtsx_pci_read_phy_register()
292 void rtsx_pci_stop_cmd(struct rtsx_pcr *pcr) in rtsx_pci_stop_cmd() argument
294 if (pcr->ops->stop_cmd) in rtsx_pci_stop_cmd()
295 return pcr->ops->stop_cmd(pcr); in rtsx_pci_stop_cmd()
297 rtsx_pci_writel(pcr, RTSX_HCBCTLR, STOP_CMD); in rtsx_pci_stop_cmd()
298 rtsx_pci_writel(pcr, RTSX_HDBCTLR, STOP_DMA); in rtsx_pci_stop_cmd()
300 rtsx_pci_write_register(pcr, DMACTL, 0x80, 0x80); in rtsx_pci_stop_cmd()
301 rtsx_pci_write_register(pcr, RBCTL, 0x80, 0x80); in rtsx_pci_stop_cmd()
305 void rtsx_pci_add_cmd(struct rtsx_pcr *pcr, in rtsx_pci_add_cmd() argument
310 u32 *ptr = (u32 *)(pcr->host_cmds_ptr); in rtsx_pci_add_cmd()
317 spin_lock_irqsave(&pcr->lock, flags); in rtsx_pci_add_cmd()
318 ptr += pcr->ci; in rtsx_pci_add_cmd()
319 if (pcr->ci < (HOST_CMDS_BUF_LEN / 4)) { in rtsx_pci_add_cmd()
322 pcr->ci++; in rtsx_pci_add_cmd()
324 spin_unlock_irqrestore(&pcr->lock, flags); in rtsx_pci_add_cmd()
328 void rtsx_pci_send_cmd_no_wait(struct rtsx_pcr *pcr) in rtsx_pci_send_cmd_no_wait() argument
332 rtsx_pci_writel(pcr, RTSX_HCBAR, pcr->host_cmds_addr); in rtsx_pci_send_cmd_no_wait()
334 val |= (u32)(pcr->ci * 4) & 0x00FFFFFF; in rtsx_pci_send_cmd_no_wait()
337 rtsx_pci_writel(pcr, RTSX_HCBCTLR, val); in rtsx_pci_send_cmd_no_wait()
341 int rtsx_pci_send_cmd(struct rtsx_pcr *pcr, int timeout) in rtsx_pci_send_cmd() argument
349 spin_lock_irqsave(&pcr->lock, flags); in rtsx_pci_send_cmd()
352 pcr->done = &trans_done; in rtsx_pci_send_cmd()
353 pcr->trans_result = TRANS_NOT_READY; in rtsx_pci_send_cmd()
356 rtsx_pci_writel(pcr, RTSX_HCBAR, pcr->host_cmds_addr); in rtsx_pci_send_cmd()
358 val |= (u32)(pcr->ci * 4) & 0x00FFFFFF; in rtsx_pci_send_cmd()
361 rtsx_pci_writel(pcr, RTSX_HCBCTLR, val); in rtsx_pci_send_cmd()
363 spin_unlock_irqrestore(&pcr->lock, flags); in rtsx_pci_send_cmd()
369 pcr_dbg(pcr, "Timeout (%s %d)\n", __func__, __LINE__); in rtsx_pci_send_cmd()
374 spin_lock_irqsave(&pcr->lock, flags); in rtsx_pci_send_cmd()
375 if (pcr->trans_result == TRANS_RESULT_FAIL) in rtsx_pci_send_cmd()
377 else if (pcr->trans_result == TRANS_RESULT_OK) in rtsx_pci_send_cmd()
379 else if (pcr->trans_result == TRANS_NO_DEVICE) in rtsx_pci_send_cmd()
381 spin_unlock_irqrestore(&pcr->lock, flags); in rtsx_pci_send_cmd()
384 spin_lock_irqsave(&pcr->lock, flags); in rtsx_pci_send_cmd()
385 pcr->done = NULL; in rtsx_pci_send_cmd()
386 spin_unlock_irqrestore(&pcr->lock, flags); in rtsx_pci_send_cmd()
389 rtsx_pci_stop_cmd(pcr); in rtsx_pci_send_cmd()
391 if (pcr->finish_me) in rtsx_pci_send_cmd()
392 complete(pcr->finish_me); in rtsx_pci_send_cmd()
398 static void rtsx_pci_add_sg_tbl(struct rtsx_pcr *pcr, in rtsx_pci_add_sg_tbl() argument
401 u64 *ptr = (u64 *)(pcr->host_sg_tbl_ptr) + pcr->sgi; in rtsx_pci_add_sg_tbl()
405 pcr_dbg(pcr, "DMA addr: 0x%x, Len: 0x%x\n", (unsigned int)addr, len); in rtsx_pci_add_sg_tbl()
410 if ((PCI_PID(pcr) == PID_5261) || (PCI_PID(pcr) == PID_5228)) { in rtsx_pci_add_sg_tbl()
420 pcr->sgi++; in rtsx_pci_add_sg_tbl()
423 int rtsx_pci_transfer_data(struct rtsx_pcr *pcr, struct scatterlist *sglist, in rtsx_pci_transfer_data() argument
428 pcr_dbg(pcr, "--> %s: num_sg = %d\n", __func__, num_sg); in rtsx_pci_transfer_data()
429 count = rtsx_pci_dma_map_sg(pcr, sglist, num_sg, read); in rtsx_pci_transfer_data()
432 pcr_dbg(pcr, "DMA mapping count: %d\n", count); in rtsx_pci_transfer_data()
434 err = rtsx_pci_dma_transfer(pcr, sglist, count, read, timeout); in rtsx_pci_transfer_data()
436 rtsx_pci_dma_unmap_sg(pcr, sglist, num_sg, read); in rtsx_pci_transfer_data()
442 int rtsx_pci_dma_map_sg(struct rtsx_pcr *pcr, struct scatterlist *sglist, in rtsx_pci_dma_map_sg() argument
447 if (pcr->remove_pci) in rtsx_pci_dma_map_sg()
453 return dma_map_sg(&(pcr->pci->dev), sglist, num_sg, dir); in rtsx_pci_dma_map_sg()
457 void rtsx_pci_dma_unmap_sg(struct rtsx_pcr *pcr, struct scatterlist *sglist, in rtsx_pci_dma_unmap_sg() argument
462 dma_unmap_sg(&(pcr->pci->dev), sglist, num_sg, dir); in rtsx_pci_dma_unmap_sg()
466 int rtsx_pci_dma_transfer(struct rtsx_pcr *pcr, struct scatterlist *sglist, in rtsx_pci_dma_transfer() argument
479 if (pcr->remove_pci) in rtsx_pci_dma_transfer()
486 pcr->sgi = 0; in rtsx_pci_dma_transfer()
490 rtsx_pci_add_sg_tbl(pcr, addr, len, i == count - 1); in rtsx_pci_dma_transfer()
493 spin_lock_irqsave(&pcr->lock, flags); in rtsx_pci_dma_transfer()
495 pcr->done = &trans_done; in rtsx_pci_dma_transfer()
496 pcr->trans_result = TRANS_NOT_READY; in rtsx_pci_dma_transfer()
498 rtsx_pci_writel(pcr, RTSX_HDBAR, pcr->host_sg_tbl_addr); in rtsx_pci_dma_transfer()
499 rtsx_pci_writel(pcr, RTSX_HDBCTLR, val); in rtsx_pci_dma_transfer()
501 spin_unlock_irqrestore(&pcr->lock, flags); in rtsx_pci_dma_transfer()
506 pcr_dbg(pcr, "Timeout (%s %d)\n", __func__, __LINE__); in rtsx_pci_dma_transfer()
511 spin_lock_irqsave(&pcr->lock, flags); in rtsx_pci_dma_transfer()
512 if (pcr->trans_result == TRANS_RESULT_FAIL) { in rtsx_pci_dma_transfer()
514 if (pcr->dma_error_count < RTS_MAX_TIMES_FREQ_REDUCTION) in rtsx_pci_dma_transfer()
515 pcr->dma_error_count++; in rtsx_pci_dma_transfer()
518 else if (pcr->trans_result == TRANS_NO_DEVICE) in rtsx_pci_dma_transfer()
520 spin_unlock_irqrestore(&pcr->lock, flags); in rtsx_pci_dma_transfer()
523 spin_lock_irqsave(&pcr->lock, flags); in rtsx_pci_dma_transfer()
524 pcr->done = NULL; in rtsx_pci_dma_transfer()
525 spin_unlock_irqrestore(&pcr->lock, flags); in rtsx_pci_dma_transfer()
528 rtsx_pci_stop_cmd(pcr); in rtsx_pci_dma_transfer()
530 if (pcr->finish_me) in rtsx_pci_dma_transfer()
531 complete(pcr->finish_me); in rtsx_pci_dma_transfer()
537 int rtsx_pci_read_ppbuf(struct rtsx_pcr *pcr, u8 *buf, int buf_len) in rtsx_pci_read_ppbuf() argument
550 rtsx_pci_init_cmd(pcr); in rtsx_pci_read_ppbuf()
553 rtsx_pci_add_cmd(pcr, READ_REG_CMD, reg++, 0, 0); in rtsx_pci_read_ppbuf()
555 err = rtsx_pci_send_cmd(pcr, 250); in rtsx_pci_read_ppbuf()
559 memcpy(ptr, rtsx_pci_get_cmd_data(pcr), 256); in rtsx_pci_read_ppbuf()
564 rtsx_pci_init_cmd(pcr); in rtsx_pci_read_ppbuf()
567 rtsx_pci_add_cmd(pcr, READ_REG_CMD, reg++, 0, 0); in rtsx_pci_read_ppbuf()
569 err = rtsx_pci_send_cmd(pcr, 250); in rtsx_pci_read_ppbuf()
574 memcpy(ptr, rtsx_pci_get_cmd_data(pcr), buf_len % 256); in rtsx_pci_read_ppbuf()
580 int rtsx_pci_write_ppbuf(struct rtsx_pcr *pcr, u8 *buf, int buf_len) in rtsx_pci_write_ppbuf() argument
593 rtsx_pci_init_cmd(pcr); in rtsx_pci_write_ppbuf()
596 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, in rtsx_pci_write_ppbuf()
601 err = rtsx_pci_send_cmd(pcr, 250); in rtsx_pci_write_ppbuf()
607 rtsx_pci_init_cmd(pcr); in rtsx_pci_write_ppbuf()
610 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, in rtsx_pci_write_ppbuf()
615 err = rtsx_pci_send_cmd(pcr, 250); in rtsx_pci_write_ppbuf()
624 static int rtsx_pci_set_pull_ctl(struct rtsx_pcr *pcr, const u32 *tbl) in rtsx_pci_set_pull_ctl() argument
626 rtsx_pci_init_cmd(pcr); in rtsx_pci_set_pull_ctl()
629 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, in rtsx_pci_set_pull_ctl()
634 return rtsx_pci_send_cmd(pcr, 100); in rtsx_pci_set_pull_ctl()
637 int rtsx_pci_card_pull_ctl_enable(struct rtsx_pcr *pcr, int card) in rtsx_pci_card_pull_ctl_enable() argument
642 tbl = pcr->sd_pull_ctl_enable_tbl; in rtsx_pci_card_pull_ctl_enable()
644 tbl = pcr->ms_pull_ctl_enable_tbl; in rtsx_pci_card_pull_ctl_enable()
648 return rtsx_pci_set_pull_ctl(pcr, tbl); in rtsx_pci_card_pull_ctl_enable()
652 int rtsx_pci_card_pull_ctl_disable(struct rtsx_pcr *pcr, int card) in rtsx_pci_card_pull_ctl_disable() argument
657 tbl = pcr->sd_pull_ctl_disable_tbl; in rtsx_pci_card_pull_ctl_disable()
659 tbl = pcr->ms_pull_ctl_disable_tbl; in rtsx_pci_card_pull_ctl_disable()
663 return rtsx_pci_set_pull_ctl(pcr, tbl); in rtsx_pci_card_pull_ctl_disable()
667 static void rtsx_pci_enable_bus_int(struct rtsx_pcr *pcr) in rtsx_pci_enable_bus_int() argument
669 struct rtsx_hw_param *hw_param = &pcr->hw_param; in rtsx_pci_enable_bus_int()
671 pcr->bier = TRANS_OK_INT_EN | TRANS_FAIL_INT_EN | SD_INT_EN in rtsx_pci_enable_bus_int()
674 if (pcr->num_slots > 1) in rtsx_pci_enable_bus_int()
675 pcr->bier |= MS_INT_EN; in rtsx_pci_enable_bus_int()
678 rtsx_pci_writel(pcr, RTSX_BIER, pcr->bier); in rtsx_pci_enable_bus_int()
680 pcr_dbg(pcr, "RTSX_BIER: 0x%08x\n", pcr->bier); in rtsx_pci_enable_bus_int()
700 int rtsx_pci_switch_clock(struct rtsx_pcr *pcr, unsigned int card_clock, in rtsx_pci_switch_clock() argument
713 if (PCI_PID(pcr) == PID_5261) in rtsx_pci_switch_clock()
714 return rts5261_pci_switch_clock(pcr, card_clock, in rtsx_pci_switch_clock()
716 if (PCI_PID(pcr) == PID_5228) in rtsx_pci_switch_clock()
717 return rts5228_pci_switch_clock(pcr, card_clock, in rtsx_pci_switch_clock()
719 if (PCI_PID(pcr) == PID_5264) in rtsx_pci_switch_clock()
720 return rts5264_pci_switch_clock(pcr, card_clock, in rtsx_pci_switch_clock()
730 err = rtsx_pci_write_register(pcr, SD_CFG1, in rtsx_pci_switch_clock()
737 pcr->dma_error_count && in rtsx_pci_switch_clock()
738 PCI_PID(pcr) == RTS5227_DEVICE_ID) in rtsx_pci_switch_clock()
740 (pcr->dma_error_count * 20000000); in rtsx_pci_switch_clock()
743 pcr_dbg(pcr, "Switch card clock to %dMHz\n", card_clock); in rtsx_pci_switch_clock()
748 pcr_dbg(pcr, "Internal SSC clock: %dMHz (cur_clock = %d)\n", in rtsx_pci_switch_clock()
749 clk, pcr->cur_clock); in rtsx_pci_switch_clock()
751 if (clk == pcr->cur_clock) in rtsx_pci_switch_clock()
754 if (pcr->ops->conv_clk_and_div_n) in rtsx_pci_switch_clock()
755 n = (u8)pcr->ops->conv_clk_and_div_n(clk, CLK_TO_DIV_N); in rtsx_pci_switch_clock()
768 if (pcr->ops->conv_clk_and_div_n) { in rtsx_pci_switch_clock()
769 int dbl_clk = pcr->ops->conv_clk_and_div_n(n, in rtsx_pci_switch_clock()
771 n = (u8)pcr->ops->conv_clk_and_div_n(dbl_clk, in rtsx_pci_switch_clock()
778 pcr_dbg(pcr, "n = %d, div = %d\n", n, div); in rtsx_pci_switch_clock()
785 pcr_dbg(pcr, "ssc_depth = %d\n", ssc_depth); in rtsx_pci_switch_clock()
787 rtsx_pci_init_cmd(pcr); in rtsx_pci_switch_clock()
788 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CLK_CTL, in rtsx_pci_switch_clock()
790 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CLK_DIV, in rtsx_pci_switch_clock()
792 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SSC_CTL1, SSC_RSTB, 0); in rtsx_pci_switch_clock()
793 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SSC_CTL2, in rtsx_pci_switch_clock()
795 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SSC_DIV_N_0, 0xFF, n); in rtsx_pci_switch_clock()
796 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SSC_CTL1, SSC_RSTB, SSC_RSTB); in rtsx_pci_switch_clock()
798 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_VPCLK0_CTL, in rtsx_pci_switch_clock()
800 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_VPCLK0_CTL, in rtsx_pci_switch_clock()
804 err = rtsx_pci_send_cmd(pcr, 2000); in rtsx_pci_switch_clock()
810 err = rtsx_pci_write_register(pcr, CLK_CTL, CLK_LOW_FREQ, 0); in rtsx_pci_switch_clock()
814 pcr->cur_clock = clk; in rtsx_pci_switch_clock()
819 int rtsx_pci_card_power_on(struct rtsx_pcr *pcr, int card) in rtsx_pci_card_power_on() argument
821 if (pcr->ops->card_power_on) in rtsx_pci_card_power_on()
822 return pcr->ops->card_power_on(pcr, card); in rtsx_pci_card_power_on()
828 int rtsx_pci_card_power_off(struct rtsx_pcr *pcr, int card) in rtsx_pci_card_power_off() argument
830 if (pcr->ops->card_power_off) in rtsx_pci_card_power_off()
831 return pcr->ops->card_power_off(pcr, card); in rtsx_pci_card_power_off()
837 int rtsx_pci_card_exclusive_check(struct rtsx_pcr *pcr, int card) in rtsx_pci_card_exclusive_check() argument
844 if (!(pcr->flags & PCR_MS_PMOS)) { in rtsx_pci_card_exclusive_check()
848 if (pcr->card_exist & (~cd_mask[card])) in rtsx_pci_card_exclusive_check()
856 int rtsx_pci_switch_output_voltage(struct rtsx_pcr *pcr, u8 voltage) in rtsx_pci_switch_output_voltage() argument
858 if (pcr->ops->switch_output_voltage) in rtsx_pci_switch_output_voltage()
859 return pcr->ops->switch_output_voltage(pcr, voltage); in rtsx_pci_switch_output_voltage()
865 unsigned int rtsx_pci_card_exist(struct rtsx_pcr *pcr) in rtsx_pci_card_exist() argument
869 val = rtsx_pci_readl(pcr, RTSX_BIPR); in rtsx_pci_card_exist()
870 if (pcr->ops->cd_deglitch) in rtsx_pci_card_exist()
871 val = pcr->ops->cd_deglitch(pcr); in rtsx_pci_card_exist()
877 void rtsx_pci_complete_unfinished_transfer(struct rtsx_pcr *pcr) in rtsx_pci_complete_unfinished_transfer() argument
881 pcr->finish_me = &finish; in rtsx_pci_complete_unfinished_transfer()
884 if (pcr->done) in rtsx_pci_complete_unfinished_transfer()
885 complete(pcr->done); in rtsx_pci_complete_unfinished_transfer()
887 if (!pcr->remove_pci) in rtsx_pci_complete_unfinished_transfer()
888 rtsx_pci_stop_cmd(pcr); in rtsx_pci_complete_unfinished_transfer()
892 pcr->finish_me = NULL; in rtsx_pci_complete_unfinished_transfer()
899 struct rtsx_pcr *pcr; in rtsx_pci_card_detect() local
905 pcr = container_of(dwork, struct rtsx_pcr, carddet_work); in rtsx_pci_card_detect()
907 pcr_dbg(pcr, "--> %s\n", __func__); in rtsx_pci_card_detect()
909 mutex_lock(&pcr->pcr_mutex); in rtsx_pci_card_detect()
910 spin_lock_irqsave(&pcr->lock, flags); in rtsx_pci_card_detect()
912 irq_status = rtsx_pci_readl(pcr, RTSX_BIPR); in rtsx_pci_card_detect()
913 pcr_dbg(pcr, "irq_status: 0x%08x\n", irq_status); in rtsx_pci_card_detect()
916 card_inserted = pcr->card_inserted & irq_status; in rtsx_pci_card_detect()
917 card_removed = pcr->card_removed; in rtsx_pci_card_detect()
918 pcr->card_inserted = 0; in rtsx_pci_card_detect()
919 pcr->card_removed = 0; in rtsx_pci_card_detect()
921 spin_unlock_irqrestore(&pcr->lock, flags); in rtsx_pci_card_detect()
924 pcr_dbg(pcr, "card_inserted: 0x%x, card_removed: 0x%x\n", in rtsx_pci_card_detect()
927 if (pcr->ops->cd_deglitch) in rtsx_pci_card_detect()
928 card_inserted = pcr->ops->cd_deglitch(pcr); in rtsx_pci_card_detect()
932 pcr->card_exist |= card_inserted; in rtsx_pci_card_detect()
933 pcr->card_exist &= ~card_removed; in rtsx_pci_card_detect()
936 mutex_unlock(&pcr->pcr_mutex); in rtsx_pci_card_detect()
938 if ((card_detect & SD_EXIST) && pcr->slots[RTSX_SD_CARD].card_event) in rtsx_pci_card_detect()
939 pcr->slots[RTSX_SD_CARD].card_event( in rtsx_pci_card_detect()
940 pcr->slots[RTSX_SD_CARD].p_dev); in rtsx_pci_card_detect()
941 if ((card_detect & MS_EXIST) && pcr->slots[RTSX_MS_CARD].card_event) in rtsx_pci_card_detect()
942 pcr->slots[RTSX_MS_CARD].card_event( in rtsx_pci_card_detect()
943 pcr->slots[RTSX_MS_CARD].p_dev); in rtsx_pci_card_detect()
946 static void rtsx_pci_process_ocp(struct rtsx_pcr *pcr) in rtsx_pci_process_ocp() argument
948 if (pcr->ops->process_ocp) { in rtsx_pci_process_ocp()
949 pcr->ops->process_ocp(pcr); in rtsx_pci_process_ocp()
951 if (!pcr->option.ocp_en) in rtsx_pci_process_ocp()
953 rtsx_pci_get_ocpstat(pcr, &pcr->ocp_stat); in rtsx_pci_process_ocp()
954 if (pcr->ocp_stat & (SD_OC_NOW | SD_OC_EVER)) { in rtsx_pci_process_ocp()
955 rtsx_pci_card_power_off(pcr, RTSX_SD_CARD); in rtsx_pci_process_ocp()
956 rtsx_pci_write_register(pcr, CARD_OE, SD_OUTPUT_EN, 0); in rtsx_pci_process_ocp()
957 rtsx_pci_clear_ocpstat(pcr); in rtsx_pci_process_ocp()
958 pcr->ocp_stat = 0; in rtsx_pci_process_ocp()
963 static int rtsx_pci_process_ocp_interrupt(struct rtsx_pcr *pcr) in rtsx_pci_process_ocp_interrupt() argument
965 if (pcr->option.ocp_en) in rtsx_pci_process_ocp_interrupt()
966 rtsx_pci_process_ocp(pcr); in rtsx_pci_process_ocp_interrupt()
973 struct rtsx_pcr *pcr = dev_id; in rtsx_pci_isr() local
976 if (!pcr) in rtsx_pci_isr()
979 spin_lock(&pcr->lock); in rtsx_pci_isr()
981 int_reg = rtsx_pci_readl(pcr, RTSX_BIPR); in rtsx_pci_isr()
983 rtsx_pci_writel(pcr, RTSX_BIPR, int_reg); in rtsx_pci_isr()
984 if ((int_reg & pcr->bier) == 0) { in rtsx_pci_isr()
985 spin_unlock(&pcr->lock); in rtsx_pci_isr()
989 spin_unlock(&pcr->lock); in rtsx_pci_isr()
993 int_reg &= (pcr->bier | 0x7FFFFF); in rtsx_pci_isr()
996 ((int_reg & SD_OVP_INT) && (PCI_PID(pcr) == PID_5264))) in rtsx_pci_isr()
997 rtsx_pci_process_ocp_interrupt(pcr); in rtsx_pci_isr()
1001 pcr->card_inserted |= SD_EXIST; in rtsx_pci_isr()
1003 pcr->card_removed |= SD_EXIST; in rtsx_pci_isr()
1004 pcr->card_inserted &= ~SD_EXIST; in rtsx_pci_isr()
1007 if ((PCI_PID(pcr) == PID_5261) || (PCI_PID(pcr) == PID_5264)) { in rtsx_pci_isr()
1008 rtsx_pci_write_register(pcr, RTS5261_FW_STATUS, in rtsx_pci_isr()
1010 pcr->extra_caps |= EXTRA_CAPS_SD_EXPRESS; in rtsx_pci_isr()
1013 pcr->dma_error_count = 0; in rtsx_pci_isr()
1018 pcr->card_inserted |= MS_EXIST; in rtsx_pci_isr()
1020 pcr->card_removed |= MS_EXIST; in rtsx_pci_isr()
1021 pcr->card_inserted &= ~MS_EXIST; in rtsx_pci_isr()
1027 pcr->trans_result = TRANS_RESULT_FAIL; in rtsx_pci_isr()
1028 if (pcr->done) in rtsx_pci_isr()
1029 complete(pcr->done); in rtsx_pci_isr()
1031 pcr->trans_result = TRANS_RESULT_OK; in rtsx_pci_isr()
1032 if (pcr->done) in rtsx_pci_isr()
1033 complete(pcr->done); in rtsx_pci_isr()
1037 if ((pcr->card_inserted || pcr->card_removed) && !(int_reg & SD_OC_INT)) in rtsx_pci_isr()
1038 schedule_delayed_work(&pcr->carddet_work, in rtsx_pci_isr()
1041 spin_unlock(&pcr->lock); in rtsx_pci_isr()
1045 static int rtsx_pci_acquire_irq(struct rtsx_pcr *pcr) in rtsx_pci_acquire_irq() argument
1047 pcr_dbg(pcr, "%s: pcr->msi_en = %d, pci->irq = %d\n", in rtsx_pci_acquire_irq()
1048 __func__, pcr->msi_en, pcr->pci->irq); in rtsx_pci_acquire_irq()
1050 if (request_irq(pcr->pci->irq, rtsx_pci_isr, in rtsx_pci_acquire_irq()
1051 pcr->msi_en ? 0 : IRQF_SHARED, in rtsx_pci_acquire_irq()
1052 DRV_NAME_RTSX_PCI, pcr)) { in rtsx_pci_acquire_irq()
1053 dev_err(&(pcr->pci->dev), in rtsx_pci_acquire_irq()
1055 pcr->pci->irq); in rtsx_pci_acquire_irq()
1059 pcr->irq = pcr->pci->irq; in rtsx_pci_acquire_irq()
1060 pci_intx(pcr->pci, !pcr->msi_en); in rtsx_pci_acquire_irq()
1065 static void rtsx_base_force_power_down(struct rtsx_pcr *pcr) in rtsx_base_force_power_down() argument
1068 rtsx_pci_write_register(pcr, AUTOLOAD_CFG_BASE + 1, MASK_8_BIT_DEF, 0); in rtsx_base_force_power_down()
1069 rtsx_pci_write_register(pcr, AUTOLOAD_CFG_BASE + 2, MASK_8_BIT_DEF, 0); in rtsx_base_force_power_down()
1070 rtsx_pci_write_register(pcr, AUTOLOAD_CFG_BASE + 3, in rtsx_base_force_power_down()
1073 rtsx_pci_write_register(pcr, pcr->reg_pm_ctrl3, in rtsx_base_force_power_down()
1076 rtsx_pci_write_register(pcr, FPDCTL, ALL_POWER_DOWN, ALL_POWER_DOWN); in rtsx_base_force_power_down()
1079 static void __maybe_unused rtsx_pci_power_off(struct rtsx_pcr *pcr, u8 pm_state, bool runtime) in rtsx_pci_power_off() argument
1081 if (pcr->ops->turn_off_led) in rtsx_pci_power_off()
1082 pcr->ops->turn_off_led(pcr); in rtsx_pci_power_off()
1084 rtsx_pci_writel(pcr, RTSX_BIER, 0); in rtsx_pci_power_off()
1085 pcr->bier = 0; in rtsx_pci_power_off()
1087 rtsx_pci_write_register(pcr, PETXCFG, 0x08, 0x08); in rtsx_pci_power_off()
1088 rtsx_pci_write_register(pcr, HOST_SLEEP_STATE, 0x03, pm_state); in rtsx_pci_power_off()
1090 if (pcr->ops->force_power_down) in rtsx_pci_power_off()
1091 pcr->ops->force_power_down(pcr, pm_state, runtime); in rtsx_pci_power_off()
1093 rtsx_base_force_power_down(pcr); in rtsx_pci_power_off()
1096 void rtsx_pci_enable_ocp(struct rtsx_pcr *pcr) in rtsx_pci_enable_ocp() argument
1100 if (pcr->ops->enable_ocp) { in rtsx_pci_enable_ocp()
1101 pcr->ops->enable_ocp(pcr); in rtsx_pci_enable_ocp()
1103 rtsx_pci_write_register(pcr, FPDCTL, OC_POWER_DOWN, 0); in rtsx_pci_enable_ocp()
1104 rtsx_pci_write_register(pcr, REG_OCPCTL, 0xFF, val); in rtsx_pci_enable_ocp()
1109 void rtsx_pci_disable_ocp(struct rtsx_pcr *pcr) in rtsx_pci_disable_ocp() argument
1113 if (pcr->ops->disable_ocp) { in rtsx_pci_disable_ocp()
1114 pcr->ops->disable_ocp(pcr); in rtsx_pci_disable_ocp()
1116 rtsx_pci_write_register(pcr, REG_OCPCTL, mask, 0); in rtsx_pci_disable_ocp()
1117 rtsx_pci_write_register(pcr, FPDCTL, OC_POWER_DOWN, in rtsx_pci_disable_ocp()
1122 void rtsx_pci_init_ocp(struct rtsx_pcr *pcr) in rtsx_pci_init_ocp() argument
1124 if (pcr->ops->init_ocp) { in rtsx_pci_init_ocp()
1125 pcr->ops->init_ocp(pcr); in rtsx_pci_init_ocp()
1127 struct rtsx_cr_option *option = &(pcr->option); in rtsx_pci_init_ocp()
1132 rtsx_pci_write_register(pcr, FPDCTL, OC_POWER_DOWN, 0); in rtsx_pci_init_ocp()
1133 rtsx_pci_write_register(pcr, REG_OCPPARA1, in rtsx_pci_init_ocp()
1135 rtsx_pci_write_register(pcr, REG_OCPPARA2, in rtsx_pci_init_ocp()
1137 rtsx_pci_write_register(pcr, REG_OCPGLITCH, in rtsx_pci_init_ocp()
1138 SD_OCP_GLITCH_MASK, pcr->hw_param.ocp_glitch); in rtsx_pci_init_ocp()
1139 rtsx_pci_enable_ocp(pcr); in rtsx_pci_init_ocp()
1144 int rtsx_pci_get_ocpstat(struct rtsx_pcr *pcr, u8 *val) in rtsx_pci_get_ocpstat() argument
1146 if (pcr->ops->get_ocpstat) in rtsx_pci_get_ocpstat()
1147 return pcr->ops->get_ocpstat(pcr, val); in rtsx_pci_get_ocpstat()
1149 return rtsx_pci_read_register(pcr, REG_OCPSTAT, val); in rtsx_pci_get_ocpstat()
1152 void rtsx_pci_clear_ocpstat(struct rtsx_pcr *pcr) in rtsx_pci_clear_ocpstat() argument
1154 if (pcr->ops->clear_ocpstat) { in rtsx_pci_clear_ocpstat()
1155 pcr->ops->clear_ocpstat(pcr); in rtsx_pci_clear_ocpstat()
1160 rtsx_pci_write_register(pcr, REG_OCPCTL, mask, val); in rtsx_pci_clear_ocpstat()
1162 rtsx_pci_write_register(pcr, REG_OCPCTL, mask, 0); in rtsx_pci_clear_ocpstat()
1166 void rtsx_pci_enable_oobs_polling(struct rtsx_pcr *pcr) in rtsx_pci_enable_oobs_polling() argument
1170 if ((PCI_PID(pcr) != PID_525A) && in rtsx_pci_enable_oobs_polling()
1171 (PCI_PID(pcr) != PID_5260) && in rtsx_pci_enable_oobs_polling()
1172 (PCI_PID(pcr) != PID_5264)) { in rtsx_pci_enable_oobs_polling()
1173 rtsx_pci_read_phy_register(pcr, 0x01, &val); in rtsx_pci_enable_oobs_polling()
1175 rtsx_pci_write_phy_register(pcr, 0x01, val); in rtsx_pci_enable_oobs_polling()
1177 rtsx_pci_write_register(pcr, REG_CFG_OOBS_OFF_TIMER, 0xFF, 0x32); in rtsx_pci_enable_oobs_polling()
1178 rtsx_pci_write_register(pcr, REG_CFG_OOBS_ON_TIMER, 0xFF, 0x05); in rtsx_pci_enable_oobs_polling()
1179 rtsx_pci_write_register(pcr, REG_CFG_VCM_ON_TIMER, 0xFF, 0x83); in rtsx_pci_enable_oobs_polling()
1180 rtsx_pci_write_register(pcr, REG_CFG_OOBS_POLLING, 0xFF, 0xDE); in rtsx_pci_enable_oobs_polling()
1184 void rtsx_pci_disable_oobs_polling(struct rtsx_pcr *pcr) in rtsx_pci_disable_oobs_polling() argument
1188 if ((PCI_PID(pcr) != PID_525A) && in rtsx_pci_disable_oobs_polling()
1189 (PCI_PID(pcr) != PID_5260) && in rtsx_pci_disable_oobs_polling()
1190 (PCI_PID(pcr) != PID_5264)) { in rtsx_pci_disable_oobs_polling()
1191 rtsx_pci_read_phy_register(pcr, 0x01, &val); in rtsx_pci_disable_oobs_polling()
1193 rtsx_pci_write_phy_register(pcr, 0x01, val); in rtsx_pci_disable_oobs_polling()
1195 rtsx_pci_write_register(pcr, REG_CFG_VCM_ON_TIMER, 0xFF, 0x03); in rtsx_pci_disable_oobs_polling()
1196 rtsx_pci_write_register(pcr, REG_CFG_OOBS_POLLING, 0xFF, 0x00); in rtsx_pci_disable_oobs_polling()
1200 int rtsx_sd_power_off_card3v3(struct rtsx_pcr *pcr) in rtsx_sd_power_off_card3v3() argument
1202 rtsx_pci_write_register(pcr, CARD_CLK_EN, SD_CLK_EN | in rtsx_sd_power_off_card3v3()
1204 rtsx_pci_write_register(pcr, CARD_OE, SD_OUTPUT_EN, 0); in rtsx_sd_power_off_card3v3()
1205 rtsx_pci_card_power_off(pcr, RTSX_SD_CARD); in rtsx_sd_power_off_card3v3()
1209 rtsx_pci_card_pull_ctl_disable(pcr, RTSX_SD_CARD); in rtsx_sd_power_off_card3v3()
1214 int rtsx_ms_power_off_card3v3(struct rtsx_pcr *pcr) in rtsx_ms_power_off_card3v3() argument
1216 rtsx_pci_write_register(pcr, CARD_CLK_EN, SD_CLK_EN | in rtsx_ms_power_off_card3v3()
1219 rtsx_pci_card_pull_ctl_disable(pcr, RTSX_MS_CARD); in rtsx_ms_power_off_card3v3()
1221 rtsx_pci_write_register(pcr, CARD_OE, MS_OUTPUT_EN, 0); in rtsx_ms_power_off_card3v3()
1222 rtsx_pci_card_power_off(pcr, RTSX_MS_CARD); in rtsx_ms_power_off_card3v3()
1227 static int rtsx_pci_init_hw(struct rtsx_pcr *pcr) in rtsx_pci_init_hw() argument
1229 struct pci_dev *pdev = pcr->pci; in rtsx_pci_init_hw()
1232 if (PCI_PID(pcr) == PID_5228) in rtsx_pci_init_hw()
1233 rtsx_pci_write_register(pcr, RTS5228_LDO1_CFG1, RTS5228_LDO1_SR_TIME_MASK, in rtsx_pci_init_hw()
1236 rtsx_pci_writel(pcr, RTSX_HCBAR, pcr->host_cmds_addr); in rtsx_pci_init_hw()
1238 rtsx_pci_enable_bus_int(pcr); in rtsx_pci_init_hw()
1241 if ((PCI_PID(pcr) == PID_5261) || (PCI_PID(pcr) == PID_5264)) { in rtsx_pci_init_hw()
1243 err = rtsx_pci_write_register(pcr, RTS5261_FW_CFG1, in rtsx_pci_init_hw()
1245 err = rtsx_pci_write_register(pcr, RTS5261_REG_FPDCTL, in rtsx_pci_init_hw()
1248 err = rtsx_pci_write_register(pcr, FPDCTL, SSC_POWER_DOWN, 0); in rtsx_pci_init_hw()
1256 rtsx_disable_aspm(pcr); in rtsx_pci_init_hw()
1257 if (pcr->ops->optimize_phy) { in rtsx_pci_init_hw()
1258 err = pcr->ops->optimize_phy(pcr); in rtsx_pci_init_hw()
1263 rtsx_pci_init_cmd(pcr); in rtsx_pci_init_hw()
1266 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CLK_DIV, 0x07, 0x07); in rtsx_pci_init_hw()
1268 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, HOST_SLEEP_STATE, 0x03, 0x00); in rtsx_pci_init_hw()
1270 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_CLK_EN, 0x1E, 0); in rtsx_pci_init_hw()
1272 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CHANGE_LINK_STATE, 0x0A, 0); in rtsx_pci_init_hw()
1274 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_DRIVE_SEL, in rtsx_pci_init_hw()
1275 0xFF, pcr->card_drive_sel); in rtsx_pci_init_hw()
1277 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SSC_CTL1, in rtsx_pci_init_hw()
1279 if (PCI_PID(pcr) == PID_5261) in rtsx_pci_init_hw()
1280 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SSC_CTL2, 0xFF, in rtsx_pci_init_hw()
1282 else if (PCI_PID(pcr) == PID_5228) in rtsx_pci_init_hw()
1283 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SSC_CTL2, 0xFF, in rtsx_pci_init_hw()
1285 else if (is_version(pcr, 0x5264, IC_VER_A)) in rtsx_pci_init_hw()
1286 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SSC_CTL1, SSC_RSTB, 0); in rtsx_pci_init_hw()
1287 else if (PCI_PID(pcr) == PID_5264) in rtsx_pci_init_hw()
1288 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SSC_CTL2, 0xFF, in rtsx_pci_init_hw()
1291 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SSC_CTL2, 0xFF, 0x12); in rtsx_pci_init_hw()
1294 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CHANGE_LINK_STATE, 0x16, 0x10); in rtsx_pci_init_hw()
1296 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, IRQSTAT0, in rtsx_pci_init_hw()
1301 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PERST_GLITCH_WIDTH, 0xFF, 0x80); in rtsx_pci_init_hw()
1306 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, RCCTL, 0x01, 0x00); in rtsx_pci_init_hw()
1312 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, NFTS_TX_CTRL, 0x02, 0); in rtsx_pci_init_hw()
1314 err = rtsx_pci_send_cmd(pcr, 100); in rtsx_pci_init_hw()
1318 switch (PCI_PID(pcr)) { in rtsx_pci_init_hw()
1326 rtsx_pci_write_register(pcr, PM_CLK_FORCE_CTL, 1, 1); in rtsx_pci_init_hw()
1333 rtsx_pci_init_ocp(pcr); in rtsx_pci_init_hw()
1336 pcie_capability_clear_and_set_word(pcr->pci, PCI_EXP_LNKCTL, in rtsx_pci_init_hw()
1341 if (pcr->ops->extra_init_hw) { in rtsx_pci_init_hw()
1342 err = pcr->ops->extra_init_hw(pcr); in rtsx_pci_init_hw()
1347 if (pcr->aspm_mode == ASPM_MODE_REG) in rtsx_pci_init_hw()
1348 rtsx_pci_write_register(pcr, ASPM_FORCE_CTL, 0x30, 0x30); in rtsx_pci_init_hw()
1351 * So we need to initialize pcr->card_exist here. in rtsx_pci_init_hw()
1353 if (pcr->ops->cd_deglitch) in rtsx_pci_init_hw()
1354 pcr->card_exist = pcr->ops->cd_deglitch(pcr); in rtsx_pci_init_hw()
1356 pcr->card_exist = rtsx_pci_readl(pcr, RTSX_BIPR) & CARD_EXIST; in rtsx_pci_init_hw()
1361 static int rtsx_pci_init_chip(struct rtsx_pcr *pcr) in rtsx_pci_init_chip() argument
1363 struct rtsx_cr_option *option = &(pcr->option); in rtsx_pci_init_chip()
1369 spin_lock_init(&pcr->lock); in rtsx_pci_init_chip()
1370 mutex_init(&pcr->pcr_mutex); in rtsx_pci_init_chip()
1372 switch (PCI_PID(pcr)) { in rtsx_pci_init_chip()
1375 rts5209_init_params(pcr); in rtsx_pci_init_chip()
1379 rts5229_init_params(pcr); in rtsx_pci_init_chip()
1383 rtl8411_init_params(pcr); in rtsx_pci_init_chip()
1387 rts5227_init_params(pcr); in rtsx_pci_init_chip()
1391 rts522a_init_params(pcr); in rtsx_pci_init_chip()
1395 rts5249_init_params(pcr); in rtsx_pci_init_chip()
1399 rts524a_init_params(pcr); in rtsx_pci_init_chip()
1403 rts525a_init_params(pcr); in rtsx_pci_init_chip()
1407 rtl8411b_init_params(pcr); in rtsx_pci_init_chip()
1411 rtl8402_init_params(pcr); in rtsx_pci_init_chip()
1415 rts5260_init_params(pcr); in rtsx_pci_init_chip()
1419 rts5261_init_params(pcr); in rtsx_pci_init_chip()
1423 rts5228_init_params(pcr); in rtsx_pci_init_chip()
1427 rts5264_init_params(pcr); in rtsx_pci_init_chip()
1431 pcr_dbg(pcr, "PID: 0x%04x, IC version: 0x%02x\n", in rtsx_pci_init_chip()
1432 PCI_PID(pcr), pcr->ic_version); in rtsx_pci_init_chip()
1434 pcr->slots = kcalloc(pcr->num_slots, sizeof(struct rtsx_slot), in rtsx_pci_init_chip()
1436 if (!pcr->slots) in rtsx_pci_init_chip()
1439 if (pcr->aspm_mode == ASPM_MODE_CFG) { in rtsx_pci_init_chip()
1440 pcie_capability_read_word(pcr->pci, PCI_EXP_LNKCTL, &cfg_val); in rtsx_pci_init_chip()
1442 pcr->aspm_enabled = true; in rtsx_pci_init_chip()
1444 pcr->aspm_enabled = false; in rtsx_pci_init_chip()
1446 } else if (pcr->aspm_mode == ASPM_MODE_REG) { in rtsx_pci_init_chip()
1447 rtsx_pci_read_register(pcr, ASPM_FORCE_CTL, &val); in rtsx_pci_init_chip()
1449 pcr->aspm_enabled = false; in rtsx_pci_init_chip()
1451 pcr->aspm_enabled = true; in rtsx_pci_init_chip()
1454 l1ss = pci_find_ext_capability(pcr->pci, PCI_EXT_CAP_ID_L1SS); in rtsx_pci_init_chip()
1456 pci_read_config_dword(pcr->pci, l1ss + PCI_L1SS_CTL1, &lval); in rtsx_pci_init_chip()
1459 rtsx_set_dev_flag(pcr, ASPM_L1_1_EN); in rtsx_pci_init_chip()
1461 rtsx_clear_dev_flag(pcr, ASPM_L1_1_EN); in rtsx_pci_init_chip()
1464 rtsx_set_dev_flag(pcr, ASPM_L1_2_EN); in rtsx_pci_init_chip()
1466 rtsx_clear_dev_flag(pcr, ASPM_L1_2_EN); in rtsx_pci_init_chip()
1469 rtsx_set_dev_flag(pcr, PM_L1_1_EN); in rtsx_pci_init_chip()
1471 rtsx_clear_dev_flag(pcr, PM_L1_1_EN); in rtsx_pci_init_chip()
1474 rtsx_set_dev_flag(pcr, PM_L1_2_EN); in rtsx_pci_init_chip()
1476 rtsx_clear_dev_flag(pcr, PM_L1_2_EN); in rtsx_pci_init_chip()
1478 pcie_capability_read_word(pcr->pci, PCI_EXP_DEVCTL2, &cfg_val); in rtsx_pci_init_chip()
1486 if (rtsx_check_dev_flag(pcr, ASPM_L1_1_EN | ASPM_L1_2_EN in rtsx_pci_init_chip()
1496 if (pcr->ops->fetch_vendor_settings) in rtsx_pci_init_chip()
1497 pcr->ops->fetch_vendor_settings(pcr); in rtsx_pci_init_chip()
1499 pcr_dbg(pcr, "pcr->aspm_en = 0x%x\n", pcr->aspm_en); in rtsx_pci_init_chip()
1500 pcr_dbg(pcr, "pcr->sd30_drive_sel_1v8 = 0x%x\n", in rtsx_pci_init_chip()
1501 pcr->sd30_drive_sel_1v8); in rtsx_pci_init_chip()
1502 pcr_dbg(pcr, "pcr->sd30_drive_sel_3v3 = 0x%x\n", in rtsx_pci_init_chip()
1503 pcr->sd30_drive_sel_3v3); in rtsx_pci_init_chip()
1504 pcr_dbg(pcr, "pcr->card_drive_sel = 0x%x\n", in rtsx_pci_init_chip()
1505 pcr->card_drive_sel); in rtsx_pci_init_chip()
1506 pcr_dbg(pcr, "pcr->flags = 0x%x\n", pcr->flags); in rtsx_pci_init_chip()
1508 pcr->state = PDEV_STAT_IDLE; in rtsx_pci_init_chip()
1509 err = rtsx_pci_init_hw(pcr); in rtsx_pci_init_chip()
1511 kfree(pcr->slots); in rtsx_pci_init_chip()
1521 struct rtsx_pcr *pcr; in rtsx_pci_probe() local
1543 pcr = kzalloc(sizeof(*pcr), GFP_KERNEL); in rtsx_pci_probe()
1544 if (!pcr) { in rtsx_pci_probe()
1554 handle->pcr = pcr; in rtsx_pci_probe()
1558 ret = idr_alloc(&rtsx_pci_idr, pcr, 0, 0, GFP_NOWAIT); in rtsx_pci_probe()
1560 pcr->id = ret; in rtsx_pci_probe()
1566 pcr->pci = pcidev; in rtsx_pci_probe()
1569 if ((CHK_PCI_PID(pcr, 0x525A)) || (CHK_PCI_PID(pcr, 0x5264))) in rtsx_pci_probe()
1573 pcr->remap_addr = ioremap(base, len); in rtsx_pci_probe()
1574 if (!pcr->remap_addr) { in rtsx_pci_probe()
1579 pcr->rtsx_resv_buf = dma_alloc_coherent(&(pcidev->dev), in rtsx_pci_probe()
1580 RTSX_RESV_BUF_LEN, &(pcr->rtsx_resv_buf_addr), in rtsx_pci_probe()
1582 if (pcr->rtsx_resv_buf == NULL) { in rtsx_pci_probe()
1586 pcr->host_cmds_ptr = pcr->rtsx_resv_buf; in rtsx_pci_probe()
1587 pcr->host_cmds_addr = pcr->rtsx_resv_buf_addr; in rtsx_pci_probe()
1588 pcr->host_sg_tbl_ptr = pcr->rtsx_resv_buf + HOST_CMDS_BUF_LEN; in rtsx_pci_probe()
1589 pcr->host_sg_tbl_addr = pcr->rtsx_resv_buf_addr + HOST_CMDS_BUF_LEN; in rtsx_pci_probe()
1590 pcr->card_inserted = 0; in rtsx_pci_probe()
1591 pcr->card_removed = 0; in rtsx_pci_probe()
1592 INIT_DELAYED_WORK(&pcr->carddet_work, rtsx_pci_card_detect); in rtsx_pci_probe()
1594 pcr->msi_en = msi_en; in rtsx_pci_probe()
1595 if (pcr->msi_en) { in rtsx_pci_probe()
1598 pcr->msi_en = false; in rtsx_pci_probe()
1601 ret = rtsx_pci_acquire_irq(pcr); in rtsx_pci_probe()
1606 synchronize_irq(pcr->irq); in rtsx_pci_probe()
1608 ret = rtsx_pci_init_chip(pcr); in rtsx_pci_probe()
1618 ret = mfd_add_devices(&pcidev->dev, pcr->id, rtsx_pcr_cells, in rtsx_pci_probe()
1629 kfree(pcr->slots); in rtsx_pci_probe()
1631 free_irq(pcr->irq, (void *)pcr); in rtsx_pci_probe()
1633 if (pcr->msi_en) in rtsx_pci_probe()
1634 pci_disable_msi(pcr->pci); in rtsx_pci_probe()
1635 dma_free_coherent(&(pcr->pci->dev), RTSX_RESV_BUF_LEN, in rtsx_pci_probe()
1636 pcr->rtsx_resv_buf, pcr->rtsx_resv_buf_addr); in rtsx_pci_probe()
1638 iounmap(pcr->remap_addr); in rtsx_pci_probe()
1641 idr_remove(&rtsx_pci_idr, pcr->id); in rtsx_pci_probe()
1646 kfree(pcr); in rtsx_pci_probe()
1658 struct rtsx_pcr *pcr = handle->pcr; in rtsx_pci_remove() local
1660 pcr->remove_pci = true; in rtsx_pci_remove()
1665 /* Disable interrupts at the pcr level */ in rtsx_pci_remove()
1666 spin_lock_irq(&pcr->lock); in rtsx_pci_remove()
1667 rtsx_pci_writel(pcr, RTSX_BIER, 0); in rtsx_pci_remove()
1668 pcr->bier = 0; in rtsx_pci_remove()
1669 spin_unlock_irq(&pcr->lock); in rtsx_pci_remove()
1671 cancel_delayed_work_sync(&pcr->carddet_work); in rtsx_pci_remove()
1675 dma_free_coherent(&(pcr->pci->dev), RTSX_RESV_BUF_LEN, in rtsx_pci_remove()
1676 pcr->rtsx_resv_buf, pcr->rtsx_resv_buf_addr); in rtsx_pci_remove()
1677 free_irq(pcr->irq, (void *)pcr); in rtsx_pci_remove()
1678 if (pcr->msi_en) in rtsx_pci_remove()
1679 pci_disable_msi(pcr->pci); in rtsx_pci_remove()
1680 iounmap(pcr->remap_addr); in rtsx_pci_remove()
1686 idr_remove(&rtsx_pci_idr, pcr->id); in rtsx_pci_remove()
1689 kfree(pcr->slots); in rtsx_pci_remove()
1690 kfree(pcr); in rtsx_pci_remove()
1702 struct rtsx_pcr *pcr = handle->pcr; in rtsx_pci_suspend() local
1706 cancel_delayed_work_sync(&pcr->carddet_work); in rtsx_pci_suspend()
1708 mutex_lock(&pcr->pcr_mutex); in rtsx_pci_suspend()
1710 rtsx_pci_power_off(pcr, HOST_ENTER_S3, false); in rtsx_pci_suspend()
1712 mutex_unlock(&pcr->pcr_mutex); in rtsx_pci_suspend()
1720 struct rtsx_pcr *pcr = handle->pcr; in rtsx_pci_resume() local
1725 mutex_lock(&pcr->pcr_mutex); in rtsx_pci_resume()
1727 ret = rtsx_pci_write_register(pcr, HOST_SLEEP_STATE, 0x03, 0x00); in rtsx_pci_resume()
1731 ret = rtsx_pci_init_hw(pcr); in rtsx_pci_resume()
1736 mutex_unlock(&pcr->pcr_mutex); in rtsx_pci_resume()
1742 static void rtsx_enable_aspm(struct rtsx_pcr *pcr) in rtsx_enable_aspm() argument
1744 if (pcr->ops->set_aspm) in rtsx_enable_aspm()
1745 pcr->ops->set_aspm(pcr, true); in rtsx_enable_aspm()
1747 rtsx_comm_set_aspm(pcr, true); in rtsx_enable_aspm()
1750 static void rtsx_comm_pm_power_saving(struct rtsx_pcr *pcr) in rtsx_comm_pm_power_saving() argument
1752 struct rtsx_cr_option *option = &pcr->option; in rtsx_comm_pm_power_saving()
1757 if (rtsx_check_dev_flag(pcr, L1_SNOOZE_TEST_EN)) in rtsx_comm_pm_power_saving()
1760 rtsx_set_ltr_latency(pcr, latency); in rtsx_comm_pm_power_saving()
1763 if (rtsx_check_dev_flag(pcr, LTR_L1SS_PWR_GATE_EN)) in rtsx_comm_pm_power_saving()
1764 rtsx_set_l1off_sub_cfg_d0(pcr, 0); in rtsx_comm_pm_power_saving()
1766 rtsx_enable_aspm(pcr); in rtsx_comm_pm_power_saving()
1769 static void rtsx_pm_power_saving(struct rtsx_pcr *pcr) in rtsx_pm_power_saving() argument
1771 rtsx_comm_pm_power_saving(pcr); in rtsx_pm_power_saving()
1777 struct rtsx_pcr *pcr = handle->pcr; in rtsx_pci_shutdown() local
1781 rtsx_pci_power_off(pcr, HOST_ENTER_S1, false); in rtsx_pci_shutdown()
1784 free_irq(pcr->irq, (void *)pcr); in rtsx_pci_shutdown()
1785 if (pcr->msi_en) in rtsx_pci_shutdown()
1786 pci_disable_msi(pcr->pci); in rtsx_pci_shutdown()
1793 struct rtsx_pcr *pcr = handle->pcr; in rtsx_pci_runtime_idle() local
1797 mutex_lock(&pcr->pcr_mutex); in rtsx_pci_runtime_idle()
1799 pcr->state = PDEV_STAT_IDLE; in rtsx_pci_runtime_idle()
1801 if (pcr->ops->disable_auto_blink) in rtsx_pci_runtime_idle()
1802 pcr->ops->disable_auto_blink(pcr); in rtsx_pci_runtime_idle()
1803 if (pcr->ops->turn_off_led) in rtsx_pci_runtime_idle()
1804 pcr->ops->turn_off_led(pcr); in rtsx_pci_runtime_idle()
1806 rtsx_pm_power_saving(pcr); in rtsx_pci_runtime_idle()
1808 mutex_unlock(&pcr->pcr_mutex); in rtsx_pci_runtime_idle()
1810 if (pcr->rtd3_en) in rtsx_pci_runtime_idle()
1820 struct rtsx_pcr *pcr = handle->pcr; in rtsx_pci_runtime_suspend() local
1824 cancel_delayed_work_sync(&pcr->carddet_work); in rtsx_pci_runtime_suspend()
1826 mutex_lock(&pcr->pcr_mutex); in rtsx_pci_runtime_suspend()
1827 rtsx_pci_power_off(pcr, HOST_ENTER_S3, true); in rtsx_pci_runtime_suspend()
1829 mutex_unlock(&pcr->pcr_mutex); in rtsx_pci_runtime_suspend()
1838 struct rtsx_pcr *pcr = handle->pcr; in rtsx_pci_runtime_resume() local
1842 mutex_lock(&pcr->pcr_mutex); in rtsx_pci_runtime_resume()
1844 rtsx_pci_write_register(pcr, HOST_SLEEP_STATE, 0x03, 0x00); in rtsx_pci_runtime_resume()
1846 rtsx_pci_init_hw(pcr); in rtsx_pci_runtime_resume()
1848 if (pcr->slots[RTSX_SD_CARD].p_dev != NULL) { in rtsx_pci_runtime_resume()
1849 pcr->slots[RTSX_SD_CARD].card_event( in rtsx_pci_runtime_resume()
1850 pcr->slots[RTSX_SD_CARD].p_dev); in rtsx_pci_runtime_resume()
1853 mutex_unlock(&pcr->pcr_mutex); in rtsx_pci_runtime_resume()