Lines Matching defs:sdhci_host
428 struct sdhci_host { struct
430 const char *hw_name; /* Hardware bus name */
432 unsigned int quirks; /* Deviations from spec. */
493 unsigned int quirks2; /* More deviations from spec. */
540 int irq; /* Device IRQ */
541 void __iomem *ioaddr; /* Mapped address */
542 phys_addr_t mapbase; /* physical address base */
543 char *bounce_buffer; /* For packing SDMA reads/writes */
544 dma_addr_t bounce_addr;
545 unsigned int bounce_buffer_size;
547 const struct sdhci_ops *ops; /* Low level hw interface */
550 struct mmc_host *mmc; /* MMC structure */
551 struct mmc_host_ops mmc_host_ops; /* MMC host ops */
552 u64 dma_mask; /* custom DMA mask */
555 struct led_classdev led; /* LED control */
556 char led_name[32];
559 spinlock_t lock; /* Mutex */
561 int flags; /* Host attributes */
576 unsigned int version; /* SDHCI spec. version */
578 unsigned int max_clk; /* Max possible freq (MHz) */
579 unsigned int timeout_clk; /* Timeout freq (KHz) */
580 u8 max_timeout_count; /* Vendor specific max timeout count */
581 unsigned int clk_mul; /* Clock Muliplier value */
583 unsigned int clock; /* Current clock (MHz) */
584 u8 pwr; /* Current voltage */
585 u8 drv_type; /* Current UHS-I driver type */
586 bool reinit_uhs; /* Force UHS-related re-initialization */
588 bool runtime_suspended; /* Host is runtime suspended */
589 bool bus_on; /* Bus power prevents runtime suspend */
590 bool preset_enabled; /* Preset is enabled */
591 bool pending_reset; /* Cmd/data reset is pending */
592 bool irq_wake_enabled; /* IRQ wakeup is enabled */
593 bool v4_mode; /* Host Version 4 Enable */
594 bool use_external_dma; /* Host selects to use external DMA */
595 bool always_defer_done; /* Always defer to complete requests */
597 struct mmc_request *mrqs_done[SDHCI_MAX_MRQS]; /* Requests done */
598 struct mmc_command *cmd; /* Current command */
599 struct mmc_command *data_cmd; /* Current data command */
600 struct mmc_command *deferred_cmd; /* Deferred command */
601 struct mmc_data *data; /* Current data request */
602 unsigned int data_early:1; /* Data finished before cmd */
604 struct sg_mapping_iter sg_miter; /* SG state for PIO */
605 unsigned int blocks; /* remaining PIO blocks */
607 int sg_count; /* Mapped sg entries */
608 int max_adma; /* Max. length in ADMA descriptor */
610 void *adma_table; /* ADMA descriptor table */
611 void *align_buffer; /* Bounce buffer */
613 size_t adma_table_sz; /* ADMA descriptor table size */
614 size_t align_buffer_sz; /* Bounce buffer size */
616 dma_addr_t adma_addr; /* Mapped ADMA descr. table */
617 dma_addr_t align_addr; /* Mapped bounce buffer */
619 unsigned int desc_sz; /* ADMA current descriptor size */
620 unsigned int alloc_desc_sz; /* ADMA descr. max size host supports */
622 struct workqueue_struct *complete_wq; /* Request completion wq */
623 struct work_struct complete_work; /* Request completion work */
625 struct timer_list timer; /* Timer for timeouts */
626 struct timer_list data_timer; /* Timer for data timeouts */
628 void (*complete_work_fn)(struct work_struct *work);
629 irqreturn_t (*thread_irq_fn)(int irq, void *dev_id);
632 struct dma_chan *rx_chan;
633 struct dma_chan *tx_chan;
636 u32 caps; /* CAPABILITY_0 */
637 u32 caps1; /* CAPABILITY_1 */
638 bool read_caps; /* Capability flags have been read */
640 bool sdhci_core_to_disable_vqmmc; /* sdhci core can disable vqmmc */
641 unsigned int ocr_avail_sdio; /* OCR bit masks */
642 unsigned int ocr_avail_sd;
643 unsigned int ocr_avail_mmc;
644 u32 ocr_mask; /* available voltages */
646 unsigned timing; /* Current timing */
648 u32 thread_isr;
651 u32 ier;
653 bool cqe_on; /* CQE is operating */
654 u32 cqe_ier; /* CQE interrupt mask */
655 u32 cqe_err_ier; /* CQE error interrupt mask */
657 wait_queue_head_t buf_ready_int; /* Waitqueue for Buffer Read Ready interrupt */
658 unsigned int tuning_done; /* Condition flag set when CMD19 succeeds */
683 u32 (*read_l)(struct sdhci_host *host, int reg); argument