2352 	const struct nand_sdr_timings *sdr;  in cadence_nand_setup_interface()  local
2373 	sdr = nand_get_sdr_timings(conf);  in cadence_nand_setup_interface()
2374 	if (IS_ERR(sdr))  in cadence_nand_setup_interface()
2375 		return PTR_ERR(sdr);  in cadence_nand_setup_interface()
2387 	tdvw_min = sdr->tREA_max + board_delay_skew_max;  in cadence_nand_setup_interface()
2393 	 * for SDR timing modes 1, 2, 3, 4 and 5.  in cadence_nand_setup_interface()
2394 	 * If clk_period is 20ns the condition is met only for SDR timing  in cadence_nand_setup_interface()
2397 	if (sdr->tRC_min <= clk_period &&  in cadence_nand_setup_interface()
2398 	    sdr->tRP_min <= (clk_period / 2) &&  in cadence_nand_setup_interface()
2399 	    sdr->tREH_min <= (clk_period / 2)) {  in cadence_nand_setup_interface()
2402 		tdvw = calc_tdvw(trp_cnt, clk_period, sdr->tRHOH_min,  in cadence_nand_setup_interface()
2403 				 sdr->tREA_max, ext_rd_mode);  in cadence_nand_setup_interface()
2404 		tdvw_max = calc_tdvw_max(trp_cnt, clk_period, sdr->tRHOH_min,  in cadence_nand_setup_interface()
2427 			trp_cnt = (sdr->tREA_max + board_delay_skew_max  in cadence_nand_setup_interface()
2437 		trp_cnt = calc_cycl(sdr->tRP_min, clk_period);  in cadence_nand_setup_interface()
2438 		trh = sdr->tRC_min - ((trp_cnt + 1) * clk_period);  in cadence_nand_setup_interface()
2439 		if (sdr->tREH_min >= trh)  in cadence_nand_setup_interface()
2440 			trh_cnt = calc_cycl(sdr->tREH_min, clk_period);  in cadence_nand_setup_interface()
2444 		tdvw = calc_tdvw(trp_cnt, clk_period, sdr->tRHOH_min,  in cadence_nand_setup_interface()
2445 				 sdr->tREA_max, ext_rd_mode);  in cadence_nand_setup_interface()
2453 						 sdr->tRHOH_min,  in cadence_nand_setup_interface()
2477 			trp_cnt = (sdr->tREA_max + board_delay_skew_max  in cadence_nand_setup_interface()
2483 				 sdr->tRHOH_min,  in cadence_nand_setup_interface()
2486 	if (sdr->tWC_min <= clk_period &&  in cadence_nand_setup_interface()
2487 	    (sdr->tWP_min + if_skew) <= (clk_period / 2) &&  in cadence_nand_setup_interface()
2488 	    (sdr->tWH_min + if_skew) <= (clk_period / 2)) {  in cadence_nand_setup_interface()
2494 		twp_cnt = calc_cycl(sdr->tWP_min + if_skew, clk_period);  in cadence_nand_setup_interface()
2495 		if ((twp_cnt + 1) * clk_period < (sdr->tALS_min + if_skew))  in cadence_nand_setup_interface()
2496 			twp_cnt = calc_cycl(sdr->tALS_min + if_skew,  in cadence_nand_setup_interface()
2499 		twh = (sdr->tWC_min - (twp_cnt + 1) * clk_period);  in cadence_nand_setup_interface()
2500 		if (sdr->tWH_min >= twh)  in cadence_nand_setup_interface()
2501 			twh = sdr->tWH_min;  in cadence_nand_setup_interface()
2513 	tadl_cnt = calc_cycl((sdr->tADL_min + if_skew), clk_period);  in cadence_nand_setup_interface()
2514 	tccs_cnt = calc_cycl((sdr->tCCS_min + if_skew), clk_period);  in cadence_nand_setup_interface()
2515 	twhr_cnt = calc_cycl((sdr->tWHR_min + if_skew), clk_period);  in cadence_nand_setup_interface()
2516 	trhw_cnt = calc_cycl((sdr->tRHW_min + if_skew), clk_period);  in cadence_nand_setup_interface()
2534 	trhz_cnt = calc_cycl(sdr->tRHZ_max, clk_period);  in cadence_nand_setup_interface()
2536 	twb_cnt = calc_cycl((sdr->tWB_max + board_delay), clk_period);  in cadence_nand_setup_interface()
2554 	tfeat_cnt = calc_cycl(sdr->tFEAT_max, clk_period);  in cadence_nand_setup_interface()
2558 	tceh_cnt = calc_cycl(sdr->tCEH_min, clk_period);  in cadence_nand_setup_interface()
2559 	tcs_cnt = calc_cycl((sdr->tCS_min + if_skew), clk_period);  in cadence_nand_setup_interface()