Lines Matching full:sparx5
2 /* Microchip Sparx5 Switch driver
6 * The Sparx5 Chip Register Model can be browsed at this location:
215 bool is_sparx5(struct sparx5 *sparx5) in is_sparx5() argument
217 switch (sparx5->target_ct) { in is_sparx5()
234 static void sparx5_init_features(struct sparx5 *sparx5) in sparx5_init_features() argument
236 switch (sparx5->target_ct) { in sparx5_init_features()
256 sparx5->features = (SPX5_FEATURE_PSFP | SPX5_FEATURE_PTP); in sparx5_init_features()
263 bool sparx5_has_feature(struct sparx5 *sparx5, enum sparx5_feature feature) in sparx5_has_feature() argument
265 return sparx5->features & feature; in sparx5_has_feature()
268 static int sparx5_create_targets(struct sparx5 *sparx5) in sparx5_create_targets() argument
270 const struct sparx5_main_io_resource *iomap = sparx5->data->iomap; in sparx5_create_targets()
271 int iomap_size = sparx5->data->iomap_size; in sparx5_create_targets()
272 int ioranges = sparx5->data->ioranges; in sparx5_create_targets()
288 iores[idx] = platform_get_resource(sparx5->pdev, IORESOURCE_MEM, in sparx5_create_targets()
291 dev_err(sparx5->dev, "Invalid resource\n"); in sparx5_create_targets()
294 iomem[idx] = devm_ioremap(sparx5->dev, in sparx5_create_targets()
298 dev_err(sparx5->dev, "Unable to get switch registers: %s\n", in sparx5_create_targets()
307 sparx5->regs[io->id] = begin[io->range] + io->offset; in sparx5_create_targets()
312 static int sparx5_create_port(struct sparx5 *sparx5, in sparx5_create_port() argument
321 ops = sparx5->data->ops; in sparx5_create_port()
323 ndev = sparx5_create_netdev(sparx5, config->portno); in sparx5_create_port()
325 dev_err(sparx5->dev, "Could not create net device: %02u\n", in sparx5_create_port()
344 sparx5->ports[config->portno] = spx5_port; in sparx5_create_port()
346 err = sparx5_port_init(sparx5, spx5_port, &config->conf); in sparx5_create_port()
348 dev_err(sparx5->dev, "port init failed\n"); in sparx5_create_port()
354 sparx5_vlan_port_setup(sparx5, spx5_port->portno); in sparx5_create_port()
402 static int sparx5_init_ram(struct sparx5 *s5) in sparx5_init_ram()
446 static int sparx5_init_switchcore(struct sparx5 *sparx5) in sparx5_init_switchcore() argument
453 sparx5, in sparx5_init_switchcore()
458 sparx5, in sparx5_init_switchcore()
462 value = spx5_rd(sparx5, HSCH_RESET_CFG); in sparx5_init_switchcore()
464 err = sparx5_init_ram(sparx5); in sparx5_init_switchcore()
470 spx5_wr(ANA_AC_STAT_RESET_RESET_SET(1), sparx5, ANA_AC_STAT_RESET); in sparx5_init_switchcore()
471 spx5_wr(ASM_STAT_CFG_STAT_CNT_CLR_SHOT_SET(1), sparx5, ASM_STAT_CFG); in sparx5_init_switchcore()
474 spx5_wr(HSCH_RESET_CFG_CORE_ENA_SET(1), sparx5, HSCH_RESET_CFG); in sparx5_init_switchcore()
479 static int sparx5_init_coreclock(struct sparx5 *sparx5) in sparx5_init_coreclock() argument
481 enum sparx5_core_clockfreq freq = sparx5->coreclock; in sparx5_init_coreclock()
488 switch (sparx5->target_ct) { in sparx5_init_coreclock()
490 if (sparx5->coreclock == SPX5_CORE_CLOCK_DEFAULT) in sparx5_init_coreclock()
492 else if (sparx5->coreclock != SPX5_CORE_CLOCK_250MHZ) in sparx5_init_coreclock()
498 if (sparx5->coreclock == SPX5_CORE_CLOCK_DEFAULT) in sparx5_init_coreclock()
500 else if (sparx5->coreclock != SPX5_CORE_CLOCK_500MHZ) in sparx5_init_coreclock()
505 if (sparx5->coreclock == SPX5_CORE_CLOCK_DEFAULT) in sparx5_init_coreclock()
507 else if (sparx5->coreclock != SPX5_CORE_CLOCK_625MHZ) in sparx5_init_coreclock()
511 if (sparx5->coreclock == SPX5_CORE_CLOCK_DEFAULT) in sparx5_init_coreclock()
517 if (sparx5->coreclock == SPX5_CORE_CLOCK_DEFAULT) in sparx5_init_coreclock()
519 else if (sparx5->coreclock == SPX5_CORE_CLOCK_250MHZ) in sparx5_init_coreclock()
537 dev_err(sparx5->dev, "Target (%#04x) not supported\n", in sparx5_init_coreclock()
538 sparx5->target_ct); in sparx5_init_coreclock()
542 if (is_sparx5(sparx5)) { in sparx5_init_coreclock()
557 dev_err(sparx5->dev, in sparx5_init_coreclock()
559 sparx5->coreclock, sparx5->target_ct); in sparx5_init_coreclock()
576 sparx5, CLKGEN_LCPLL1_CORE_CLK_CFG); in sparx5_init_coreclock()
582 sparx5->coreclock = freq; in sparx5_init_coreclock()
585 if (is_sparx5(sparx5)) in sparx5_init_coreclock()
588 sparx5, in sparx5_init_coreclock()
593 sparx5, in sparx5_init_coreclock()
598 sparx5, in sparx5_init_coreclock()
603 sparx5, in sparx5_init_coreclock()
606 for (idx = 0; idx < sparx5->data->consts->n_sio_clks; idx++) in sparx5_init_coreclock()
609 sparx5, in sparx5_init_coreclock()
615 sparx5, in sparx5_init_coreclock()
620 sparx5, in sparx5_init_coreclock()
626 static u32 qlim_wm(struct sparx5 *sparx5, int fraction) in qlim_wm() argument
628 return (sparx5->data->consts->buf_size / SPX5_BUFFER_CELL_SZ - 100) * in qlim_wm()
632 static int sparx5_qlim_set(struct sparx5 *sparx5) in sparx5_qlim_set() argument
634 const struct sparx5_consts *consts = sparx5->data->consts; in sparx5_qlim_set()
639 spx5_wr(0xFFF, sparx5, in sparx5_qlim_set()
645 spx5_wr(0xFFF, sparx5, in sparx5_qlim_set()
652 spx5_wr(qlim_wm(sparx5, 80), sparx5, XQS_QLIMIT_SHR_QLIM_CFG(0)); in sparx5_qlim_set()
653 spx5_wr(qlim_wm(sparx5, 90), sparx5, XQS_QLIMIT_SHR_CTOP_CFG(0)); in sparx5_qlim_set()
654 spx5_wr(qlim_wm(sparx5, 95), sparx5, XQS_QLIMIT_SHR_ATOP_CFG(0)); in sparx5_qlim_set()
655 spx5_wr(qlim_wm(sparx5, 100), sparx5, XQS_QLIMIT_SHR_TOP_CFG(0)); in sparx5_qlim_set()
663 static void sparx5_board_init(struct sparx5 *sparx5) in sparx5_board_init() argument
667 if (!sparx5->sd_sgpio_remapping) in sparx5_board_init()
673 sparx5, in sparx5_board_init()
677 for (idx = 0; idx < sparx5->data->consts->n_ports; idx++) in sparx5_board_init()
678 if (sparx5->ports[idx]) in sparx5_board_init()
679 if (sparx5->ports[idx]->conf.sd_sgpio != ~0) in sparx5_board_init()
680 spx5_wr(sparx5->ports[idx]->conf.sd_sgpio, in sparx5_board_init()
681 sparx5, in sparx5_board_init()
685 static int sparx5_start(struct sparx5 *sparx5) in sparx5_start() argument
688 const struct sparx5_consts *consts = sparx5->data->consts; in sparx5_start()
689 const struct sparx5_ops *ops = sparx5->data->ops; in sparx5_start()
696 spx5_wr(idx, sparx5, ANA_AC_OWN_UPSID(idx)); in sparx5_start()
697 spx5_wr(idx, sparx5, ANA_CL_OWN_UPSID(idx)); in sparx5_start()
698 spx5_wr(idx, sparx5, ANA_L2_OWN_UPSID(idx)); in sparx5_start()
699 spx5_wr(idx, sparx5, REW_OWN_UPSID(idx)); in sparx5_start()
706 sparx5, in sparx5_start()
710 sparx5_update_fwd(sparx5); in sparx5_start()
713 spx5_wr(ANA_AC_PGID_MISC_CFG_PGID_CPU_COPY_ENA_SET(1), sparx5, in sparx5_start()
714 ANA_AC_PGID_MISC_CFG(sparx5_get_pgid(sparx5, PGID_CPU))); in sparx5_start()
715 spx5_wr(ANA_AC_PGID_MISC_CFG_PGID_CPU_COPY_ENA_SET(1), sparx5, in sparx5_start()
716 ANA_AC_PGID_MISC_CFG(sparx5_get_pgid(sparx5, PGID_BCAST))); in sparx5_start()
719 for (idx = sparx5_get_internal_port(sparx5, SPX5_PORT_CPU_0); in sparx5_start()
720 idx <= sparx5_get_internal_port(sparx5, SPX5_PORT_CPU_1); idx++) in sparx5_start()
723 sparx5, ANA_CL_FILTER_CTRL(idx)); in sparx5_start()
726 sparx5_mact_init(sparx5); in sparx5_start()
729 sparx5_pgid_init(sparx5); in sparx5_start()
732 sparx5_vlan_init(sparx5); in sparx5_start()
735 sparx5_mact_learn(sparx5, sparx5_get_pgid(sparx5, PGID_CPU), broadcast, in sparx5_start()
739 sparx5_qlim_set(sparx5); in sparx5_start()
741 err = sparx5_config_auto_calendar(sparx5); in sparx5_start()
745 err = sparx5_config_dsm_calendar(sparx5); in sparx5_start()
750 err = sparx_stats_init(sparx5); in sparx5_start()
755 mutex_init(&sparx5->mact_lock); in sparx5_start()
756 INIT_LIST_HEAD(&sparx5->mact_entries); in sparx5_start()
758 dev_name(sparx5->dev)); in sparx5_start()
759 sparx5->mact_queue = create_singlethread_workqueue(queue_name); in sparx5_start()
760 if (!sparx5->mact_queue) in sparx5_start()
763 INIT_DELAYED_WORK(&sparx5->mact_work, sparx5_mact_pull_work); in sparx5_start()
764 queue_delayed_work(sparx5->mact_queue, &sparx5->mact_work, in sparx5_start()
767 mutex_init(&sparx5->mdb_lock); in sparx5_start()
768 INIT_LIST_HEAD(&sparx5->mdb_entries); in sparx5_start()
770 err = sparx5_register_netdevs(sparx5); in sparx5_start()
774 sparx5_board_init(sparx5); in sparx5_start()
775 err = sparx5_register_notifier_blocks(sparx5); in sparx5_start()
779 err = sparx5_vcap_init(sparx5); in sparx5_start()
781 sparx5_unregister_notifier_blocks(sparx5); in sparx5_start()
787 if (sparx5->fdma_irq >= 0) { in sparx5_start()
788 if (GCB_CHIP_ID_REV_ID_GET(sparx5->chip_id) > 0 || in sparx5_start()
789 !is_sparx5(sparx5)) in sparx5_start()
790 err = devm_request_irq(sparx5->dev, in sparx5_start()
791 sparx5->fdma_irq, in sparx5_start()
794 "sparx5-fdma", sparx5); in sparx5_start()
796 err = ops->fdma_init(sparx5); in sparx5_start()
798 sparx5_fdma_start(sparx5); in sparx5_start()
801 sparx5->fdma_irq = -ENXIO; in sparx5_start()
803 sparx5->fdma_irq = -ENXIO; in sparx5_start()
805 if (err && sparx5->xtr_irq >= 0) { in sparx5_start()
806 err = devm_request_irq(sparx5->dev, sparx5->xtr_irq, in sparx5_start()
808 "sparx5-xtr", sparx5); in sparx5_start()
810 err = sparx5_manual_injection_mode(sparx5); in sparx5_start()
812 sparx5->xtr_irq = -ENXIO; in sparx5_start()
814 sparx5->xtr_irq = -ENXIO; in sparx5_start()
817 if (sparx5->ptp_irq >= 0 && in sparx5_start()
818 sparx5_has_feature(sparx5, SPX5_FEATURE_PTP)) { in sparx5_start()
819 err = devm_request_threaded_irq(sparx5->dev, sparx5->ptp_irq, in sparx5_start()
821 IRQF_ONESHOT, "sparx5-ptp", in sparx5_start()
822 sparx5); in sparx5_start()
824 sparx5->ptp_irq = -ENXIO; in sparx5_start()
826 sparx5->ptp = 1; in sparx5_start()
832 static void sparx5_cleanup_ports(struct sparx5 *sparx5) in sparx5_cleanup_ports() argument
834 sparx5_unregister_netdevs(sparx5); in sparx5_cleanup_ports()
835 sparx5_destroy_netdevs(sparx5); in sparx5_cleanup_ports()
845 struct sparx5 *sparx5; in mchp_sparx5_probe() local
851 sparx5 = devm_kzalloc(&pdev->dev, sizeof(*sparx5), GFP_KERNEL); in mchp_sparx5_probe()
852 if (!sparx5) in mchp_sparx5_probe()
855 platform_set_drvdata(pdev, sparx5); in mchp_sparx5_probe()
856 sparx5->pdev = pdev; in mchp_sparx5_probe()
857 sparx5->dev = &pdev->dev; in mchp_sparx5_probe()
858 spin_lock_init(&sparx5->tx_lock); in mchp_sparx5_probe()
860 sparx5->data = device_get_match_data(sparx5->dev); in mchp_sparx5_probe()
861 if (!sparx5->data) in mchp_sparx5_probe()
864 regs = sparx5->data->regs; in mchp_sparx5_probe()
865 ops = sparx5->data->ops; in mchp_sparx5_probe()
875 sparx5->coreclock = SPX5_CORE_CLOCK_DEFAULT; in mchp_sparx5_probe()
877 sparx5->debugfs_root = debugfs_create_dir("sparx5", NULL); in mchp_sparx5_probe()
881 dev_err(sparx5->dev, "no ethernet-ports child node found\n"); in mchp_sparx5_probe()
884 sparx5->port_count = of_get_child_count(ports); in mchp_sparx5_probe()
886 configs = kcalloc(sparx5->port_count, in mchp_sparx5_probe()
900 dev_err(sparx5->dev, "port reg property error\n"); in mchp_sparx5_probe()
909 dev_err(sparx5->dev, "port %u: missing phy-mode\n", in mchp_sparx5_probe()
916 dev_err(sparx5->dev, "port %u: missing bandwidth\n", in mchp_sparx5_probe()
924 sparx5->sd_sgpio_remapping = true; in mchp_sparx5_probe()
927 serdes = devm_of_phy_get(sparx5->dev, portnp, NULL); in mchp_sparx5_probe()
929 err = dev_err_probe(sparx5->dev, in mchp_sparx5_probe()
948 err = sparx5_create_targets(sparx5); in mchp_sparx5_probe()
952 if (of_get_mac_address(np, sparx5->base_mac)) { in mchp_sparx5_probe()
953 dev_info(sparx5->dev, "MAC addr was not set, use random MAC\n"); in mchp_sparx5_probe()
954 eth_random_addr(sparx5->base_mac); in mchp_sparx5_probe()
955 sparx5->base_mac[5] = 0; in mchp_sparx5_probe()
958 sparx5->fdma_irq = platform_get_irq_byname(sparx5->pdev, "fdma"); in mchp_sparx5_probe()
959 sparx5->xtr_irq = platform_get_irq_byname(sparx5->pdev, "xtr"); in mchp_sparx5_probe()
960 sparx5->ptp_irq = platform_get_irq_byname(sparx5->pdev, "ptp"); in mchp_sparx5_probe()
963 sparx5->chip_id = spx5_rd(sparx5, GCB_CHIP_ID); in mchp_sparx5_probe()
965 sparx5->target_ct = (enum spx5_target_chiptype) in mchp_sparx5_probe()
966 GCB_CHIP_ID_PART_ID_GET(sparx5->chip_id); in mchp_sparx5_probe()
969 sparx5_init_features(sparx5); in mchp_sparx5_probe()
972 err = sparx5_init_switchcore(sparx5); in mchp_sparx5_probe()
974 dev_err(sparx5->dev, "Switchcore initialization error\n"); in mchp_sparx5_probe()
979 err = sparx5_init_coreclock(sparx5); in mchp_sparx5_probe()
981 dev_err(sparx5->dev, "LC-PLL initialization error\n"); in mchp_sparx5_probe()
985 for (idx = 0; idx < sparx5->port_count; ++idx) { in mchp_sparx5_probe()
990 err = sparx5_create_port(sparx5, config); in mchp_sparx5_probe()
992 dev_err(sparx5->dev, "port create error\n"); in mchp_sparx5_probe()
997 err = sparx5_start(sparx5); in mchp_sparx5_probe()
999 dev_err(sparx5->dev, "Start failed\n"); in mchp_sparx5_probe()
1003 err = sparx5_qos_init(sparx5); in mchp_sparx5_probe()
1005 dev_err(sparx5->dev, "Failed to initialize QoS\n"); in mchp_sparx5_probe()
1009 err = sparx5_ptp_init(sparx5); in mchp_sparx5_probe()
1011 dev_err(sparx5->dev, "PTP failed\n"); in mchp_sparx5_probe()
1015 INIT_LIST_HEAD(&sparx5->mall_entries); in mchp_sparx5_probe()
1020 sparx5_cleanup_ports(sparx5); in mchp_sparx5_probe()
1021 if (sparx5->mact_queue) in mchp_sparx5_probe()
1022 destroy_workqueue(sparx5->mact_queue); in mchp_sparx5_probe()
1032 struct sparx5 *sparx5 = platform_get_drvdata(pdev); in mchp_sparx5_remove() local
1033 const struct sparx5_ops *ops = sparx5->data->ops; in mchp_sparx5_remove()
1035 debugfs_remove_recursive(sparx5->debugfs_root); in mchp_sparx5_remove()
1036 if (sparx5->xtr_irq) { in mchp_sparx5_remove()
1037 disable_irq(sparx5->xtr_irq); in mchp_sparx5_remove()
1038 sparx5->xtr_irq = -ENXIO; in mchp_sparx5_remove()
1040 if (sparx5->fdma_irq) { in mchp_sparx5_remove()
1041 disable_irq(sparx5->fdma_irq); in mchp_sparx5_remove()
1042 sparx5->fdma_irq = -ENXIO; in mchp_sparx5_remove()
1044 sparx5_ptp_deinit(sparx5); in mchp_sparx5_remove()
1045 ops->fdma_deinit(sparx5); in mchp_sparx5_remove()
1046 sparx5_cleanup_ports(sparx5); in mchp_sparx5_remove()
1047 sparx5_vcap_destroy(sparx5); in mchp_sparx5_remove()
1049 sparx5_unregister_notifier_blocks(sparx5); in mchp_sparx5_remove()
1050 destroy_workqueue(sparx5->mact_queue); in mchp_sparx5_remove()
1116 { .compatible = "microchip,sparx5-switch", .data = &sparx5_desc },
1128 .name = "sparx5-switch",
1135 MODULE_DESCRIPTION("Microchip Sparx5 switch driver");