Lines Matching full:sparx5
2 /* Microchip Sparx5 Switch driver
6 * The Sparx5 Chip Register Model can be browsed at this location:
25 static u64 sparx5_ptp_get_1ppm(struct sparx5 *sparx5) in sparx5_ptp_get_1ppm() argument
35 switch (sparx5->coreclock) { in sparx5_ptp_get_1ppm()
56 static u64 sparx5_ptp_get_nominal_value(struct sparx5 *sparx5) in sparx5_ptp_get_nominal_value() argument
60 switch (sparx5->coreclock) { in sparx5_ptp_get_nominal_value()
85 struct sparx5 *sparx5 = port->sparx5; in sparx5_ptp_hwtstamp_set() local
93 if (test_bit(port->portno, sparx5->bridge_mask)) in sparx5_ptp_hwtstamp_set()
134 mutex_lock(&sparx5->ptp_lock); in sparx5_ptp_hwtstamp_set()
135 phc = &sparx5->phc[SPARX5_PHC_PORT]; in sparx5_ptp_hwtstamp_set()
137 mutex_unlock(&sparx5->ptp_lock); in sparx5_ptp_hwtstamp_set()
145 struct sparx5 *sparx5 = port->sparx5; in sparx5_ptp_hwtstamp_get() local
148 phc = &sparx5->phc[SPARX5_PHC_PORT]; in sparx5_ptp_hwtstamp_get()
227 struct sparx5 *sparx5 = port->sparx5; in sparx5_ptp_txtstamp_request() local
241 spin_lock_irqsave(&sparx5->ptp_ts_id_lock, flags); in sparx5_ptp_txtstamp_request()
242 if (sparx5->ptp_skbs == SPARX5_MAX_PTP_ID) { in sparx5_ptp_txtstamp_request()
243 spin_unlock_irqrestore(&sparx5->ptp_ts_id_lock, flags); in sparx5_ptp_txtstamp_request()
253 sparx5->ptp_skbs++; in sparx5_ptp_txtstamp_request()
258 spin_unlock_irqrestore(&sparx5->ptp_ts_id_lock, flags); in sparx5_ptp_txtstamp_request()
266 struct sparx5 *sparx5 = port->sparx5; in sparx5_ptp_txtstamp_release() local
269 spin_lock_irqsave(&sparx5->ptp_ts_id_lock, flags); in sparx5_ptp_txtstamp_release()
271 sparx5->ptp_skbs--; in sparx5_ptp_txtstamp_release()
273 spin_unlock_irqrestore(&sparx5->ptp_ts_id_lock, flags); in sparx5_ptp_txtstamp_release()
276 void sparx5_get_hwtimestamp(struct sparx5 *sparx5, in sparx5_get_hwtimestamp() argument
281 const struct sparx5_consts *consts = sparx5->data->consts; in sparx5_get_hwtimestamp()
285 spin_lock_irqsave(&sparx5->ptp_clock_lock, flags); in sparx5_get_hwtimestamp()
293 sparx5, PTP_PTP_PIN_CFG(consts->tod_pin)); in sparx5_get_hwtimestamp()
295 ts->tv_sec = spx5_rd(sparx5, PTP_PTP_TOD_SEC_LSB(consts->tod_pin)); in sparx5_get_hwtimestamp()
296 curr_nsec = spx5_rd(sparx5, PTP_PTP_TOD_NSEC(consts->tod_pin)); in sparx5_get_hwtimestamp()
304 spin_unlock_irqrestore(&sparx5->ptp_clock_lock, flags); in sparx5_get_hwtimestamp()
310 struct sparx5 *sparx5 = args; in sparx5_ptp_irq_handler() local
321 val = spx5_rd(sparx5, REW_PTP_TWOSTEP_CTRL); in sparx5_ptp_irq_handler()
336 port = sparx5->ports[txport]; in sparx5_ptp_irq_handler()
339 delay = spx5_rd(sparx5, REW_PTP_TWOSTEP_STAMP); in sparx5_ptp_irq_handler()
347 sparx5, REW_PTP_TWOSTEP_CTRL); in sparx5_ptp_irq_handler()
349 val = spx5_rd(sparx5, REW_PTP_TWOSTEP_CTRL); in sparx5_ptp_irq_handler()
356 id = spx5_rd(sparx5, REW_PTP_TWOSTEP_STAMP); in sparx5_ptp_irq_handler()
358 id |= spx5_rd(sparx5, REW_PTP_TWOSTEP_STAMP_SUBNS); in sparx5_ptp_irq_handler()
374 sparx5, REW_PTP_TWOSTEP_CTRL); in sparx5_ptp_irq_handler()
379 spin_lock(&sparx5->ptp_ts_id_lock); in sparx5_ptp_irq_handler()
380 sparx5->ptp_skbs--; in sparx5_ptp_irq_handler()
381 spin_unlock(&sparx5->ptp_ts_id_lock); in sparx5_ptp_irq_handler()
384 sparx5_get_hwtimestamp(sparx5, &ts, delay); in sparx5_ptp_irq_handler()
399 struct sparx5 *sparx5 = phc->sparx5; in sparx5_ptp_adjfine() local
413 tod_inc = sparx5_ptp_get_nominal_value(sparx5); in sparx5_ptp_adjfine()
419 ref = sparx5_ptp_get_1ppm(sparx5) * (scaled_ppm >> 16); in sparx5_ptp_adjfine()
420 ref += (sparx5_ptp_get_1ppm(sparx5) * (0xffff & scaled_ppm)) >> 16; in sparx5_ptp_adjfine()
423 spin_lock_irqsave(&sparx5->ptp_clock_lock, flags); in sparx5_ptp_adjfine()
427 sparx5, PTP_PTP_DOM_CFG); in sparx5_ptp_adjfine()
429 spx5_wr((u32)tod_inc & 0xFFFFFFFF, sparx5, in sparx5_ptp_adjfine()
431 spx5_wr((u32)(tod_inc >> 32), sparx5, in sparx5_ptp_adjfine()
435 PTP_PTP_DOM_CFG_PTP_CLKCFG_DIS, sparx5, in sparx5_ptp_adjfine()
438 spin_unlock_irqrestore(&sparx5->ptp_clock_lock, flags); in sparx5_ptp_adjfine()
447 struct sparx5 *sparx5 = phc->sparx5; in sparx5_ptp_settime64() local
451 consts = sparx5->data->consts; in sparx5_ptp_settime64()
453 spin_lock_irqsave(&sparx5->ptp_clock_lock, flags); in sparx5_ptp_settime64()
462 sparx5, PTP_PTP_PIN_CFG(consts->tod_pin)); in sparx5_ptp_settime64()
466 sparx5, PTP_PTP_TOD_SEC_MSB(consts->tod_pin)); in sparx5_ptp_settime64()
468 sparx5, PTP_PTP_TOD_SEC_LSB(consts->tod_pin)); in sparx5_ptp_settime64()
469 spx5_wr(ts->tv_nsec, sparx5, PTP_PTP_TOD_NSEC(consts->tod_pin)); in sparx5_ptp_settime64()
478 sparx5, PTP_PTP_PIN_CFG(consts->tod_pin)); in sparx5_ptp_settime64()
480 spin_unlock_irqrestore(&sparx5->ptp_clock_lock, flags); in sparx5_ptp_settime64()
488 struct sparx5 *sparx5 = phc->sparx5; in sparx5_ptp_gettime64() local
494 consts = sparx5->data->consts; in sparx5_ptp_gettime64()
496 spin_lock_irqsave(&sparx5->ptp_clock_lock, flags); in sparx5_ptp_gettime64()
504 sparx5, PTP_PTP_PIN_CFG(consts->tod_pin)); in sparx5_ptp_gettime64()
506 s = spx5_rd(sparx5, PTP_PTP_TOD_SEC_MSB(consts->tod_pin)); in sparx5_ptp_gettime64()
508 s |= spx5_rd(sparx5, PTP_PTP_TOD_SEC_LSB(consts->tod_pin)); in sparx5_ptp_gettime64()
509 ns = spx5_rd(sparx5, PTP_PTP_TOD_NSEC(consts->tod_pin)); in sparx5_ptp_gettime64()
512 spin_unlock_irqrestore(&sparx5->ptp_clock_lock, flags); in sparx5_ptp_gettime64()
528 struct sparx5 *sparx5 = phc->sparx5; in sparx5_ptp_adjtime() local
531 consts = sparx5->data->consts; in sparx5_ptp_adjtime()
536 spin_lock_irqsave(&sparx5->ptp_clock_lock, flags); in sparx5_ptp_adjtime()
545 sparx5, PTP_PTP_PIN_CFG(consts->tod_pin)); in sparx5_ptp_adjtime()
548 sparx5, PTP_PTP_TOD_NSEC(consts->tod_pin)); in sparx5_ptp_adjtime()
557 sparx5, PTP_PTP_PIN_CFG(consts->tod_pin)); in sparx5_ptp_adjtime()
559 spin_unlock_irqrestore(&sparx5->ptp_clock_lock, flags); in sparx5_ptp_adjtime()
578 .name = "sparx5 ptp",
586 static int sparx5_ptp_phc_init(struct sparx5 *sparx5, in sparx5_ptp_phc_init() argument
590 struct sparx5_phc *phc = &sparx5->phc[index]; in sparx5_ptp_phc_init()
593 phc->clock = ptp_clock_register(&phc->info, sparx5->dev); in sparx5_ptp_phc_init()
598 phc->sparx5 = sparx5; in sparx5_ptp_phc_init()
606 int sparx5_ptp_init(struct sparx5 *sparx5) in sparx5_ptp_init() argument
608 u64 tod_adj = sparx5_ptp_get_nominal_value(sparx5); in sparx5_ptp_init()
612 if (!sparx5->ptp) in sparx5_ptp_init()
616 err = sparx5_ptp_phc_init(sparx5, i, &sparx5_ptp_clock_info); in sparx5_ptp_init()
621 spin_lock_init(&sparx5->ptp_clock_lock); in sparx5_ptp_init()
622 spin_lock_init(&sparx5->ptp_ts_id_lock); in sparx5_ptp_init()
623 mutex_init(&sparx5->ptp_lock); in sparx5_ptp_init()
626 spx5_wr(PTP_PTP_DOM_CFG_PTP_ENA_SET(0), sparx5, PTP_PTP_DOM_CFG); in sparx5_ptp_init()
631 sparx5, PTP_PTP_DOM_CFG); in sparx5_ptp_init()
634 spx5_wr((u32)tod_adj & 0xFFFFFFFF, sparx5, in sparx5_ptp_init()
636 spx5_wr((u32)(tod_adj >> 32), sparx5, in sparx5_ptp_init()
642 sparx5, PTP_PTP_DOM_CFG); in sparx5_ptp_init()
645 spx5_wr(PTP_PTP_DOM_CFG_PTP_ENA_SET(0x7), sparx5, PTP_PTP_DOM_CFG); in sparx5_ptp_init()
647 for (i = 0; i < sparx5->data->consts->n_ports; i++) { in sparx5_ptp_init()
648 port = sparx5->ports[i]; in sparx5_ptp_init()
658 void sparx5_ptp_deinit(struct sparx5 *sparx5) in sparx5_ptp_deinit() argument
663 for (i = 0; i < sparx5->data->consts->n_ports; i++) { in sparx5_ptp_deinit()
664 port = sparx5->ports[i]; in sparx5_ptp_deinit()
672 ptp_clock_unregister(sparx5->phc[i].clock); in sparx5_ptp_deinit()
675 void sparx5_ptp_rxtstamp(struct sparx5 *sparx5, struct sk_buff *skb, in sparx5_ptp_rxtstamp() argument
683 if (!sparx5->ptp) in sparx5_ptp_rxtstamp()
686 phc = &sparx5->phc[SPARX5_PHC_PORT]; in sparx5_ptp_rxtstamp()