2 /* Microchip Sparx5 Switch driver VCAP implementation
6  * The Sparx5 Chip Register Model can be browsed at this location:
152 static void sparx5_vcap_type_err(struct sparx5 *sparx5,  in sparx5_vcap_type_err()  argument
161 static void sparx5_vcap_wait_super_update(struct sparx5 *sparx5)  in sparx5_vcap_wait_super_update()  argument
167 			  false, sparx5, VCAP_SUPER_CTRL);  in sparx5_vcap_wait_super_update()
171 static void sparx5_vcap_wait_es0_update(struct sparx5 *sparx5)  in sparx5_vcap_wait_es0_update()  argument
177 			  false, sparx5, VCAP_ES0_CTRL);  in sparx5_vcap_wait_es0_update()
181 static void sparx5_vcap_wait_es2_update(struct sparx5 *sparx5)  in sparx5_vcap_wait_es2_update()  argument
187 			  false, sparx5, VCAP_ES2_CTRL);  in sparx5_vcap_wait_es2_update()
191 static void _sparx5_vcap_range_init(struct sparx5 *sparx5,  in _sparx5_vcap_range_init()  argument
202 			sparx5, VCAP_SUPER_CFG);  in _sparx5_vcap_range_init()
210 			sparx5, VCAP_SUPER_CTRL);  in _sparx5_vcap_range_init()
211 		sparx5_vcap_wait_super_update(sparx5);  in _sparx5_vcap_range_init()
216 			sparx5, VCAP_ES0_CFG);  in _sparx5_vcap_range_init()
224 			sparx5, VCAP_ES0_CTRL);  in _sparx5_vcap_range_init()
225 		sparx5_vcap_wait_es0_update(sparx5);  in _sparx5_vcap_range_init()
230 			sparx5, VCAP_ES2_CFG);  in _sparx5_vcap_range_init()
238 			sparx5, VCAP_ES2_CTRL);  in _sparx5_vcap_range_init()
239 		sparx5_vcap_wait_es2_update(sparx5);  in _sparx5_vcap_range_init()
242 		sparx5_vcap_type_err(sparx5, admin, __func__);  in _sparx5_vcap_range_init()
248 static void sparx5_vcap_block_init(struct sparx5 *sparx5,  in sparx5_vcap_block_init()  argument
251 	_sparx5_vcap_range_init(sparx5, admin, admin->first_valid_addr,  in sparx5_vcap_block_init()
256 /* Get the keyset name from the sparx5 VCAP model */
262 	return vcap_keyset_name(port->sparx5->vcap_ctrl, keyset);  in sparx5_vcap_keyset_name()
411 	struct sparx5 *sparx5 = port->sparx5;  in sparx5_vcap_is0_get_port_keysets()  local
415 	value = spx5_rd(sparx5, ANA_CL_ADV_CL_CFG(portno, lookup));  in sparx5_vcap_is0_get_port_keysets()
465 	struct sparx5 *sparx5 = port->sparx5;  in sparx5_vcap_is2_get_port_keysets()  local
469 	value = spx5_rd(sparx5, ANA_ACL_VCAP_S2_KEY_SEL(portno, lookup));  in sparx5_vcap_is2_get_port_keysets()
594 	struct sparx5 *sparx5 = port->sparx5;  in sparx5_vcap_es0_get_port_keysets()  local
598 	value = spx5_rd(sparx5, REW_RTAG_ETAG_CTRL(portno));  in sparx5_vcap_es0_get_port_keysets()
619 	struct sparx5 *sparx5 = port->sparx5;  in sparx5_vcap_es2_get_port_keysets()  local
623 	value = spx5_rd(sparx5, EACL_VCAP_ES2_KEY_SEL(portno, lookup));  in sparx5_vcap_es2_get_port_keysets()
706 		sparx5_vcap_type_err(port->sparx5, admin, __func__);  in sparx5_vcap_get_port_keyset()
783 		sparx5_vcap_type_err(port->sparx5, admin, __func__);  in sparx5_vcap_validate_keyset()
888 		sparx5_vcap_type_err(port->sparx5, admin, __func__);  in sparx5_vcap_add_default_fields()
902 static void sparx5_vcap_is0_cache_write(struct sparx5 *sparx5,  in sparx5_vcap_is0_cache_write()  argument
919 			spx5_wr(keystr[idx] & mskstr[idx], sparx5,  in sparx5_vcap_is0_cache_write()
921 			spx5_wr(~mskstr[idx], sparx5,  in sparx5_vcap_is0_cache_write()
927 			spx5_wr(actstr[idx], sparx5,  in sparx5_vcap_is0_cache_write()
939 		spx5_wr(admin->cache.counter, sparx5,  in sparx5_vcap_is0_cache_write()
943 static void sparx5_vcap_is2_cache_write(struct sparx5 *sparx5,  in sparx5_vcap_is2_cache_write()  argument
960 			spx5_wr(keystr[idx] & mskstr[idx], sparx5,  in sparx5_vcap_is2_cache_write()
962 			spx5_wr(~mskstr[idx], sparx5,  in sparx5_vcap_is2_cache_write()
968 			spx5_wr(actstr[idx], sparx5,  in sparx5_vcap_is2_cache_write()
981 			spx5_wr(admin->cache.counter, sparx5,  in sparx5_vcap_is2_cache_write()
984 			spx5_wr(admin->cache.counter, sparx5,  in sparx5_vcap_is2_cache_write()
986 		spx5_wr(admin->cache.sticky, sparx5,  in sparx5_vcap_is2_cache_write()
992 static void sparx5_es0_write_esdx_counter(struct sparx5 *sparx5,  in sparx5_es0_write_esdx_counter()  argument
995 	mutex_lock(&sparx5->queue_stats_lock);  in sparx5_es0_write_esdx_counter()
996 	spx5_wr(XQS_STAT_CFG_STAT_VIEW_SET(id), sparx5, XQS_STAT_CFG);  in sparx5_es0_write_esdx_counter()
997 	spx5_wr(admin->cache.counter, sparx5,  in sparx5_es0_write_esdx_counter()
999 	spx5_wr(0, sparx5, XQS_CNT(SPARX5_STAT_ESDX_YEL_PKTS));  in sparx5_es0_write_esdx_counter()
1000 	mutex_unlock(&sparx5->queue_stats_lock);  in sparx5_es0_write_esdx_counter()
1003 static void sparx5_vcap_es0_cache_write(struct sparx5 *sparx5,  in sparx5_vcap_es0_cache_write()  argument
1020 			spx5_wr(keystr[idx] & mskstr[idx], sparx5,  in sparx5_vcap_es0_cache_write()
1022 			spx5_wr(~mskstr[idx], sparx5,  in sparx5_vcap_es0_cache_write()
1028 			spx5_wr(actstr[idx], sparx5,  in sparx5_vcap_es0_cache_write()
1039 		spx5_wr(admin->cache.counter, sparx5, VCAP_ES0_VCAP_CNT_DAT(0));  in sparx5_vcap_es0_cache_write()
1040 		sparx5_es0_write_esdx_counter(sparx5, admin, start);  in sparx5_vcap_es0_cache_write()
1044 static void sparx5_vcap_es2_cache_write(struct sparx5 *sparx5,  in sparx5_vcap_es2_cache_write()  argument
1061 			spx5_wr(keystr[idx] & mskstr[idx], sparx5,  in sparx5_vcap_es2_cache_write()
1063 			spx5_wr(~mskstr[idx], sparx5,  in sparx5_vcap_es2_cache_write()
1069 			spx5_wr(actstr[idx], sparx5,  in sparx5_vcap_es2_cache_write()
1081 		spx5_wr(admin->cache.counter, sparx5, EACL_ES2_CNT(start));  in sparx5_vcap_es2_cache_write()
1082 		spx5_wr(admin->cache.sticky, sparx5, VCAP_ES2_VCAP_CNT_DAT(0));  in sparx5_vcap_es2_cache_write()
1094 	struct sparx5 *sparx5 = port->sparx5;  in sparx5_vcap_cache_write()  local
1098 		sparx5_vcap_is0_cache_write(sparx5, admin, sel, start, count);  in sparx5_vcap_cache_write()
1101 		sparx5_vcap_is2_cache_write(sparx5, admin, sel, start, count);  in sparx5_vcap_cache_write()
1104 		sparx5_vcap_es0_cache_write(sparx5, admin, sel, start, count);  in sparx5_vcap_cache_write()
1107 		sparx5_vcap_es2_cache_write(sparx5, admin, sel, start, count);  in sparx5_vcap_cache_write()
1110 		sparx5_vcap_type_err(sparx5, admin, __func__);  in sparx5_vcap_cache_write()
1115 static void sparx5_vcap_is0_cache_read(struct sparx5 *sparx5,  in sparx5_vcap_is0_cache_read()  argument
1130 			keystr[idx] = spx5_rd(sparx5,  in sparx5_vcap_is0_cache_read()
1132 			mskstr[idx] = ~spx5_rd(sparx5,  in sparx5_vcap_is0_cache_read()
1139 			actstr[idx] = spx5_rd(sparx5,  in sparx5_vcap_is0_cache_read()
1144 			spx5_rd(sparx5, VCAP_SUPER_VCAP_CNT_DAT(0));  in sparx5_vcap_is0_cache_read()
1146 			spx5_rd(sparx5, VCAP_SUPER_VCAP_CNT_DAT(0));  in sparx5_vcap_is0_cache_read()
1150 static void sparx5_vcap_is2_cache_read(struct sparx5 *sparx5,  in sparx5_vcap_is2_cache_read()  argument
1165 			keystr[idx] = spx5_rd(sparx5,  in sparx5_vcap_is2_cache_read()
1167 			mskstr[idx] = ~spx5_rd(sparx5,  in sparx5_vcap_is2_cache_read()
1174 			actstr[idx] = spx5_rd(sparx5,  in sparx5_vcap_is2_cache_read()
1181 				spx5_rd(sparx5, ANA_ACL_CNT_A(start));  in sparx5_vcap_is2_cache_read()
1184 				spx5_rd(sparx5, ANA_ACL_CNT_B(start));  in sparx5_vcap_is2_cache_read()
1186 			spx5_rd(sparx5, VCAP_SUPER_VCAP_CNT_DAT(0));  in sparx5_vcap_is2_cache_read()
1191 static void sparx5_es0_read_esdx_counter(struct sparx5 *sparx5,  in sparx5_es0_read_esdx_counter()  argument
1196 	mutex_lock(&sparx5->queue_stats_lock);  in sparx5_es0_read_esdx_counter()
1197 	spx5_wr(XQS_STAT_CFG_STAT_VIEW_SET(id), sparx5, XQS_STAT_CFG);  in sparx5_es0_read_esdx_counter()
1198 	counter = spx5_rd(sparx5, XQS_CNT(SPARX5_STAT_ESDX_GRN_PKTS)) +  in sparx5_es0_read_esdx_counter()
1199 		spx5_rd(sparx5, XQS_CNT(SPARX5_STAT_ESDX_YEL_PKTS));  in sparx5_es0_read_esdx_counter()
1200 	mutex_unlock(&sparx5->queue_stats_lock);  in sparx5_es0_read_esdx_counter()
1205 static void sparx5_vcap_es0_cache_read(struct sparx5 *sparx5,  in sparx5_vcap_es0_cache_read()  argument
1221 				spx5_rd(sparx5, VCAP_ES0_VCAP_ENTRY_DAT(idx));  in sparx5_vcap_es0_cache_read()
1223 				~spx5_rd(sparx5, VCAP_ES0_VCAP_MASK_DAT(idx));  in sparx5_vcap_es0_cache_read()
1230 				spx5_rd(sparx5, VCAP_ES0_VCAP_ACTION_DAT(idx));  in sparx5_vcap_es0_cache_read()
1234 			spx5_rd(sparx5, VCAP_ES0_VCAP_CNT_DAT(0));  in sparx5_vcap_es0_cache_read()
1236 		sparx5_es0_read_esdx_counter(sparx5, admin, start);  in sparx5_vcap_es0_cache_read()
1240 static void sparx5_vcap_es2_cache_read(struct sparx5 *sparx5,  in sparx5_vcap_es2_cache_read()  argument
1256 				spx5_rd(sparx5, VCAP_ES2_VCAP_ENTRY_DAT(idx));  in sparx5_vcap_es2_cache_read()
1258 				~spx5_rd(sparx5, VCAP_ES2_VCAP_MASK_DAT(idx));  in sparx5_vcap_es2_cache_read()
1265 				spx5_rd(sparx5, VCAP_ES2_VCAP_ACTION_DAT(idx));  in sparx5_vcap_es2_cache_read()
1270 			spx5_rd(sparx5, EACL_ES2_CNT(start));  in sparx5_vcap_es2_cache_read()
1272 			spx5_rd(sparx5, VCAP_ES2_VCAP_CNT_DAT(0));  in sparx5_vcap_es2_cache_read()
1284 	struct sparx5 *sparx5 = port->sparx5;  in sparx5_vcap_cache_read()  local
1288 		sparx5_vcap_is0_cache_read(sparx5, admin, sel, start, count);  in sparx5_vcap_cache_read()
1291 		sparx5_vcap_is2_cache_read(sparx5, admin, sel, start, count);  in sparx5_vcap_cache_read()
1294 		sparx5_vcap_es0_cache_read(sparx5, admin, sel, start, count);  in sparx5_vcap_cache_read()
1297 		sparx5_vcap_es2_cache_read(sparx5, admin, sel, start, count);  in sparx5_vcap_cache_read()
1300 		sparx5_vcap_type_err(sparx5, admin, __func__);  in sparx5_vcap_cache_read()
1311 	struct sparx5 *sparx5 = port->sparx5;  in sparx5_vcap_range_init()  local
1313 	_sparx5_vcap_range_init(sparx5, admin, addr, count);  in sparx5_vcap_range_init()
1316 static void sparx5_vcap_super_update(struct sparx5 *sparx5,  in sparx5_vcap_super_update()  argument
1323 		VCAP_SUPER_CFG_MV_SIZE_SET(0), sparx5, VCAP_SUPER_CFG);  in sparx5_vcap_super_update()
1331 		sparx5, VCAP_SUPER_CTRL);  in sparx5_vcap_super_update()
1332 	sparx5_vcap_wait_super_update(sparx5);  in sparx5_vcap_super_update()
1335 static void sparx5_vcap_es0_update(struct sparx5 *sparx5,  in sparx5_vcap_es0_update()  argument
1342 		VCAP_ES0_CFG_MV_SIZE_SET(0), sparx5, VCAP_ES0_CFG);  in sparx5_vcap_es0_update()
1350 		sparx5, VCAP_ES0_CTRL);  in sparx5_vcap_es0_update()
1351 	sparx5_vcap_wait_es0_update(sparx5);  in sparx5_vcap_es0_update()
1354 static void sparx5_vcap_es2_update(struct sparx5 *sparx5,  in sparx5_vcap_es2_update()  argument
1361 		VCAP_ES2_CFG_MV_SIZE_SET(0), sparx5, VCAP_ES2_CFG);  in sparx5_vcap_es2_update()
1369 		sparx5, VCAP_ES2_CTRL);  in sparx5_vcap_es2_update()
1370 	sparx5_vcap_wait_es2_update(sparx5);  in sparx5_vcap_es2_update()
1379 	struct sparx5 *sparx5 = port->sparx5;  in sparx5_vcap_update()  local
1384 		sparx5_vcap_super_update(sparx5, cmd, sel, addr);  in sparx5_vcap_update()
1387 		sparx5_vcap_es0_update(sparx5, cmd, sel, addr);  in sparx5_vcap_update()
1390 		sparx5_vcap_es2_update(sparx5, cmd, sel, addr);  in sparx5_vcap_update()
1393 		sparx5_vcap_type_err(sparx5, admin, __func__);  in sparx5_vcap_update()
1398 static void sparx5_vcap_super_move(struct sparx5 *sparx5,  in sparx5_vcap_super_move()  argument
1406 		sparx5, VCAP_SUPER_CFG);  in sparx5_vcap_super_move()
1414 		sparx5, VCAP_SUPER_CTRL);  in sparx5_vcap_super_move()
1415 	sparx5_vcap_wait_super_update(sparx5);  in sparx5_vcap_super_move()
1418 static void sparx5_vcap_es0_move(struct sparx5 *sparx5,  in sparx5_vcap_es0_move()  argument
1426 		sparx5, VCAP_ES0_CFG);  in sparx5_vcap_es0_move()
1434 		sparx5, VCAP_ES0_CTRL);  in sparx5_vcap_es0_move()
1435 	sparx5_vcap_wait_es0_update(sparx5);  in sparx5_vcap_es0_move()
1438 static void sparx5_vcap_es2_move(struct sparx5 *sparx5,  in sparx5_vcap_es2_move()  argument
1446 		sparx5, VCAP_ES2_CFG);  in sparx5_vcap_es2_move()
1454 		sparx5, VCAP_ES2_CTRL);  in sparx5_vcap_es2_move()
1455 	sparx5_vcap_wait_es2_update(sparx5);  in sparx5_vcap_es2_move()
1463 	struct sparx5 *sparx5 = port->sparx5;  in sparx5_vcap_move()  local
1480 		sparx5_vcap_super_move(sparx5, addr, cmd, mv_num_pos, mv_size);  in sparx5_vcap_move()
1483 		sparx5_vcap_es0_move(sparx5, addr, cmd, mv_num_pos, mv_size);  in sparx5_vcap_move()
1486 		sparx5_vcap_es2_move(sparx5, addr, cmd, mv_num_pos, mv_size);  in sparx5_vcap_move()
1489 		sparx5_vcap_type_err(sparx5, admin, __func__);  in sparx5_vcap_move()
1523 	struct sparx5 *sparx5 = port->sparx5;  in sparx5_vcap_is0_set_port_keyset()  local
1532 			 sparx5,  in sparx5_vcap_is0_set_port_keyset()
1539 			 sparx5,  in sparx5_vcap_is0_set_port_keyset()
1546 			 sparx5,  in sparx5_vcap_is0_set_port_keyset()
1612 	struct sparx5 *sparx5 = port->sparx5;  in sparx5_vcap_is2_set_port_keyset()  local
1621 			 sparx5,  in sparx5_vcap_is2_set_port_keyset()
1628 			 sparx5,  in sparx5_vcap_is2_set_port_keyset()
1632 			 sparx5,  in sparx5_vcap_is2_set_port_keyset()
1639 			 sparx5,  in sparx5_vcap_is2_set_port_keyset()
1644 			 sparx5,  in sparx5_vcap_is2_set_port_keyset()
1651 			 sparx5,  in sparx5_vcap_is2_set_port_keyset()
1705 	struct sparx5 *sparx5 = port->sparx5;  in sparx5_vcap_es2_set_port_keyset()  local
1714 			 sparx5,  in sparx5_vcap_es2_set_port_keyset()
1721 			 sparx5,  in sparx5_vcap_es2_set_port_keyset()
1728 			 sparx5,  in sparx5_vcap_es2_set_port_keyset()
1771 		sparx5_vcap_type_err(port->sparx5, admin, __func__);  in sparx5_vcap_set_port_keyset()
1777 static void sparx5_vcap_is0_port_key_selection(struct sparx5 *sparx5,  in sparx5_vcap_is0_port_key_selection()  argument
1780 	const struct sparx5_consts *consts = sparx5->data->consts;  in sparx5_vcap_is0_port_key_selection()
1793 			spx5_wr(keysel, sparx5,  in sparx5_vcap_is0_port_key_selection()
1797 				 sparx5,  in sparx5_vcap_is0_port_key_selection()
1804 static void sparx5_vcap_is2_port_key_selection(struct sparx5 *sparx5,  in sparx5_vcap_is2_port_key_selection()  argument
1807 	const struct sparx5_consts *consts = sparx5->data->consts;  in sparx5_vcap_is2_port_key_selection()
1819 			spx5_wr(keysel, sparx5,  in sparx5_vcap_is2_port_key_selection()
1827 			 sparx5,  in sparx5_vcap_is2_port_key_selection()
1832 static void sparx5_vcap_es0_port_key_selection(struct sparx5 *sparx5,  in sparx5_vcap_es0_port_key_selection()  argument
1835 	const struct sparx5_consts *consts = sparx5->data->consts;  in sparx5_vcap_es0_port_key_selection()
1842 			 sparx5, REW_RTAG_ETAG_CTRL(portno));  in sparx5_vcap_es0_port_key_selection()
1845 		 sparx5, REW_ES0_CTRL);  in sparx5_vcap_es0_port_key_selection()
1849 static void sparx5_vcap_es2_port_key_selection(struct sparx5 *sparx5,  in sparx5_vcap_es2_port_key_selection()  argument
1852 	const struct sparx5_consts *consts = sparx5->data->consts;  in sparx5_vcap_es2_port_key_selection()
1861 			spx5_wr(keysel, sparx5,  in sparx5_vcap_es2_port_key_selection()
1866 static void sparx5_vcap_port_key_selection(struct sparx5 *sparx5,  in sparx5_vcap_port_key_selection()  argument
1871 		sparx5_vcap_is0_port_key_selection(sparx5, admin);  in sparx5_vcap_port_key_selection()
1874 		sparx5_vcap_is2_port_key_selection(sparx5, admin);  in sparx5_vcap_port_key_selection()
1877 		sparx5_vcap_es0_port_key_selection(sparx5, admin);  in sparx5_vcap_port_key_selection()
1880 		sparx5_vcap_es2_port_key_selection(sparx5, admin);  in sparx5_vcap_port_key_selection()
1883 		sparx5_vcap_type_err(sparx5, admin, __func__);  in sparx5_vcap_port_key_selection()
1889 static void sparx5_vcap_port_key_deselection(struct sparx5 *sparx5,  in sparx5_vcap_port_key_deselection()  argument
1892 	const struct sparx5_consts *consts = sparx5->data->consts;  in sparx5_vcap_port_key_deselection()
1901 					 sparx5,  in sparx5_vcap_port_key_deselection()
1908 				 sparx5,  in sparx5_vcap_port_key_deselection()
1913 			 REW_ES0_CTRL_ES0_LU_ENA, sparx5, REW_ES0_CTRL);  in sparx5_vcap_port_key_deselection()
1920 					 sparx5,  in sparx5_vcap_port_key_deselection()
1924 		sparx5_vcap_type_err(sparx5, admin, __func__);  in sparx5_vcap_port_key_deselection()
1942 sparx5_vcap_admin_alloc(struct sparx5 *sparx5, struct vcap_control *ctrl,  in sparx5_vcap_admin_alloc()  argument
1976 static void sparx5_vcap_block_alloc(struct sparx5 *sparx5,  in sparx5_vcap_block_alloc()  argument
1991 			spx5_wr(VCAP_SUPER_IDX_CORE_IDX_SET(idx), sparx5,  in sparx5_vcap_block_alloc()
1994 				sparx5, VCAP_SUPER_MAP);  in sparx5_vcap_block_alloc()
2005 		cores = spx5_rd(sparx5, VCAP_ES0_CORE_CNT);  in sparx5_vcap_block_alloc()
2007 			spx5_wr(VCAP_ES0_IDX_CORE_IDX_SET(idx), sparx5,  in sparx5_vcap_block_alloc()
2009 			spx5_wr(VCAP_ES0_MAP_CORE_MAP_SET(1), sparx5,  in sparx5_vcap_block_alloc()
2017 		cores = spx5_rd(sparx5, VCAP_ES2_CORE_CNT);  in sparx5_vcap_block_alloc()
2019 			spx5_wr(VCAP_ES2_IDX_CORE_IDX_SET(idx), sparx5,  in sparx5_vcap_block_alloc()
2021 			spx5_wr(VCAP_ES2_MAP_CORE_MAP_SET(1), sparx5,  in sparx5_vcap_block_alloc()
2026 		sparx5_vcap_type_err(sparx5, admin, __func__);  in sparx5_vcap_block_alloc()
2032 int sparx5_vcap_init(struct sparx5 *sparx5)  in sparx5_vcap_init()  argument
2034 	const struct sparx5_consts *consts = sparx5->data->consts;  in sparx5_vcap_init()
2054 	sparx5->vcap_ctrl = ctrl;  in sparx5_vcap_init()
2055 	/* select the sparx5 VCAP model */  in sparx5_vcap_init()
2064 		admin = sparx5_vcap_admin_alloc(sparx5, ctrl, cfg);  in sparx5_vcap_init()
2071 		sparx5_vcap_block_alloc(sparx5, admin, cfg);  in sparx5_vcap_init()
2072 		sparx5_vcap_block_init(sparx5, admin);  in sparx5_vcap_init()
2074 			sparx5_vcap_port_key_selection(sparx5, admin);  in sparx5_vcap_init()
2077 	dir = vcap_debugfs(sparx5->dev, sparx5->debugfs_root, ctrl);  in sparx5_vcap_init()
2079 		if (sparx5->ports[idx])  in sparx5_vcap_init()
2080 			vcap_port_debugfs(sparx5->dev, dir, ctrl,  in sparx5_vcap_init()
2081 					  sparx5->ports[idx]->ndev);  in sparx5_vcap_init()
2086 void sparx5_vcap_destroy(struct sparx5 *sparx5)  in sparx5_vcap_destroy()  argument
2088 	struct vcap_control *ctrl = sparx5->vcap_ctrl;  in sparx5_vcap_destroy()
2095 		sparx5_vcap_port_key_deselection(sparx5, admin);  in sparx5_vcap_destroy()