1 // SPDX-License-Identifier: GPL-2.0
22 				unsigned long rules,  in mtk_phy_led_hw_is_supported()  argument
26 		return -EINVAL;  in mtk_phy_led_hw_is_supported()
29 	if (rules & ~supported_triggers)  in mtk_phy_led_hw_is_supported()
30 		return -EOPNOTSUPP;  in mtk_phy_led_hw_is_supported()
37 			    unsigned long *rules, u16 on_set,  in mtk_phy_led_hw_ctrl_get()  argument
44 	struct mtk_socphy_priv *priv = phydev->priv;  in mtk_phy_led_hw_ctrl_get()
48 		return -EINVAL;  in mtk_phy_led_hw_ctrl_get()
54 		return -EIO;  in mtk_phy_led_hw_ctrl_get()
60 		return -EIO;  in mtk_phy_led_hw_ctrl_get()
65 		set_bit(bit_netdev, &priv->led_state);  in mtk_phy_led_hw_ctrl_get()
67 		clear_bit(bit_netdev, &priv->led_state);  in mtk_phy_led_hw_ctrl_get()
70 		set_bit(bit_on, &priv->led_state);  in mtk_phy_led_hw_ctrl_get()
72 		clear_bit(bit_on, &priv->led_state);  in mtk_phy_led_hw_ctrl_get()
75 		set_bit(bit_blink, &priv->led_state);  in mtk_phy_led_hw_ctrl_get()
77 		clear_bit(bit_blink, &priv->led_state);  in mtk_phy_led_hw_ctrl_get()
79 	if (!rules)  in mtk_phy_led_hw_ctrl_get()
83 		*rules |= BIT(TRIGGER_NETDEV_LINK);  in mtk_phy_led_hw_ctrl_get()
86 		*rules |= BIT(TRIGGER_NETDEV_LINK_10);  in mtk_phy_led_hw_ctrl_get()
89 		*rules |= BIT(TRIGGER_NETDEV_LINK_100);  in mtk_phy_led_hw_ctrl_get()
92 		*rules |= BIT(TRIGGER_NETDEV_LINK_1000);  in mtk_phy_led_hw_ctrl_get()
95 		*rules |= BIT(TRIGGER_NETDEV_LINK_2500);  in mtk_phy_led_hw_ctrl_get()
98 		*rules |= BIT(TRIGGER_NETDEV_FULL_DUPLEX);  in mtk_phy_led_hw_ctrl_get()
101 		*rules |= BIT(TRIGGER_NETDEV_HALF_DUPLEX);  in mtk_phy_led_hw_ctrl_get()
104 		*rules |= BIT(TRIGGER_NETDEV_RX);  in mtk_phy_led_hw_ctrl_get()
107 		*rules |= BIT(TRIGGER_NETDEV_TX);  in mtk_phy_led_hw_ctrl_get()
114 			    unsigned long rules, u16 on_set,  in mtk_phy_led_hw_ctrl_set()  argument
118 	struct mtk_socphy_priv *priv = phydev->priv;  in mtk_phy_led_hw_ctrl_set()
123 		return -EINVAL;  in mtk_phy_led_hw_ctrl_set()
125 	if (rules & BIT(TRIGGER_NETDEV_FULL_DUPLEX))  in mtk_phy_led_hw_ctrl_set()
128 	if (rules & BIT(TRIGGER_NETDEV_HALF_DUPLEX))  in mtk_phy_led_hw_ctrl_set()
131 	if (rules & (BIT(TRIGGER_NETDEV_LINK_10) | BIT(TRIGGER_NETDEV_LINK)))  in mtk_phy_led_hw_ctrl_set()
134 	if (rules & (BIT(TRIGGER_NETDEV_LINK_100) | BIT(TRIGGER_NETDEV_LINK)))  in mtk_phy_led_hw_ctrl_set()
137 	if (rules & (BIT(TRIGGER_NETDEV_LINK_1000) | BIT(TRIGGER_NETDEV_LINK)))  in mtk_phy_led_hw_ctrl_set()
140 	if (rules & (BIT(TRIGGER_NETDEV_LINK_2500) | BIT(TRIGGER_NETDEV_LINK)))  in mtk_phy_led_hw_ctrl_set()
143 	if (rules & BIT(TRIGGER_NETDEV_RX)) {  in mtk_phy_led_hw_ctrl_set()
158 	if (rules & BIT(TRIGGER_NETDEV_TX)) {  in mtk_phy_led_hw_ctrl_set()
174 		set_bit(bit_netdev, &priv->led_state);  in mtk_phy_led_hw_ctrl_set()
176 		clear_bit(bit_netdev, &priv->led_state);  in mtk_phy_led_hw_ctrl_set()
196 		return -EINVAL;  in mtk_phy_led_num_dly_cfg()
212 	struct mtk_socphy_priv *priv = phydev->priv;  in mtk_phy_hw_led_on_set()
216 		changed = !test_and_set_bit(bit_on, &priv->led_state);  in mtk_phy_hw_led_on_set()
218 		changed = !!test_and_clear_bit(bit_on, &priv->led_state);  in mtk_phy_hw_led_on_set()
221 					(index ? 16 : 0), &priv->led_state);  in mtk_phy_hw_led_on_set()
237 	struct mtk_socphy_priv *priv = phydev->priv;  in mtk_phy_hw_led_blink_set()
241 		changed = !test_and_set_bit(bit_blink, &priv->led_state);  in mtk_phy_hw_led_blink_set()
243 		changed = !!test_and_clear_bit(bit_blink, &priv->led_state);  in mtk_phy_hw_led_blink_set()
246 			      (index ? 16 : 0), &priv->led_state);  in mtk_phy_hw_led_blink_set()
263 		phydev->drv->led_hw_control_get(phydev, i, NULL);  in mtk_phy_leds_state_init()
267 MODULE_DESCRIPTION("MediaTek Ethernet PHY driver common");