Lines Matching full:dp
33 /* TODO: Any other peer specific DP cleanup */ in ath12k_dp_peer_cleanup()
63 reo_dest = ar->dp.mac_id + 1; in ath12k_dp_peer_setup()
206 ret = ath12k_hif_get_user_msi_vector(ab, "DP", in ath12k_dp_srng_msi_setup()
318 ath12k_warn(ab, "Not a valid ring type in dp :%d\n", type); in ath12k_dp_srng_setup()
377 struct ath12k_dp *dp) in ath12k_dp_tx_get_bank_profile() argument
387 spin_lock_bh(&dp->tx_bank_lock); in ath12k_dp_tx_get_bank_profile()
389 for (i = 0; i < dp->num_bank_profiles; i++) { in ath12k_dp_tx_get_bank_profile()
390 if (dp->bank_profiles[i].is_configured && in ath12k_dp_tx_get_bank_profile()
391 (dp->bank_profiles[i].bank_config ^ bank_config) == 0) { in ath12k_dp_tx_get_bank_profile()
395 if (!dp->bank_profiles[i].is_configured || in ath12k_dp_tx_get_bank_profile()
396 !dp->bank_profiles[i].num_users) { in ath12k_dp_tx_get_bank_profile()
403 spin_unlock_bh(&dp->tx_bank_lock); in ath12k_dp_tx_get_bank_profile()
409 dp->bank_profiles[bank_id].is_configured = true; in ath12k_dp_tx_get_bank_profile()
410 dp->bank_profiles[bank_id].bank_config = bank_config; in ath12k_dp_tx_get_bank_profile()
413 dp->bank_profiles[bank_id].num_users++; in ath12k_dp_tx_get_bank_profile()
414 spin_unlock_bh(&dp->tx_bank_lock); in ath12k_dp_tx_get_bank_profile()
420 bank_id, bank_config, dp->bank_profiles[bank_id].bank_config, in ath12k_dp_tx_get_bank_profile()
421 dp->bank_profiles[bank_id].num_users); in ath12k_dp_tx_get_bank_profile()
426 void ath12k_dp_tx_put_bank_profile(struct ath12k_dp *dp, u8 bank_id) in ath12k_dp_tx_put_bank_profile() argument
428 spin_lock_bh(&dp->tx_bank_lock); in ath12k_dp_tx_put_bank_profile()
429 dp->bank_profiles[bank_id].num_users--; in ath12k_dp_tx_put_bank_profile()
430 spin_unlock_bh(&dp->tx_bank_lock); in ath12k_dp_tx_put_bank_profile()
435 struct ath12k_dp *dp = &ab->dp; in ath12k_dp_deinit_bank_profiles() local
437 kfree(dp->bank_profiles); in ath12k_dp_deinit_bank_profiles()
438 dp->bank_profiles = NULL; in ath12k_dp_deinit_bank_profiles()
443 struct ath12k_dp *dp = &ab->dp; in ath12k_dp_init_bank_profiles() local
447 dp->num_bank_profiles = num_tcl_banks; in ath12k_dp_init_bank_profiles()
448 dp->bank_profiles = kmalloc_array(num_tcl_banks, in ath12k_dp_init_bank_profiles()
451 if (!dp->bank_profiles) in ath12k_dp_init_bank_profiles()
454 spin_lock_init(&dp->tx_bank_lock); in ath12k_dp_init_bank_profiles()
457 dp->bank_profiles[i].is_configured = false; in ath12k_dp_init_bank_profiles()
458 dp->bank_profiles[i].num_users = 0; in ath12k_dp_init_bank_profiles()
466 struct ath12k_dp *dp = &ab->dp; in ath12k_dp_srng_common_cleanup() local
469 ath12k_dp_srng_cleanup(ab, &dp->reo_status_ring); in ath12k_dp_srng_common_cleanup()
470 ath12k_dp_srng_cleanup(ab, &dp->reo_cmd_ring); in ath12k_dp_srng_common_cleanup()
471 ath12k_dp_srng_cleanup(ab, &dp->reo_except_ring); in ath12k_dp_srng_common_cleanup()
472 ath12k_dp_srng_cleanup(ab, &dp->rx_rel_ring); in ath12k_dp_srng_common_cleanup()
473 ath12k_dp_srng_cleanup(ab, &dp->reo_reinject_ring); in ath12k_dp_srng_common_cleanup()
475 ath12k_dp_srng_cleanup(ab, &dp->tx_ring[i].tcl_comp_ring); in ath12k_dp_srng_common_cleanup()
476 ath12k_dp_srng_cleanup(ab, &dp->tx_ring[i].tcl_data_ring); in ath12k_dp_srng_common_cleanup()
478 ath12k_dp_srng_cleanup(ab, &dp->wbm_desc_rel_ring); in ath12k_dp_srng_common_cleanup()
483 struct ath12k_dp *dp = &ab->dp; in ath12k_dp_srng_common_setup() local
489 ret = ath12k_dp_srng_setup(ab, &dp->wbm_desc_rel_ring, in ath12k_dp_srng_common_setup()
502 ret = ath12k_dp_srng_setup(ab, &dp->tx_ring[i].tcl_data_ring, in ath12k_dp_srng_common_setup()
511 ret = ath12k_dp_srng_setup(ab, &dp->tx_ring[i].tcl_comp_ring, in ath12k_dp_srng_common_setup()
521 ret = ath12k_dp_srng_setup(ab, &dp->reo_reinject_ring, HAL_REO_REINJECT, in ath12k_dp_srng_common_setup()
529 ret = ath12k_dp_srng_setup(ab, &dp->rx_rel_ring, HAL_WBM2SW_RELEASE, in ath12k_dp_srng_common_setup()
537 ret = ath12k_dp_srng_setup(ab, &dp->reo_except_ring, HAL_REO_EXCEPTION, in ath12k_dp_srng_common_setup()
545 ret = ath12k_dp_srng_setup(ab, &dp->reo_cmd_ring, HAL_REO_CMD, in ath12k_dp_srng_common_setup()
552 srng = &ab->hal.srng_list[dp->reo_cmd_ring.ring_id]; in ath12k_dp_srng_common_setup()
555 ret = ath12k_dp_srng_setup(ab, &dp->reo_status_ring, HAL_REO_STATUS, in ath12k_dp_srng_common_setup()
589 struct ath12k_dp *dp = &ab->dp; in ath12k_dp_scatter_idle_link_desc_cleanup() local
590 struct hal_wbm_idle_scatter_list *slist = dp->scatter_list; in ath12k_dp_scatter_idle_link_desc_cleanup()
609 struct ath12k_dp *dp = &ab->dp; in ath12k_dp_scatter_idle_link_desc_setup() local
610 struct dp_link_desc_bank *link_desc_banks = dp->link_desc_banks; in ath12k_dp_scatter_idle_link_desc_setup()
611 struct hal_wbm_idle_scatter_list *slist = dp->scatter_list; in ath12k_dp_scatter_idle_link_desc_setup()
621 enum hal_rx_buf_return_buf_manager rbm = dp->idle_link_rbm; in ath12k_dp_scatter_idle_link_desc_setup()
703 struct ath12k_dp *dp = &ab->dp; in ath12k_dp_link_desc_bank_alloc() local
732 ath12k_dp_link_desc_bank_free(ab, dp->link_desc_banks); in ath12k_dp_link_desc_bank_alloc()
751 struct ath12k_dp *dp = &ab->dp; in ath12k_wbm_idle_ring_setup() local
776 ret = ath12k_dp_srng_setup(ab, &dp->wbm_idle_ring, in ath12k_wbm_idle_ring_setup()
797 enum hal_rx_buf_return_buf_manager rbm = ab->dp.idle_link_rbm; in ath12k_dp_link_desc_setup()
968 struct ath12k_dp *dp = &ab->dp; in ath12k_dp_service_srng() local
969 struct dp_rxdma_ring *rx_ring = &dp->rx_refill_buf_ring; in ath12k_dp_service_srng()
996 struct ath12k_pdev_dp *dp = &ar->dp; in ath12k_dp_pdev_pre_alloc() local
998 dp->mac_id = ar->pdev_idx; in ath12k_dp_pdev_pre_alloc()
999 atomic_set(&dp->num_tx_pending, 0); in ath12k_dp_pdev_pre_alloc()
1000 init_waitqueue_head(&dp->tx_empty_waitq); in ath12k_dp_pdev_pre_alloc()
1083 int ath12k_dp_htt_connect(struct ath12k_dp *dp) in ath12k_dp_htt_connect() argument
1095 status = ath12k_htc_connect_service(&dp->ab->htc, &conn_req, in ath12k_dp_htt_connect()
1101 dp->eid = conn_resp.eid; in ath12k_dp_htt_connect()
1142 arvif->bank_id = ath12k_dp_tx_get_bank_profile(ab, arvif, &ab->dp); in ath12k_dp_vdev_tx_attach()
1146 ath12k_err(ar->ab, "Failed to initialize DP TX Banks"); in ath12k_dp_vdev_tx_attach()
1155 struct ath12k_dp *dp = &ab->dp; in ath12k_dp_cc_cleanup() local
1162 if (!dp->spt_info) in ath12k_dp_cc_cleanup()
1166 spin_lock_bh(&dp->rx_desc_lock); in ath12k_dp_cc_cleanup()
1169 desc_info = dp->rxbaddr[i]; in ath12k_dp_cc_cleanup()
1188 if (!dp->rxbaddr[i]) in ath12k_dp_cc_cleanup()
1191 kfree(dp->rxbaddr[i]); in ath12k_dp_cc_cleanup()
1192 dp->rxbaddr[i] = NULL; in ath12k_dp_cc_cleanup()
1195 spin_unlock_bh(&dp->rx_desc_lock); in ath12k_dp_cc_cleanup()
1199 spin_lock_bh(&dp->tx_desc_lock[i]); in ath12k_dp_cc_cleanup()
1201 list_for_each_entry_safe(tx_desc_info, tmp1, &dp->tx_desc_used_list[i], in ath12k_dp_cc_cleanup()
1216 if (atomic_dec_and_test(&ar->dp.num_tx_pending)) in ath12k_dp_cc_cleanup()
1217 wake_up(&ar->dp.tx_empty_waitq); in ath12k_dp_cc_cleanup()
1225 spin_unlock_bh(&dp->tx_desc_lock[i]); in ath12k_dp_cc_cleanup()
1229 spin_lock_bh(&dp->tx_desc_lock[pool_id]); in ath12k_dp_cc_cleanup()
1233 if (!dp->txbaddr[tx_spt_page]) in ath12k_dp_cc_cleanup()
1236 kfree(dp->txbaddr[tx_spt_page]); in ath12k_dp_cc_cleanup()
1237 dp->txbaddr[tx_spt_page] = NULL; in ath12k_dp_cc_cleanup()
1240 spin_unlock_bh(&dp->tx_desc_lock[pool_id]); in ath12k_dp_cc_cleanup()
1244 for (i = 0; i < dp->num_spt_pages; i++) { in ath12k_dp_cc_cleanup()
1245 if (!dp->spt_info[i].vaddr) in ath12k_dp_cc_cleanup()
1249 dp->spt_info[i].vaddr, dp->spt_info[i].paddr); in ath12k_dp_cc_cleanup()
1250 dp->spt_info[i].vaddr = NULL; in ath12k_dp_cc_cleanup()
1253 kfree(dp->spt_info); in ath12k_dp_cc_cleanup()
1254 dp->spt_info = NULL; in ath12k_dp_cc_cleanup()
1259 struct ath12k_dp *dp = &ab->dp; in ath12k_dp_reoq_lut_cleanup() local
1264 if (dp->reoq_lut.vaddr) { in ath12k_dp_reoq_lut_cleanup()
1269 dp->reoq_lut.vaddr, dp->reoq_lut.paddr); in ath12k_dp_reoq_lut_cleanup()
1270 dp->reoq_lut.vaddr = NULL; in ath12k_dp_reoq_lut_cleanup()
1273 if (dp->ml_reoq_lut.vaddr) { in ath12k_dp_reoq_lut_cleanup()
1278 dp->ml_reoq_lut.vaddr, dp->ml_reoq_lut.paddr); in ath12k_dp_reoq_lut_cleanup()
1279 dp->ml_reoq_lut.vaddr = NULL; in ath12k_dp_reoq_lut_cleanup()
1285 struct ath12k_dp *dp = &ab->dp; in ath12k_dp_free() local
1288 if (!dp->ab) in ath12k_dp_free()
1291 ath12k_dp_link_desc_cleanup(ab, dp->link_desc_banks, in ath12k_dp_free()
1292 HAL_WBM_IDLE_LINK, &dp->wbm_idle_ring); in ath12k_dp_free()
1302 kfree(dp->tx_ring[i].tx_status); in ath12k_dp_free()
1303 dp->tx_ring[i].tx_status = NULL; in ath12k_dp_free()
1308 dp->ab = NULL; in ath12k_dp_free()
1369 struct ath12k_dp *dp = &ab->dp; in ath12k_dp_cc_get_desc_addr_ptr() local
1371 return dp->spt_info[ppt_idx].vaddr + spt_idx; in ath12k_dp_cc_get_desc_addr_ptr()
1377 struct ath12k_dp *dp = &ab->dp; in ath12k_dp_get_rx_desc() local
1384 start_ppt_idx = dp->rx_ppt_base + ATH12K_RX_SPT_PAGE_OFFSET; in ath12k_dp_get_rx_desc()
1392 ppt_idx = ppt_idx - dp->rx_ppt_base; in ath12k_dp_get_rx_desc()
1423 struct ath12k_dp *dp = &ab->dp; in ath12k_dp_cc_desc_init() local
1429 spin_lock_bh(&dp->rx_desc_lock); in ath12k_dp_cc_desc_init()
1437 spin_unlock_bh(&dp->rx_desc_lock); in ath12k_dp_cc_desc_init()
1442 cookie_ppt_idx = dp->rx_ppt_base + ppt_idx; in ath12k_dp_cc_desc_init()
1443 dp->rxbaddr[i] = &rx_descs[0]; in ath12k_dp_cc_desc_init()
1449 list_add_tail(&rx_descs[j].list, &dp->rx_desc_free_list); in ath12k_dp_cc_desc_init()
1457 spin_unlock_bh(&dp->rx_desc_lock); in ath12k_dp_cc_desc_init()
1460 spin_lock_bh(&dp->tx_desc_lock[pool_id]); in ath12k_dp_cc_desc_init()
1466 spin_unlock_bh(&dp->tx_desc_lock[pool_id]); in ath12k_dp_cc_desc_init()
1474 dp->txbaddr[tx_spt_page] = &tx_descs[0]; in ath12k_dp_cc_desc_init()
1480 &dp->tx_desc_free_list[pool_id]); in ath12k_dp_cc_desc_init()
1488 spin_unlock_bh(&dp->tx_desc_lock[pool_id]); in ath12k_dp_cc_desc_init()
1494 struct ath12k_dp *dp, in ath12k_dp_cmem_init() argument
1508 cmem_base += ATH12K_PPT_ADDR_OFFSET(dp->rx_ppt_base); in ath12k_dp_cmem_init()
1520 dp->spt_info[i].paddr >> ATH12K_SPT_4K_ALIGN_OFFSET); in ath12k_dp_cmem_init()
1534 ath12k_dp_cmem_init(ab, &ag->ab[i]->dp, ATH12K_DP_RX_DESC); in ath12k_dp_partner_cc_init()
1540 struct ath12k_dp *dp = &ab->dp; in ath12k_dp_cc_init() local
1543 INIT_LIST_HEAD(&dp->rx_desc_free_list); in ath12k_dp_cc_init()
1544 spin_lock_init(&dp->rx_desc_lock); in ath12k_dp_cc_init()
1547 INIT_LIST_HEAD(&dp->tx_desc_free_list[i]); in ath12k_dp_cc_init()
1548 INIT_LIST_HEAD(&dp->tx_desc_used_list[i]); in ath12k_dp_cc_init()
1549 spin_lock_init(&dp->tx_desc_lock[i]); in ath12k_dp_cc_init()
1552 dp->num_spt_pages = ATH12K_NUM_SPT_PAGES; in ath12k_dp_cc_init()
1553 if (dp->num_spt_pages > ATH12K_MAX_PPT_ENTRIES) in ath12k_dp_cc_init()
1554 dp->num_spt_pages = ATH12K_MAX_PPT_ENTRIES; in ath12k_dp_cc_init()
1556 dp->spt_info = kcalloc(dp->num_spt_pages, sizeof(struct ath12k_spt_info), in ath12k_dp_cc_init()
1559 if (!dp->spt_info) { in ath12k_dp_cc_init()
1564 dp->rx_ppt_base = ab->device_id * ATH12K_NUM_RX_SPT_PAGES; in ath12k_dp_cc_init()
1566 for (i = 0; i < dp->num_spt_pages; i++) { in ath12k_dp_cc_init()
1567 dp->spt_info[i].vaddr = dma_alloc_coherent(ab->dev, in ath12k_dp_cc_init()
1569 &dp->spt_info[i].paddr, in ath12k_dp_cc_init()
1572 if (!dp->spt_info[i].vaddr) { in ath12k_dp_cc_init()
1577 if (dp->spt_info[i].paddr & ATH12K_SPT_4K_ALIGN_CHECK) { in ath12k_dp_cc_init()
1584 ret = ath12k_dp_cmem_init(ab, dp, ATH12K_DP_TX_DESC); in ath12k_dp_cc_init()
1590 ret = ath12k_dp_cmem_init(ab, dp, ATH12K_DP_RX_DESC); in ath12k_dp_cc_init()
1610 struct ath12k_dp *dp = &ab->dp; in ath12k_dp_reoq_lut_setup() local
1615 dp->reoq_lut.vaddr = dma_alloc_coherent(ab->dev, in ath12k_dp_reoq_lut_setup()
1617 &dp->reoq_lut.paddr, in ath12k_dp_reoq_lut_setup()
1619 if (!dp->reoq_lut.vaddr) { in ath12k_dp_reoq_lut_setup()
1624 dp->ml_reoq_lut.vaddr = dma_alloc_coherent(ab->dev, in ath12k_dp_reoq_lut_setup()
1626 &dp->ml_reoq_lut.paddr, in ath12k_dp_reoq_lut_setup()
1628 if (!dp->ml_reoq_lut.vaddr) { in ath12k_dp_reoq_lut_setup()
1631 dp->reoq_lut.vaddr, dp->reoq_lut.paddr); in ath12k_dp_reoq_lut_setup()
1632 dp->reoq_lut.vaddr = NULL; in ath12k_dp_reoq_lut_setup()
1637 dp->reoq_lut.paddr); in ath12k_dp_reoq_lut_setup()
1639 dp->ml_reoq_lut.paddr >> 8); in ath12k_dp_reoq_lut_setup()
1664 struct ath12k_dp *dp = &ab->dp; in ath12k_dp_alloc() local
1671 dp->ab = ab; in ath12k_dp_alloc()
1673 INIT_LIST_HEAD(&dp->reo_cmd_list); in ath12k_dp_alloc()
1674 INIT_LIST_HEAD(&dp->reo_cmd_cache_flush_list); in ath12k_dp_alloc()
1675 spin_lock_init(&dp->reo_cmd_lock); in ath12k_dp_alloc()
1677 dp->reo_cmd_cache_flush_count = 0; in ath12k_dp_alloc()
1678 dp->idle_link_rbm = ath12k_dp_get_idle_link_rbm(ab); in ath12k_dp_alloc()
1686 srng = &ab->hal.srng_list[dp->wbm_idle_ring.ring_id]; in ath12k_dp_alloc()
1688 ret = ath12k_dp_link_desc_setup(ab, dp->link_desc_banks, in ath12k_dp_alloc()
1720 dp->tx_ring[i].tcl_data_ring_id = i; in ath12k_dp_alloc()
1722 dp->tx_ring[i].tx_status_head = 0; in ath12k_dp_alloc()
1723 dp->tx_ring[i].tx_status_tail = DP_TX_COMP_RING_SIZE - 1; in ath12k_dp_alloc()
1724 dp->tx_ring[i].tx_status = kmalloc(size, GFP_KERNEL); in ath12k_dp_alloc()
1725 if (!dp->tx_ring[i].tx_status) { in ath12k_dp_alloc()
1741 /* Init any SOC level resource for DP */ in ath12k_dp_alloc()
1761 ath12k_dp_link_desc_cleanup(ab, dp->link_desc_banks, in ath12k_dp_alloc()
1762 HAL_WBM_IDLE_LINK, &dp->wbm_idle_ring); in ath12k_dp_alloc()