Lines Matching +full:0 +full:x300000
18 #define IWL_DR_NVM_VERSION 0x0a1d
21 #define IWL_DR_DCCM_OFFSET 0x800000 /* LMAC1 */
22 #define IWL_DR_DCCM_LEN 0x10000 /* LMAC1 */
23 #define IWL_DR_DCCM2_OFFSET 0x880000
24 #define IWL_DR_DCCM2_LEN 0x8000
25 #define IWL_DR_SMEM_OFFSET 0x400000
26 #define IWL_DR_SMEM_LEN 0xD0000
66 .mac_addr_from_csr = 0x30, \
72 .min_umac_error_event_table = 0xD0000, \
73 .d3_debug_data_base_addr = 0x401000, \
85 .trans.umac_prph_offset = 0x300000, \
89 .gp2_reg_addr = 0xd02c68, \
98 .mask = 0xffffffff, \
132 .umac_prph_offset = 0x300000,
152 .umac_prph_offset = 0x300000,