Lines Matching +full:off +full:- +full:by
11 * published by the Free Software Foundation.
31 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
98 ndev->reg->db_iowrite(ndev->db_link_mask, in gen3_poll_link()
99 ndev->self_mmio + in gen3_poll_link()
100 ndev->self_reg->db_clear); in gen3_poll_link()
102 rc = pci_read_config_word(ndev->ntb.pdev, in gen3_poll_link()
107 if (reg_val == ndev->lnk_sta) in gen3_poll_link()
110 ndev->lnk_sta = reg_val; in gen3_poll_link()
121 * on Skylake. By default the link status bit is bit 32, however it in gen3_init_isr()
122 * is by default MSIX vector0. We need to fixup to line them up. in gen3_init_isr()
123 * The vectors at reset is 1-32,0. We need to reprogram to 0-32. in gen3_init_isr()
127 iowrite8(i, ndev->self_mmio + GEN3_INTVEC_OFFSET + i); in gen3_init_isr()
130 if (ndev->hwerr_flags & NTB_HWERR_MSIX_VECTOR32_BAD) { in gen3_init_isr()
131 iowrite8(GEN3_DB_MSIX_VECTOR_COUNT - 2, in gen3_init_isr()
132 ndev->self_mmio + GEN3_INTVEC_OFFSET + in gen3_init_isr()
133 (GEN3_DB_MSIX_VECTOR_COUNT - 1)); in gen3_init_isr()
150 pdev = ndev->ntb.pdev; in gen3_setup_b2b_mw()
151 mmio = ndev->self_mmio; in gen3_setup_b2b_mw()
154 bar_addr = addr->bar2_addr64; in gen3_setup_b2b_mw()
157 dev_dbg(&pdev->dev, "IMBAR1XLMT %#018llx\n", bar_addr); in gen3_setup_b2b_mw()
159 bar_addr = addr->bar4_addr64; in gen3_setup_b2b_mw()
162 dev_dbg(&pdev->dev, "IMBAR2XLMT %#018llx\n", bar_addr); in gen3_setup_b2b_mw()
168 ndev->peer_mmio = ndev->self_mmio; in gen3_setup_b2b_mw()
178 ndev->mw_count = XEON_MW_COUNT; in gen3_init_ntb()
179 ndev->spad_count = GEN3_SPAD_COUNT; in gen3_init_ntb()
180 ndev->db_count = GEN3_DB_COUNT; in gen3_init_ntb()
181 ndev->db_link_mask = GEN3_DB_LINK_BIT; in gen3_init_ntb()
184 if (ndev->hwerr_flags & NTB_HWERR_MSIX_VECTOR32_BAD) in gen3_init_ntb()
185 ndev->db_link_mask |= BIT_ULL(31); in gen3_init_ntb()
187 switch (ndev->ntb.topo) { in gen3_init_ntb()
190 ndev->self_reg = &gen3_pri_reg; in gen3_init_ntb()
191 ndev->peer_reg = &gen3_b2b_reg; in gen3_init_ntb()
192 ndev->xlat_reg = &gen3_sec_xlat; in gen3_init_ntb()
194 if (ndev->ntb.topo == NTB_TOPO_B2B_USD) { in gen3_init_ntb()
209 ndev->self_mmio + GEN3_SPCICMD_OFFSET); in gen3_init_ntb()
214 return -EINVAL; in gen3_init_ntb()
217 ndev->db_valid_mask = BIT_ULL(ndev->db_count) - 1; in gen3_init_ntb()
219 if (ndev->hwerr_flags & NTB_HWERR_MSIX_VECTOR32_BAD) in gen3_init_ntb()
220 ndev->db_valid_mask &= ~ndev->db_link_mask; in gen3_init_ntb()
222 ndev->reg->db_iowrite(ndev->db_valid_mask, in gen3_init_ntb()
223 ndev->self_mmio + in gen3_init_ntb()
224 ndev->self_reg->db_mask); in gen3_init_ntb()
235 pdev = ndev->ntb.pdev; in gen3_init_dev()
237 ndev->reg = &gen3_reg; in gen3_init_dev()
241 return -EIO; in gen3_init_dev()
243 ndev->ntb.topo = xeon_ppd_topo(ndev, ppd); in gen3_init_dev()
244 dev_dbg(&pdev->dev, "ppd %#x topo %s\n", ppd, in gen3_init_dev()
245 ntb_topo_string(ndev->ntb.topo)); in gen3_init_dev()
246 if (ndev->ntb.topo == NTB_TOPO_NONE) in gen3_init_dev()
247 return -EINVAL; in gen3_init_dev()
249 ndev->hwerr_flags |= NTB_HWERR_MSIX_VECTOR32_BAD; in gen3_init_dev()
265 ssize_t ret, off; in ndev_ntb3_debugfs_read() local
268 ndev = filp->private_data; in ndev_ntb3_debugfs_read()
269 mmio = ndev->self_mmio; in ndev_ntb3_debugfs_read()
275 return -ENOMEM; in ndev_ntb3_debugfs_read()
277 off = 0; in ndev_ntb3_debugfs_read()
279 off += scnprintf(buf + off, buf_size - off, in ndev_ntb3_debugfs_read()
282 off += scnprintf(buf + off, buf_size - off, in ndev_ntb3_debugfs_read()
283 "Connection Topology -\t%s\n", in ndev_ntb3_debugfs_read()
284 ntb_topo_string(ndev->ntb.topo)); in ndev_ntb3_debugfs_read()
286 off += scnprintf(buf + off, buf_size - off, in ndev_ntb3_debugfs_read()
287 "NTB CTL -\t\t%#06x\n", ndev->ntb_ctl); in ndev_ntb3_debugfs_read()
288 off += scnprintf(buf + off, buf_size - off, in ndev_ntb3_debugfs_read()
289 "LNK STA -\t\t%#06x\n", ndev->lnk_sta); in ndev_ntb3_debugfs_read()
291 if (!ndev->reg->link_is_up(ndev)) in ndev_ntb3_debugfs_read()
292 off += scnprintf(buf + off, buf_size - off, in ndev_ntb3_debugfs_read()
293 "Link Status -\t\tDown\n"); in ndev_ntb3_debugfs_read()
295 off += scnprintf(buf + off, buf_size - off, in ndev_ntb3_debugfs_read()
296 "Link Status -\t\tUp\n"); in ndev_ntb3_debugfs_read()
297 off += scnprintf(buf + off, buf_size - off, in ndev_ntb3_debugfs_read()
298 "Link Speed -\t\tPCI-E Gen %u\n", in ndev_ntb3_debugfs_read()
299 NTB_LNK_STA_SPEED(ndev->lnk_sta)); in ndev_ntb3_debugfs_read()
300 off += scnprintf(buf + off, buf_size - off, in ndev_ntb3_debugfs_read()
301 "Link Width -\t\tx%u\n", in ndev_ntb3_debugfs_read()
302 NTB_LNK_STA_WIDTH(ndev->lnk_sta)); in ndev_ntb3_debugfs_read()
305 off += scnprintf(buf + off, buf_size - off, in ndev_ntb3_debugfs_read()
306 "Memory Window Count -\t%u\n", ndev->mw_count); in ndev_ntb3_debugfs_read()
307 off += scnprintf(buf + off, buf_size - off, in ndev_ntb3_debugfs_read()
308 "Scratchpad Count -\t%u\n", ndev->spad_count); in ndev_ntb3_debugfs_read()
309 off += scnprintf(buf + off, buf_size - off, in ndev_ntb3_debugfs_read()
310 "Doorbell Count -\t%u\n", ndev->db_count); in ndev_ntb3_debugfs_read()
311 off += scnprintf(buf + off, buf_size - off, in ndev_ntb3_debugfs_read()
312 "Doorbell Vector Count -\t%u\n", ndev->db_vec_count); in ndev_ntb3_debugfs_read()
313 off += scnprintf(buf + off, buf_size - off, in ndev_ntb3_debugfs_read()
314 "Doorbell Vector Shift -\t%u\n", ndev->db_vec_shift); in ndev_ntb3_debugfs_read()
316 off += scnprintf(buf + off, buf_size - off, in ndev_ntb3_debugfs_read()
317 "Doorbell Valid Mask -\t%#llx\n", ndev->db_valid_mask); in ndev_ntb3_debugfs_read()
318 off += scnprintf(buf + off, buf_size - off, in ndev_ntb3_debugfs_read()
319 "Doorbell Link Mask -\t%#llx\n", ndev->db_link_mask); in ndev_ntb3_debugfs_read()
320 off += scnprintf(buf + off, buf_size - off, in ndev_ntb3_debugfs_read()
321 "Doorbell Mask Cached -\t%#llx\n", ndev->db_mask); in ndev_ntb3_debugfs_read()
323 u.v64 = ndev_db_read(ndev, mmio + ndev->self_reg->db_mask); in ndev_ntb3_debugfs_read()
324 off += scnprintf(buf + off, buf_size - off, in ndev_ntb3_debugfs_read()
325 "Doorbell Mask -\t\t%#llx\n", u.v64); in ndev_ntb3_debugfs_read()
327 u.v64 = ndev_db_read(ndev, mmio + ndev->self_reg->db_bell); in ndev_ntb3_debugfs_read()
328 off += scnprintf(buf + off, buf_size - off, in ndev_ntb3_debugfs_read()
329 "Doorbell Bell -\t\t%#llx\n", u.v64); in ndev_ntb3_debugfs_read()
331 off += scnprintf(buf + off, buf_size - off, in ndev_ntb3_debugfs_read()
335 off += scnprintf(buf + off, buf_size - off, in ndev_ntb3_debugfs_read()
336 "IMBAR1XBASE -\t\t%#018llx\n", u.v64); in ndev_ntb3_debugfs_read()
339 off += scnprintf(buf + off, buf_size - off, in ndev_ntb3_debugfs_read()
340 "IMBAR2XBASE -\t\t%#018llx\n", u.v64); in ndev_ntb3_debugfs_read()
343 off += scnprintf(buf + off, buf_size - off, in ndev_ntb3_debugfs_read()
344 "IMBAR1XLMT -\t\t\t%#018llx\n", u.v64); in ndev_ntb3_debugfs_read()
347 off += scnprintf(buf + off, buf_size - off, in ndev_ntb3_debugfs_read()
348 "IMBAR2XLMT -\t\t\t%#018llx\n", u.v64); in ndev_ntb3_debugfs_read()
350 if (ntb_topo_is_b2b(ndev->ntb.topo)) { in ndev_ntb3_debugfs_read()
351 off += scnprintf(buf + off, buf_size - off, in ndev_ntb3_debugfs_read()
355 off += scnprintf(buf + off, buf_size - off, in ndev_ntb3_debugfs_read()
356 "EMBAR1XBASE -\t\t%#018llx\n", u.v64); in ndev_ntb3_debugfs_read()
359 off += scnprintf(buf + off, buf_size - off, in ndev_ntb3_debugfs_read()
360 "EMBAR2XBASE -\t\t%#018llx\n", u.v64); in ndev_ntb3_debugfs_read()
363 off += scnprintf(buf + off, buf_size - off, in ndev_ntb3_debugfs_read()
364 "EMBAR1XLMT -\t\t%#018llx\n", u.v64); in ndev_ntb3_debugfs_read()
367 off += scnprintf(buf + off, buf_size - off, in ndev_ntb3_debugfs_read()
368 "EMBAR2XLMT -\t\t%#018llx\n", u.v64); in ndev_ntb3_debugfs_read()
370 off += scnprintf(buf + off, buf_size - off, in ndev_ntb3_debugfs_read()
374 off += scnprintf(buf + off, buf_size - off, in ndev_ntb3_debugfs_read()
375 "EMBAR0 -\t\t%#018llx\n", u.v64); in ndev_ntb3_debugfs_read()
378 off += scnprintf(buf + off, buf_size - off, in ndev_ntb3_debugfs_read()
379 "EMBAR1 -\t\t%#018llx\n", u.v64); in ndev_ntb3_debugfs_read()
382 off += scnprintf(buf + off, buf_size - off, in ndev_ntb3_debugfs_read()
383 "EMBAR2 -\t\t%#018llx\n", u.v64); in ndev_ntb3_debugfs_read()
386 off += scnprintf(buf + off, buf_size - off, in ndev_ntb3_debugfs_read()
390 off += scnprintf(buf + off, buf_size - off, in ndev_ntb3_debugfs_read()
391 "Upstream Memory Miss -\t%u\n", u.v16); in ndev_ntb3_debugfs_read()
393 off += scnprintf(buf + off, buf_size - off, in ndev_ntb3_debugfs_read()
396 if (!pci_read_config_word(ndev->ntb.pdev, in ndev_ntb3_debugfs_read()
398 off += scnprintf(buf + off, buf_size - off, in ndev_ntb3_debugfs_read()
399 "DEVSTS -\t\t%#06x\n", u.v16); in ndev_ntb3_debugfs_read()
401 if (!pci_read_config_word(ndev->ntb.pdev, in ndev_ntb3_debugfs_read()
403 off += scnprintf(buf + off, buf_size - off, in ndev_ntb3_debugfs_read()
404 "LNKSTS -\t\t%#06x\n", u.v16); in ndev_ntb3_debugfs_read()
406 if (!pci_read_config_dword(ndev->ntb.pdev, in ndev_ntb3_debugfs_read()
408 off += scnprintf(buf + off, buf_size - off, in ndev_ntb3_debugfs_read()
409 "UNCERRSTS -\t\t%#06x\n", u.v32); in ndev_ntb3_debugfs_read()
411 if (!pci_read_config_dword(ndev->ntb.pdev, in ndev_ntb3_debugfs_read()
413 off += scnprintf(buf + off, buf_size - off, in ndev_ntb3_debugfs_read()
414 "CORERRSTS -\t\t%#06x\n", u.v32); in ndev_ntb3_debugfs_read()
416 ret = simple_read_from_buffer(ubuf, count, offp, buf, off); in ndev_ntb3_debugfs_read()
429 dev_dbg(&ntb->pdev->dev, in intel_ntb3_link_enable()
434 dev_dbg(&ntb->pdev->dev, "ignoring max_speed %d\n", max_speed); in intel_ntb3_link_enable()
436 dev_dbg(&ntb->pdev->dev, "ignoring max_width %d\n", max_width); in intel_ntb3_link_enable()
438 ntb_ctl = ioread32(ndev->self_mmio + ndev->reg->ntb_ctl); in intel_ntb3_link_enable()
442 iowrite32(ntb_ctl, ndev->self_mmio + ndev->reg->ntb_ctl); in intel_ntb3_link_enable()
457 return -EINVAL; in intel_ntb3_mw_set_trans()
459 if (idx >= ndev->b2b_idx && !ndev->b2b_off) in intel_ntb3_mw_set_trans()
466 bar_size = pci_resource_len(ndev->ntb.pdev, bar); in intel_ntb3_mw_set_trans()
468 if (idx == ndev->b2b_idx) in intel_ntb3_mw_set_trans()
469 mw_size = bar_size - ndev->b2b_off; in intel_ntb3_mw_set_trans()
474 if (addr & (bar_size - 1)) in intel_ntb3_mw_set_trans()
475 return -EINVAL; in intel_ntb3_mw_set_trans()
479 return -EINVAL; in intel_ntb3_mw_set_trans()
481 mmio = ndev->self_mmio; in intel_ntb3_mw_set_trans()
482 xlat_reg = ndev->xlat_reg->bar2_xlat + (idx * 0x10); in intel_ntb3_mw_set_trans()
483 limit_reg = ndev->xlat_reg->bar2_limit + (idx * 0x10); in intel_ntb3_mw_set_trans()
484 base = pci_resource_start(ndev->ntb.pdev, bar); in intel_ntb3_mw_set_trans()
497 return -EIO; in intel_ntb3_mw_set_trans()
500 dev_dbg(&ntb->pdev->dev, "BAR %d IMBARXBASE: %#Lx\n", bar, reg_val); in intel_ntb3_mw_set_trans()
508 return -EIO; in intel_ntb3_mw_set_trans()
511 dev_dbg(&ntb->pdev->dev, "BAR %d IMBARXLMT: %#Lx\n", bar, reg_val); in intel_ntb3_mw_set_trans()
514 limit_reg = ndev->xlat_reg->bar2_limit + (idx * 0x10) + 0x4000; in intel_ntb3_mw_set_trans()
529 return -EIO; in intel_ntb3_mw_set_trans()
532 dev_dbg(&ntb->pdev->dev, "BAR %d EMBARXLMT: %#Lx\n", bar, reg_val); in intel_ntb3_mw_set_trans()
545 return -EINVAL; in intel_ntb3_peer_db_addr()
547 if (unlikely(BIT_ULL(db_bit) & ~ntb_ndev(ntb)->db_valid_mask)) in intel_ntb3_peer_db_addr()
548 return -EINVAL; in intel_ntb3_peer_db_addr()
550 ndev_db_addr(ndev, &db_addr_base, db_size, ndev->peer_addr, in intel_ntb3_peer_db_addr()
551 ndev->peer_reg->db_bell); in intel_ntb3_peer_db_addr()
555 dev_dbg(&ndev->ntb.pdev->dev, "Peer db addr %llx db bit %d\n", in intel_ntb3_peer_db_addr()
561 dev_dbg(&ndev->ntb.pdev->dev, "Peer db data %llx db bit %d\n", in intel_ntb3_peer_db_addr()
573 if (db_bits & ~ndev->db_valid_mask) in intel_ntb3_peer_db_set()
574 return -EINVAL; in intel_ntb3_peer_db_set()
578 iowrite32(1, ndev->peer_mmio + in intel_ntb3_peer_db_set()
579 ndev->peer_reg->db_bell + (bit * 4)); in intel_ntb3_peer_db_set()
580 db_bits &= db_bits - 1; in intel_ntb3_peer_db_set()
591 ndev->self_mmio + in intel_ntb3_db_read()
592 ndev->self_reg->db_clear); in intel_ntb3_db_read()
600 ndev->self_mmio + in intel_ntb3_db_clear()
601 ndev->self_reg->db_clear); in intel_ntb3_db_clear()