1 // SPDX-License-Identifier: GPL-2.0+
3  * Copyright (C) 2022-2023, Advanced Micro Devices, Inc.
10 #include <linux/bits.h>
57 	prop[0] = FIELD_PREP(OF_PCI_ADDR_FIELD_BUS, pdev->bus->number) |  in of_pci_set_address()
58 		FIELD_PREP(OF_PCI_ADDR_FIELD_DEV, PCI_SLOT(pdev->devfn)) |  in of_pci_set_address()
59 		FIELD_PREP(OF_PCI_ADDR_FIELD_FUNC, PCI_FUNC(pdev->devfn));  in of_pci_set_address()
70 	u32 ss;  in of_pci_get_addr_flags()  local
72 	if (res->flags & IORESOURCE_IO)  in of_pci_get_addr_flags()
73 		ss = OF_PCI_ADDR_SPACE_IO;  in of_pci_get_addr_flags()
74 	else if (res->flags & IORESOURCE_MEM_64)  in of_pci_get_addr_flags()
75 		ss = OF_PCI_ADDR_SPACE_MEM64;  in of_pci_get_addr_flags()
76 	else if (res->flags & IORESOURCE_MEM)  in of_pci_get_addr_flags()
77 		ss = OF_PCI_ADDR_SPACE_MEM32;  in of_pci_get_addr_flags()
79 		return -EINVAL;  in of_pci_get_addr_flags()
82 	if (res->flags & IORESOURCE_PREFETCH)  in of_pci_get_addr_flags()
85 	*flags |= FIELD_PREP(OF_PCI_ADDR_FIELD_SS, ss);  in of_pci_get_addr_flags()
94 	u32 bus_range[] = { pdev->subordinate->busn_res.start,  in of_pci_prop_bus_range()
95 			    pdev->subordinate->busn_res.end };  in of_pci_prop_bus_range()
97 	return of_changeset_add_prop_u32_array(ocs, np, "bus-range", bus_range,  in of_pci_prop_bus_range()
107 	u32 flags, num;  in of_pci_prop_ranges()  local
111 		num = PCI_BRIDGE_RESOURCE_NUM;  in of_pci_prop_ranges()
112 		res = &pdev->resource[PCI_BRIDGE_RESOURCES];  in of_pci_prop_ranges()
114 		num = PCI_STD_NUM_BARS;  in of_pci_prop_ranges()
115 		res = &pdev->resource[PCI_STD_RESOURCES];  in of_pci_prop_ranges()
118 	rp = kcalloc(num, sizeof(*rp), GFP_KERNEL);  in of_pci_prop_ranges()
120 		return -ENOMEM;  in of_pci_prop_ranges()
122 	for (i = 0, j = 0; j < num; j++) {  in of_pci_prop_ranges()
129 		val64 = pci_bus_address(pdev, &res[j] - pdev->resource);  in of_pci_prop_ranges()
137 			 * For endpoint device, the lower 64-bits of child  in of_pci_prop_ranges()
199 	ret = of_changeset_add_prop_u32(ocs, np, "#interrupt-cells", 1);  in of_pci_prop_intr_ctrl()
203 	return of_changeset_add_prop_bool(ocs, np, "interrupt-controller");  in of_pci_prop_intr_ctrl()
219 	pnode = pci_device_to_OF_node(pdev->bus->self);  in of_pci_prop_intr_map()
221 		pnode = pci_bus_to_OF_node(pdev->bus);  in of_pci_prop_intr_map()
225 		return -EINVAL;  in of_pci_prop_intr_map()
228 	laddr[0] = cpu_to_be32((pdev->bus->number << 16) | (pdev->devfn << 8));  in of_pci_prop_intr_map()
230 		i = pin - 1;  in of_pci_prop_intr_map()
240 		of_property_read_u32(out_irq[i].np, "#address-cells",  in of_pci_prop_intr_map()
244 	list_for_each_entry(child, &pdev->subordinate->devices, bus_list) {  in of_pci_prop_intr_map()
246 			i = pci_swizzle_interrupt_pin(child, pin) - 1;  in of_pci_prop_intr_map()
255 	 * need to generate interrupt-map property.  in of_pci_prop_intr_map()
262 		return -ENOMEM;  in of_pci_prop_intr_map()
265 	list_for_each_entry(child, &pdev->subordinate->devices, bus_list) {  in of_pci_prop_intr_map()
267 			i = pci_swizzle_interrupt_pin(child, pin) - 1;  in of_pci_prop_intr_map()
271 			*mapp = (child->bus->number << 16) |  in of_pci_prop_intr_map()
272 				(child->devfn << 8);  in of_pci_prop_intr_map()
276 			*mapp = out_irq[i].np->phandle;  in of_pci_prop_intr_map()
292 	ret = of_changeset_add_prop_u32_array(ocs, np, "interrupt-map", int_map,  in of_pci_prop_intr_map()
297 	ret = of_changeset_add_prop_u32(ocs, np, "#interrupt-cells", 1);  in of_pci_prop_intr_map()
301 	ret = of_changeset_add_prop_u32_array(ocs, np, "interrupt-map-mask",  in of_pci_prop_intr_map()
323 		kasprintf(GFP_KERNEL, "pci%x,%x", pdev->vendor, pdev->device);  in of_pci_prop_compatible()
325 		kasprintf(GFP_KERNEL, "pciclass,%06x", pdev->class);  in of_pci_prop_compatible()
327 		kasprintf(GFP_KERNEL, "pciclass,%04x", pdev->class >> 8);  in of_pci_prop_compatible()
369 	ret = of_changeset_add_prop_u32(ocs, np, "#address-cells",  in of_pci_add_properties()
374 	ret = of_changeset_add_prop_u32(ocs, np, "#size-cells",  in of_pci_add_properties()